ARM: Exynos4: Enable device tree support for GIC controller

ARM: Exynos4: Enable device tree support for GIC controller

[Thomas Abraham]

Changes since v1:
- Dropped device tree support for interrupt combiner controller from this patchset.
  Some rework in the interrupt combiner controller code is required to address
  the irq domain related comments from Grant Likely and hence those changes will
  be in another patchset.
- As suggested by Grant Likely, linux virq number 0 is left unused.

This patchset adds device tree support for GIC controller in Exynos4 SoC.

Patch 1 moves the statically mapped timer irqs 11 to 15 to the end of the
statically mapped linux irq space for Exynos4 platforms.

For Exynos4 platforms, the five hardware timer irqs are connected to GIC
at some hardware irq number (in exynos it is GIC_ID 69 to 73 for five timers).
When any of these hardware interrupt occurs, its interrupt handler calls
generic_handle_irq() with linux irq number 11/12/13/14/15 for timer 0/1/2/3/4
as the parameter. The code that needs to be notified about the timer interrupts
would have already registered its handler for either of the interrupts 11 to 15.

Instead of using linux irq number 11 to 15 to which consumers of timer interrupt
attach their handler, this interrupt range is moved to the end of linux irq
space used. So there will be no interrupts statically mapped between 0 to 31.

The GIC hardware interrupts, which were previously statically mapped to
start from linux irq 32 are now moved to start from linux irq 0. In case of
exynos, GIC_ID[0] (which is SGI[0]) which was previously at linux irq 32, will
not be at linux irq 0. This was required to use Rob Herring's GIC OF bindings
patches for Exynos4.

Patch 2 adds a interceptor for all ioremap calls targeted towards any of the
statically remapped memory region. This was required because the GIC OF
binding's patchset ioremaps the GIC memory-mapped regions in the gic_of_init()
function. Without this patch, there would be two separate remap for GIC
controller, one statically remapped and the other dynamically remapped by the
gic_of_init() function. The patch will eventually be superseded by Nicolas
Pitre's vmalloc patch series.

Patch 3 adds device tree support for GIC controllers on Exynos4. For GIC
controller, this patch is based on Rob Herring's,
"[PATCH 0/3] GIC OF bindings" patchset.

This patchset is based on the following tree:
git://git.linaro.org/git/people/arnd/arm-soc.git   branch: for-next

Thomas Abraham (3):
  ARM: Exynos4: Move timer irq numbers to end of linux irq space
  ARM: Exynos4: Add ioremap interceptor for statically remapped regions
  ARM: Exynos4: Enable conversion of GIC dt irq specifier to linux virq

 arch/arm/mach-exynos4/cpu.c                      |   33 +++++++++++++++++++++-
 arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
 arch/arm/mach-exynos4/include/mach/io.h          |    5 +++
 arch/arm/mach-exynos4/include/mach/irqs.h        |    8 +++--
 arch/arm/mach-s5p64x0/include/mach/irqs.h        |    2 +
 arch/arm/mach-s5pc100/include/mach/irqs.h        |    2 +
 arch/arm/mach-s5pv210/include/mach/irqs.h        |    2 +
 arch/arm/plat-samsung/include/plat/irqs.h        |    3 +-
 8 files changed, 50 insertions(+), 6 deletions(-)

[PATCH v2 1/3] ARM: Exynos4: Move timer irq numbers to end of linux irq space

[Thomas Abraham]

The timer irqs statically mapped from linux irq numbers 11 to 15 are moved to
the end of the statically mapped linux irq space. The GIC PPI and SPI interrupts
are relocated to start from 16 and 32 of the linux irq space. This is a required
to add device tree support for GIC and Interrupt combiner for Exynos4.

A new macro 'IRQ_TIMER_BASE' specifies a platform specific base of the linux
virq number for the timer interrupts. For exynos4, this base is set to end of
the linux virq space.  For the other s5p platforms, the existing base '11' is
retained.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
 arch/arm/mach-exynos4/include/mach/irqs.h        |    8 +++++---
 arch/arm/mach-s5p64x0/include/mach/irqs.h        |    2 ++
 arch/arm/mach-s5pc100/include/mach/irqs.h        |    2 ++
 arch/arm/mach-s5pv210/include/mach/irqs.h        |    2 ++
 arch/arm/plat-samsung/include/plat/irqs.h        |    3 ++-
 6 files changed, 13 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-exynos4/include/mach/entry-macro.S b/arch/arm/mach-exynos4/include/mach/entry-macro.S
index f5e9fd8..d7dfcd7 100644
--- a/arch/arm/mach-exynos4/include/mach/entry-macro.S
+++ b/arch/arm/mach-exynos4/include/mach/entry-macro.S
@@ -72,7 +72,6 @@
 		cmpcc	\irqnr, \irqnr
 		cmpne	\irqnr, \tmp
 		cmpcs	\irqnr, \irqnr
-		addne	\irqnr, \irqnr, #32
 
 		.endm
 
diff --git a/arch/arm/mach-exynos4/include/mach/irqs.h b/arch/arm/mach-exynos4/include/mach/irqs.h
index dfd4b7e..713dd52 100644
--- a/arch/arm/mach-exynos4/include/mach/irqs.h
+++ b/arch/arm/mach-exynos4/include/mach/irqs.h
@@ -17,13 +17,13 @@
 
 /* PPI: Private Peripheral Interrupt */
 
-#define IRQ_PPI(x)		S5P_IRQ(x+16)
+#define IRQ_PPI(x)		(x+16)
 
 #define IRQ_MCT_LOCALTIMER	IRQ_PPI(12)
 
 /* SPI: Shared Peripheral Interrupt */
 
-#define IRQ_SPI(x)		S5P_IRQ(x+32)
+#define IRQ_SPI(x)		(x+32)
 
 #define IRQ_EINT0		IRQ_SPI(16)
 #define IRQ_EINT1		IRQ_SPI(17)
@@ -163,7 +163,9 @@
 #define IRQ_GPIO2_NR_GROUPS	9
 #define IRQ_GPIO_END		(S5P_GPIOINT_BASE + S5P_GPIOINT_COUNT)
 
+#define IRQ_TIMER_BASE		(IRQ_GPIO_END + 64)
+
 /* Set the default NR_IRQS */
-#define NR_IRQS			(IRQ_GPIO_END + 64)
+#define NR_IRQS			(IRQ_TIMER_BASE + IRQ_TIMER_COUNT)
 
 #endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
index 53982db..5b845e8 100644
--- a/arch/arm/mach-s5p64x0/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -141,6 +141,8 @@
 
 #define IRQ_EINT_GROUP(grp, x)	(IRQ_EINT_GROUP##grp##_BASE + (x))
 
+#define IRQ_TIMER_BASE		(11)
+
 /* Set the default NR_IRQS */
 
 #define NR_IRQS			(IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index d2eb475..2870f12 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -97,6 +97,8 @@
 #define IRQ_SDMFIQ		S5P_IRQ_VIC2(31)
 #define IRQ_VIC_END		S5P_IRQ_VIC2(31)
 
+#define IRQ_TIMER_BASE		(11)
+
 #define S5P_EINT_BASE1		(S5P_IRQ_VIC0(0))
 #define S5P_EINT_BASE2		(IRQ_VIC_END + 1)
 
diff --git a/arch/arm/mach-s5pv210/include/mach/irqs.h b/arch/arm/mach-s5pv210/include/mach/irqs.h
index 5e0de3a..e777e01 100644
--- a/arch/arm/mach-s5pv210/include/mach/irqs.h
+++ b/arch/arm/mach-s5pv210/include/mach/irqs.h
@@ -118,6 +118,8 @@
 #define IRQ_MDNIE3		S5P_IRQ_VIC3(8)
 #define IRQ_VIC_END		S5P_IRQ_VIC3(31)
 
+#define IRQ_TIMER_BASE		(11)
+
 #define S5P_EINT_BASE1		(S5P_IRQ_VIC0(0))
 #define S5P_EINT_BASE2		(IRQ_VIC_END + 1)
 
diff --git a/arch/arm/plat-samsung/include/plat/irqs.h b/arch/arm/plat-samsung/include/plat/irqs.h
index 08d1a7e..df46b77 100644
--- a/arch/arm/plat-samsung/include/plat/irqs.h
+++ b/arch/arm/plat-samsung/include/plat/irqs.h
@@ -44,13 +44,14 @@
 #define S5P_IRQ_VIC2(x)		(S5P_VIC2_BASE + (x))
 #define S5P_IRQ_VIC3(x)		(S5P_VIC3_BASE + (x))
 
-#define S5P_TIMER_IRQ(x)	(11 + (x))
+#define S5P_TIMER_IRQ(x)	(IRQ_TIMER_BASE + (x))
 
 #define IRQ_TIMER0		S5P_TIMER_IRQ(0)
 #define IRQ_TIMER1		S5P_TIMER_IRQ(1)
 #define IRQ_TIMER2		S5P_TIMER_IRQ(2)
 #define IRQ_TIMER3		S5P_TIMER_IRQ(3)
 #define IRQ_TIMER4		S5P_TIMER_IRQ(4)
+#define IRQ_TIMER_COUNT		(5)
 
 #define IRQ_EINT(x)		((x) < 16 ? ((x) + S5P_EINT_BASE1) \
 					: ((x) - 16 + S5P_EINT_BASE2))
-- 
1.7.4.4

[PATCH v2 2/3] ARM: Exynos4: Add ioremap interceptor for statically remapped regions

[Thomas Abraham]

ioremap() request for statically remapped regions are intercepted and the
statically assigned virtual address is returned. For requests for which
there are no statically remapped regions, the requests are let through.

Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 arch/arm/mach-exynos4/cpu.c             |   16 ++++++++++++++++
 arch/arm/mach-exynos4/include/mach/io.h |    5 +++++
 2 files changed, 21 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 5b1765b..358624d 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -137,6 +137,22 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
 	},
 };
 
+/*
+ * For all ioremap requests of statically mapped regions, intercept ioremap and
+ * return virtual address from the iodesc table.
+ */
+void __iomem *exynos4_ioremap(unsigned long phy, size_t size, unsigned int type)
+{
+	struct map_desc *desc = exynos4_iodesc;
+	unsigned int idx;
+
+	for (idx = 0; idx < ARRAY_SIZE(exynos4_iodesc); idx++, desc++)
+		if (desc->pfn == __phys_to_pfn(phy) && desc->type == type)
+			return (void __iomem *)desc->virtual;
+
+	return __arm_ioremap(phy, size, type);
+}
+
 static void exynos4_idle(void)
 {
 	if (!need_resched())
diff --git a/arch/arm/mach-exynos4/include/mach/io.h b/arch/arm/mach-exynos4/include/mach/io.h
index d5478d2..c1b21d5 100644
--- a/arch/arm/mach-exynos4/include/mach/io.h
+++ b/arch/arm/mach-exynos4/include/mach/io.h
@@ -22,5 +22,10 @@
 #define __mem_pci(a)	(a)
 
 #define IO_SPACE_LIMIT (0xFFFFFFFF)
+#define __arch_ioremap	exynos4_ioremap
+#define __arch_iounmap	__iounmap
+
+void __iomem *exynos4_ioremap(unsigned long phy, size_t size,
+					unsigned int type);
 
 #endif /* __ASM_ARM_ARCH_IO_H */
-- 
1.7.4.4

[PATCH v2 3/3] ARM: Exynos4: Enable conversion of GIC dt irq specifier to linux virq

[Thomas Abraham]

Enable conversion of device tree interrupt specifier to linux virq domain
for GIC controller.

Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
---
 arch/arm/mach-exynos4/cpu.c |   17 ++++++++++++++++-
 1 files changed, 16 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 358624d..c06dd03 100644
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -10,6 +10,8 @@
 
 #include <linux/sched.h>
 #include <linux/sysdev.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
 
 #include <asm/mach/map.h>
 #include <asm/mach/irq.h>
@@ -229,13 +231,26 @@ static void exynos4_gic_irq_fix_base(struct irq_data *d)
 			    (gic_bank_offset * smp_processor_id());
 }
 
+#ifdef CONFIG_OF
+static const struct of_device_id exynos4_dt_irq_match[] = {
+	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
+	{},
+};
+#endif
+
 void __init exynos4_init_irq(void)
 {
 	int irq;
 
 	gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
 
-	gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+	if (!of_have_populated_dt())
+		gic_init(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
+#ifdef CONFIG_OF
+	else	
+		of_irq_init(exynos4_dt_irq_match);
+#endif
+
 	gic_arch_extn.irq_eoi = exynos4_gic_irq_fix_base;
 	gic_arch_extn.irq_unmask = exynos4_gic_irq_fix_base;
 	gic_arch_extn.irq_mask = exynos4_gic_irq_fix_base;
-- 
1.7.4.4

RE: Exynos4: Enable device tree support for GIC controller

[Kukjin Kim]

Thomas Abraham wrote:
> 
> Changes since v1:
> - Dropped device tree support for interrupt combiner controller from this
patchset.
>   Some rework in the interrupt combiner controller code is required to
address
>   the irq domain related comments from Grant Likely and hence those
changes will
>   be in another patchset.
> - As suggested by Grant Likely, linux virq number 0 is left unused.
> 
> This patchset adds device tree support for GIC controller in Exynos4 SoC.
> 
> Patch 1 moves the statically mapped timer irqs 11 to 15 to the end of the
> statically mapped linux irq space for Exynos4 platforms.
> 
> For Exynos4 platforms, the five hardware timer irqs are connected to GIC
> at some hardware irq number (in exynos it is GIC_ID 69 to 73 for five
timers).
> When any of these hardware interrupt occurs, its interrupt handler calls
> generic_handle_irq() with linux irq number 11/12/13/14/15 for timer
0/1/2/3/4
> as the parameter. The code that needs to be notified about the timer
interrupts
> would have already registered its handler for either of the interrupts 11
to 15.
> 
> Instead of using linux irq number 11 to 15 to which consumers of timer
interrupt
> attach their handler, this interrupt range is moved to the end of linux
irq
> space used. So there will be no interrupts statically mapped between 0 to
31.
> 
> The GIC hardware interrupts, which were previously statically mapped to
> start from linux irq 32 are now moved to start from linux irq 0. In case
of
> exynos, GIC_ID[0] (which is SGI[0]) which was previously at linux irq 32,
will
> not be at linux irq 0. This was required to use Rob Herring's GIC OF
bindings
> patches for Exynos4.
> 
> Patch 2 adds a interceptor for all ioremap calls targeted towards any of
the
> statically remapped memory region. This was required because the GIC OF
> binding's patchset ioremaps the GIC memory-mapped regions in the
gic_of_init()
> function. Without this patch, there would be two separate remap for GIC
> controller, one statically remapped and the other dynamically remapped by
the
> gic_of_init() function. The patch will eventually be superseded by Nicolas
> Pitre's vmalloc patch series.
> 
> Patch 3 adds device tree support for GIC controllers on Exynos4. For GIC
> controller, this patch is based on Rob Herring's,
> "[PATCH 0/3] GIC OF bindings" patchset.
> 
> This patchset is based on the following tree:
> git://git.linaro.org/git/people/arnd/arm-soc.git   branch: for-next
> 
> Thomas Abraham (3):
>   ARM: Exynos4: Move timer irq numbers to end of linux irq space
>   ARM: Exynos4: Add ioremap interceptor for statically remapped regions
>   ARM: Exynos4: Enable conversion of GIC dt irq specifier to linux virq
> 
>  arch/arm/mach-exynos4/cpu.c                      |   33
> +++++++++++++++++++++-
>  arch/arm/mach-exynos4/include/mach/entry-macro.S |    1 -
>  arch/arm/mach-exynos4/include/mach/io.h          |    5 +++
>  arch/arm/mach-exynos4/include/mach/irqs.h        |    8 +++--
>  arch/arm/mach-s5p64x0/include/mach/irqs.h        |    2 +
>  arch/arm/mach-s5pc100/include/mach/irqs.h        |    2 +
>  arch/arm/mach-s5pv210/include/mach/irqs.h        |    2 +
>  arch/arm/plat-samsung/include/plat/irqs.h        |    3 +-
>  8 files changed, 50 insertions(+), 6 deletions(-)

Looks ok to me, I replaced previous patches with this series.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

RE: [PATCH v2 2/3] ARM: Exynos4: Add ioremap interceptor for statically remapped regions

[Marek Szyprowski]

Hello,

On Tuesday, November 01, 2011 2:01 AM Thomas Abraham wrote:

> ioremap() request for statically remapped regions are intercepted and the
> statically assigned virtual address is returned. For requests for which
> there are no statically remapped regions, the requests are let through.
> 
> Cc: Kukjin Kim <kgene.kim@samsung.com>
> Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org>
> ---
>  arch/arm/mach-exynos4/cpu.c             |   16 ++++++++++++++++
>  arch/arm/mach-exynos4/include/mach/io.h |    5 +++++
>  2 files changed, 21 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
> index 5b1765b..358624d 100644
> --- a/arch/arm/mach-exynos4/cpu.c
> +++ b/arch/arm/mach-exynos4/cpu.c
> @@ -137,6 +137,22 @@ static struct map_desc exynos4_iodesc1[] __initdata = {
>  	},
>  };
> 
> +/*
> + * For all ioremap requests of statically mapped regions, intercept ioremap and
> + * return virtual address from the iodesc table.
> + */
> +void __iomem *exynos4_ioremap(unsigned long phy, size_t size, unsigned int type)
> +{
> +	struct map_desc *desc = exynos4_iodesc;
> +	unsigned int idx;
> +
> +	for (idx = 0; idx < ARRAY_SIZE(exynos4_iodesc); idx++, desc++)
> +		if (desc->pfn == __phys_to_pfn(phy) && desc->type == type)
> +			return (void __iomem *)desc->virtual;

I've just noticed that this function make access to exynos4_iodesc array which is
placed in initdata section. This might cause a lot of strange unpredictable issues,
so this patch should probably remove __initdata annotations in iodesc arrays.

> +
> +	return __arm_ioremap(phy, size, type);
> +}
> +
>  static void exynos4_idle(void)
>  {
>  	if (!need_resched())
> diff --git a/arch/arm/mach-exynos4/include/mach/io.h b/arch/arm/mach-exynos4/include/mach/io.h
> index d5478d2..c1b21d5 100644
> --- a/arch/arm/mach-exynos4/include/mach/io.h
> +++ b/arch/arm/mach-exynos4/include/mach/io.h
> @@ -22,5 +22,10 @@
>  #define __mem_pci(a)	(a)
> 
>  #define IO_SPACE_LIMIT (0xFFFFFFFF)
> +#define __arch_ioremap	exynos4_ioremap
> +#define __arch_iounmap	__iounmap
> +
> +void __iomem *exynos4_ioremap(unsigned long phy, size_t size,
> +					unsigned int type);
> 
>  #endif /* __ASM_ARM_ARCH_IO_H */
> --
> 1.7.4.4
> 

Best regards
-- 
Marek Szyprowski
Samsung Poland R&D Center