From: Jamie Iles <jamie-wmLquQDDieKakBO8gow8eQ@public.gmane.org>
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: viresh.kumar-qxv4g6HH51o@public.gmane.org,
kgene.kim-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org,
linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org,
linus.walleij-0IS4wlFg1OjSUeElwK9/Pw@public.gmane.org,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
rmallon-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org,
rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org,
hsweeten-3FF4nKcrg1dE2c76skzGb0EOCMrvLtNR@public.gmane.org,
rajeev-dlh.kumar-qxv4g6HH51o@public.gmane.org,
ben-linux-elnMNo+KYs3YtjvyW6yDsg@public.gmane.org,
rubini-9wsNiZum9E8@public.gmane.org
Subject: [PATCHv4 08/13] ARM: spear: convert to MULTI_IRQ_HANDLER
Date: Fri, 4 Nov 2011 01:10:05 +0000 [thread overview]
Message-ID: <1320369010-23428-9-git-send-email-jamie@jamieiles.com> (raw)
In-Reply-To: <1320369010-23428-1-git-send-email-jamie-wmLquQDDieKakBO8gow8eQ@public.gmane.org>
Now that there is a generic IRQ handler for multiple VIC devices use it
for spear to help building multi platform kernels.
Cc: Viresh Kumar <viresh.kumar-qxv4g6HH51o@public.gmane.org>
Cc: Rajeev Kumar <rajeev-dlh.kumar-qxv4g6HH51o@public.gmane.org>
Signed-off-by: Jamie Iles <jamie-wmLquQDDieKakBO8gow8eQ@public.gmane.org>
---
arch/arm/Kconfig | 1 +
arch/arm/mach-spear3xx/include/mach/entry-macro.S | 27 ---------------
arch/arm/mach-spear3xx/spear300_evb.c | 2 +
arch/arm/mach-spear3xx/spear310_evb.c | 2 +
arch/arm/mach-spear3xx/spear320_evb.c | 2 +
arch/arm/mach-spear6xx/include/mach/entry-macro.S | 36 ---------------------
arch/arm/mach-spear6xx/spear600_evb.c | 2 +
7 files changed, 9 insertions(+), 63 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 32929ef..46d0319 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -956,6 +956,7 @@ config PLAT_SPEAR
select CLKSRC_MMIO
select GENERIC_CLOCKEVENTS
select HAVE_CLK
+ select MULTI_IRQ_HANDLER
help
Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
diff --git a/arch/arm/mach-spear3xx/include/mach/entry-macro.S b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
index 53da422..de3bb41 100644
--- a/arch/arm/mach-spear3xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear3xx/include/mach/entry-macro.S
@@ -11,35 +11,8 @@
* warranty of any kind, whether express or implied.
*/
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \base, =VA_SPEAR3XX_ML1_VIC_BASE
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
- teq \irqstat, #0
- beq 1001f @ this will set/reset
- @ zero register
- /*
- * Following code will find bit position of least significang
- * bit set in irqstat, using following equation
- * least significant bit set in n = (n & ~(n-1))
- */
- sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
- mvn \tmp, \tmp @ tmp = ~tmp
- and \irqstat, \irqstat, \tmp @ irqstat &= tmp
- /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
- clz \tmp, \irqstat @ tmp = leading zeros
- rsb \irqnr, \tmp, #0x1F @ irqnr = 32 - tmp - 1
-
-1001: /* EQ will be set if no irqs pending */
- .endm
diff --git a/arch/arm/mach-spear3xx/spear300_evb.c b/arch/arm/mach-spear3xx/spear300_evb.c
index a5ff98e..61068ba 100644
--- a/arch/arm/mach-spear3xx/spear300_evb.c
+++ b/arch/arm/mach-spear3xx/spear300_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -67,6 +68,7 @@ MACHINE_START(SPEAR300, "ST-SPEAR300-EVB")
.atag_offset = 0x100,
.map_io = spear3xx_map_io,
.init_irq = spear3xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear3xx_timer,
.init_machine = spear300_evb_init,
MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear310_evb.c b/arch/arm/mach-spear3xx/spear310_evb.c
index 45d180d..7903abe 100644
--- a/arch/arm/mach-spear3xx/spear310_evb.c
+++ b/arch/arm/mach-spear3xx/spear310_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -73,6 +74,7 @@ MACHINE_START(SPEAR310, "ST-SPEAR310-EVB")
.atag_offset = 0x100,
.map_io = spear3xx_map_io,
.init_irq = spear3xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear3xx_timer,
.init_machine = spear310_evb_init,
MACHINE_END
diff --git a/arch/arm/mach-spear3xx/spear320_evb.c b/arch/arm/mach-spear3xx/spear320_evb.c
index 2287984..e9751f9 100644
--- a/arch/arm/mach-spear3xx/spear320_evb.c
+++ b/arch/arm/mach-spear3xx/spear320_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -71,6 +72,7 @@ MACHINE_START(SPEAR320, "ST-SPEAR320-EVB")
.atag_offset = 0x100,
.map_io = spear3xx_map_io,
.init_irq = spear3xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear3xx_timer,
.init_machine = spear320_evb_init,
MACHINE_END
diff --git a/arch/arm/mach-spear6xx/include/mach/entry-macro.S b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
index 8a0b0ed..d490a91 100644
--- a/arch/arm/mach-spear6xx/include/mach/entry-macro.S
+++ b/arch/arm/mach-spear6xx/include/mach/entry-macro.S
@@ -11,44 +11,8 @@
* warranty of any kind, whether express or implied.
*/
-#include <asm/hardware/vic.h>
-#include <mach/hardware.h>
-
.macro disable_fiq
.endm
- .macro get_irqnr_preamble, base, tmp
- .endm
-
.macro arch_ret_to_user, tmp1, tmp2
.endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \base, =VA_SPEAR6XX_CPU_VIC_PRI_BASE
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
- mov \irqnr, #0
- teq \irqstat, #0
- bne 1001f
- ldr \base, =VA_SPEAR6XX_CPU_VIC_SEC_BASE
- ldr \irqstat, [\base, #VIC_IRQ_STATUS] @ get status
- teq \irqstat, #0
- beq 1002f @ this will set/reset
- @ zero register
- mov \irqnr, #32
-1001:
- /*
- * Following code will find bit position of least significang
- * bit set in irqstat, using following equation
- * least significant bit set in n = (n & ~(n-1))
- */
- sub \tmp, \irqstat, #1 @ tmp = irqstat - 1
- mvn \tmp, \tmp @ tmp = ~tmp
- and \irqstat, \irqstat, \tmp @ irqstat &= tmp
- /* Now, irqstat is = bit no. of 1st bit set in vic irq status */
- clz \tmp, \irqstat @ tmp = leading zeros
-
- rsb \tmp, \tmp, #0x1F @ tmp = 32 - tmp - 1
- add \irqnr, \irqnr, \tmp
-
-1002: /* EQ will be set if no irqs pending */
- .endm
diff --git a/arch/arm/mach-spear6xx/spear600_evb.c b/arch/arm/mach-spear6xx/spear600_evb.c
index 8238fe3..ff139ed 100644
--- a/arch/arm/mach-spear6xx/spear600_evb.c
+++ b/arch/arm/mach-spear6xx/spear600_evb.c
@@ -11,6 +11,7 @@
* warranty of any kind, whether express or implied.
*/
+#include <asm/hardware/vic.h>
#include <asm/mach/arch.h>
#include <asm/mach-types.h>
#include <mach/generic.h>
@@ -46,6 +47,7 @@ MACHINE_START(SPEAR600, "ST-SPEAR600-EVB")
.atag_offset = 0x100,
.map_io = spear6xx_map_io,
.init_irq = spear6xx_init_irq,
+ .handle_irq = vic_handle_irq,
.timer = &spear6xx_timer,
.init_machine = spear600_evb_init,
MACHINE_END
--
1.7.5.4
next prev parent reply other threads:[~2011-11-04 1:10 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-11-04 1:09 [PATCHv4 00/13] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
[not found] ` <1320369010-23428-1-git-send-email-jamie-wmLquQDDieKakBO8gow8eQ@public.gmane.org>
2011-11-04 1:09 ` [PATCHv4 01/13] ARM: Make global handler and CONFIG_MULTI_IRQ_HANDLER mutually exclusive Jamie Iles
2011-11-04 1:09 ` [PATCHv4 02/13] ARM: vic: device tree binding Jamie Iles
[not found] ` <1320369010-23428-3-git-send-email-jamie-wmLquQDDieKakBO8gow8eQ@public.gmane.org>
2011-11-10 14:46 ` Jamie Iles
2011-11-10 15:20 ` Marc Zyngier
2011-11-10 16:28 ` Jamie Iles
2011-11-04 1:10 ` [PATCHv4 03/13] ARM: vic: MULTI_IRQ_HANDLER handler Jamie Iles
2011-11-04 1:10 ` [PATCHv4 04/13] ARM: ep93xx: convert to MULTI_IRQ_HANDLER Jamie Iles
2011-11-04 1:10 ` [PATCHv4 05/13] ARM: netx: " Jamie Iles
2011-11-04 1:10 ` [PATCHv4 06/13] ARM: nomadik: " Jamie Iles
2011-11-04 1:10 ` [PATCHv4 07/13] ARM: s3c64xx: " Jamie Iles
2011-11-09 11:25 ` Thomas Abraham
2011-11-09 11:34 ` Thomas Abraham
2011-11-09 11:54 ` Jamie Iles
2011-11-09 12:30 ` Thomas Abraham
2011-11-10 14:53 ` Jamie Iles
2011-11-10 16:19 ` Thomas Abraham
2011-11-09 14:50 ` Rob Herring
2011-11-09 14:55 ` Jamie Iles
2011-11-04 1:10 ` Jamie Iles [this message]
2011-11-09 10:15 ` [PATCHv4 08/13] ARM: spear: " Viresh Kumar
2011-11-04 1:10 ` [PATCHv4 09/13] ARM: u300: " Jamie Iles
2011-11-04 1:10 ` [PATCHv4 10/13] ARM: versatile: " Jamie Iles
2011-11-09 10:25 ` Marc Zyngier
2011-11-04 1:10 ` [PATCHv4 11/13] ARM: samsung: " Jamie Iles
2011-11-04 1:10 ` [PATCHv4 12/13] ARM: picoxcell: " Jamie Iles
2011-11-04 1:10 ` [PATCHv4 13/13] ARM: VIC: remove non MULTI_IRQ_HANDLER support Jamie Iles
2011-11-09 10:01 ` [PATCHv4 00/13] VIC DT binding and MULTI_IRQ_HANDLER Jamie Iles
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