From: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
To: U-Boot Mailing List <u-boot-0aAXYlwwYIKGBzrmiIFOJg@public.gmane.org>
Cc: Albert ARIBAUD
<albert.u.boot-LhW3hqR2+23R7s880joybQ@public.gmane.org>,
Devicetree Discuss
<devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org>,
Jerry Van Baren
<vanbaren-He//nVnquyzQT0dZR+AlfA@public.gmane.org>,
Tom Warren <twarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Subject: [PATCH v5 09/18] tegra: fdt: Add clock bindings
Date: Tue, 24 Jan 2012 15:21:03 -0800 [thread overview]
Message-ID: <1327447272-30182-10-git-send-email-sjg@chromium.org> (raw)
In-Reply-To: <1327447272-30182-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
This adds a basic binding for the oscillator and peripheral clocks. The
second cell is the clock number, defined as the bit number within the clock
enable register if the peripheral clock.
This uses the RFC clock bindings from Grant Likely so may change later:
https://lkml.org/lkml/2011/12/12/498
Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
Changes in v4:
- Add clock bindings for Tegra2x
arch/arm/dts/tegra20.dtsi | 27 ++++++++++++
doc/device-tree-bindings/clock/tegra-periphclk | 51 ++++++++++++++++++++++++
2 files changed, 78 insertions(+), 0 deletions(-)
create mode 100644 doc/device-tree-bindings/clock/tegra-periphclk
diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index a9a98ea..ec75747 100644
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -4,6 +4,33 @@
compatible = "nvidia,tegra20";
interrupt-parent = <&intc>;
+ clocks = <&osc_clk>;
+ clock-names = "osc_clk";
+ clock-ranges;
+
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* The frequency of this clock is board-specific */
+ osc_clk: oscclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+
+ /*
+ * This node provides clocks to all peripherals. We don't
+ * enumerate the clock names for now since there are no
+ * users of this information.
+ */
+ periph_clk: periphclk {
+ compatible = "tegra,periphclk";
+ #clock-cells = <1>;
+ clocks = <&osc_clk>;
+ reg = <0x60006000 400>;
+ };
+ };
+
intc: interrupt-controller@50041000 {
compatible = "nvidia,tegra20-gic";
interrupt-controller;
diff --git a/doc/device-tree-bindings/clock/tegra-periphclk b/doc/device-tree-bindings/clock/tegra-periphclk
new file mode 100644
index 0000000..8d21e4d
--- /dev/null
+++ b/doc/device-tree-bindings/clock/tegra-periphclk
@@ -0,0 +1,51 @@
+Clock controllers
+
+(there isn't yet a binding in Linux, so this describes what is in U-Boot)
+
+The device node for a clock controller is as described in the document
+"Open Firmware Recommended Practice : Universal Serial Bus" with the
+following modifications and additions :
+
+This is based on Grant Likely's proposed patch for clock bindings.
+
+Required properties :
+ - compatible : Should be "tegra,periphclk" for peripheral clock controller
+ - clocks : Should contain a single phandle pointing to the oscillator clock
+
+Peripherals which refer to a clock should have a property called "clocks" with
+two cells: phandle of the peripheral clock and the clock ID number (which
+is the bit number in the peripheral clock controller enable register numbered
+from 0).
+
+Example:
+
+clocks {
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ /* The frequency of this clock is board-specific */
+ osc_clk: oscclk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ };
+
+ /*
+ * This node provides clocks to all peripherals. We don't
+ * enumerate the clock names for now since there are no
+ * users of this information.
+ */
+ periph_clk: periphclk {
+ compatible = "tegra,periphclk";
+ #clock-cells = <1>;
+ clocks = <&osc_clk>;
+ reg = <0x60006000 400>;
+ };
+};
+
+usb@c5004000 {
+ compatible = "nvidia,tegra20-ehci", "usb-ehci";
+ reg = <0xc5004000 0x4000>;
+ interrupts = < 53 >;
+ phy_type = "ulpi";
+ clocks = <&periph_clk 58>; // PERIPH_ID_USB2
+};
--
1.7.7.3
next prev parent reply other threads:[~2012-01-24 23:21 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <1327447272-30182-1-git-send-email-sjg@chromium.org>
[not found] ` <1327447272-30182-1-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2012-01-24 23:20 ` [PATCH v5 01/18] fdt: Add basic support for decoding GPIO definitions Simon Glass
2012-01-24 23:20 ` [PATCH v5 02/18] arm: fdt: Ensure that an embedded fdt is word-aligned Simon Glass
2012-01-24 23:20 ` [PATCH v5 03/18] arm: fdt: Add skeleton device tree file from kernel Simon Glass
2012-01-24 23:20 ` [PATCH v5 04/18] tegra: fdt: Add Tegra2x " Simon Glass
2012-01-24 23:20 ` [PATCH v5 05/18] tegra: fdt: Add device tree file for Tegra2 Seaboard " Simon Glass
2012-01-24 23:21 ` [PATCH v5 06/18] fdt: Add staging area for device tree binding documentation Simon Glass
2012-01-24 23:21 ` [PATCH v5 07/18] fdt: Add tegra-usb bindings file from linux Simon Glass
2012-01-24 23:21 ` [PATCH v5 08/18] tegra: fdt: Add additional USB binding Simon Glass
[not found] ` <1327447272-30182-9-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2012-02-02 21:55 ` Stephen Warren
[not found] ` <4F2B063B.2020403-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2012-02-03 16:58 ` Simon Glass
2012-01-24 23:21 ` Simon Glass [this message]
2012-01-24 23:21 ` [PATCH v5 10/18] tegra: usb: fdt: Add additional device tree definitions for USB ports Simon Glass
[not found] ` <1327447272-30182-11-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2012-02-02 22:07 ` Stephen Warren
2012-02-03 17:04 ` Simon Glass
2012-01-24 23:21 ` [PATCH v5 11/18] tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard Simon Glass
2012-01-24 23:21 ` [PATCH v5 13/18] fdt: Add function to return peripheral/clock ID Simon Glass
2012-01-24 23:21 ` [PATCH v5 18/18] tegra: fdt: Enable FDT support for Seaboard Simon Glass
[not found] ` <1327447272-30182-19-git-send-email-sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2012-02-02 22:17 ` Stephen Warren
2012-02-03 17:05 ` Simon Glass
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