[PATCH v7 09/20] tegra: fdt: Add additional USB binding

[PATCH v7 09/20] tegra: fdt: Add additional USB binding

[Simon Glass]

This adds a property to indicate a port which can switch between host and device
mode.

Signed-off-by: Simon Glass <sjg@chromium.org>
---
Changes in v5:
- Add dr_mode property to control host/device/otg mode
- Add nvidia,has-legacy-mode property per review comments

Changes in v7:
- Fix space indent nit

 doc/device-tree-bindings/usb/tegra-usb.txt |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/doc/device-tree-bindings/usb/tegra-usb.txt b/doc/device-tree-bindings/usb/tegra-usb.txt
index 035d63d..5282d44 100644
--- a/doc/device-tree-bindings/usb/tegra-usb.txt
+++ b/doc/device-tree-bindings/usb/tegra-usb.txt
@@ -11,3 +11,15 @@ Required properties :
  - phy_type : Should be one of "ulpi" or "utmi".
  - nvidia,vbus-gpio : If present, specifies a gpio that needs to be
    activated for the bus to be powered.
+
+Optional properties:
+  - dr_mode : dual role mode. Indicates the working mode for
+    nvidia,tegra20-ehci compatible controllers.  Can be "host", "peripheral",
+    or "otg".  Default to "host" if not defined for backward compatibility.
+      host means this is a host controller
+      peripheral means it is device controller
+      otg means it can operate as either ("on the go")
+  - nvidia,has-legacy-mode : boolean indicates whether this controller can
+    operate in legacy mode (as APX 2500 / 2600). In legacy mode some
+    registers are accessed through the APB_MISC base address instead of
+    the USB controller.
-- 
1.7.7.3

[PATCH v7 11/20] tegra: fdt: Add clock bindings for Tegra2 Seaboard

[Simon Glass]

Add the definition of the oscillator clock frequency and the 32KHz clock.
The latter is provided by a PMIC on I2C which we don't actually use at
present, but we expect this definition to be used in the kernel and want
to keep our .dts the same.

Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
Changes in v6:
- Add new patch to bring in clock bindings to seaboard

Changes in v7:
- Add in i2c pmic information and 32KHz clock

 board/nvidia/dts/tegra2-seaboard.dts |   27 +++++++++++++++++++++++++++
 1 files changed, 27 insertions(+), 0 deletions(-)

diff --git a/board/nvidia/dts/tegra2-seaboard.dts b/board/nvidia/dts/tegra2-seaboard.dts
index dde5d03..452679f 100644
--- a/board/nvidia/dts/tegra2-seaboard.dts
+++ b/board/nvidia/dts/tegra2-seaboard.dts
@@ -16,6 +16,33 @@
 		reg = < 0x00000000 0x40000000 >;
 	};
 
+	/* This is not used in U-Boot, but is expected to be in kernel .dts */
+	i2c@7000d000 {
+		pmic@34 {
+			compatible = "ti,tps6586x";
+			reg = <0x34>;
+
+			clk_32k: clock {
+				compatible = "fixed-clock";
+				/*
+				 * leave out for now due to CPP:
+				 * #clock-cells = <0>;
+				 */
+				clock-frequency = <32768>;
+			};
+		};
+	};
+
+	clocks {
+		osc {
+			clock-frequency = <12000000>;
+		};
+	};
+
+	clock@60006000 {
+		clocks = <&clk_32k &osc>;
+	};
+
 	serial@70006300 {
 		clock-frequency = < 216000000 >;
 	};
-- 
1.7.7.3

Re: [PATCH v7 11/20] tegra: fdt: Add clock bindings for Tegra2 Seaboard

[Stephen Warren]

Simon Glass wrote at Tuesday, February 28, 2012 11:08 AM:
> Add the definition of the oscillator clock frequency and the 32KHz clock.
> The latter is provided by a PMIC on I2C which we don't actually use at
> present, but we expect this definition to be used in the kernel and want
> to keep our .dts the same.
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>

Sigh.

I suppose I can ack this, only because it's U-Boot and not the kernel
so I care a little less about making sure it's correct.

Acked-by: Stephen Warren <swarren@nvidia.com>

Please let it be noted that I do object to:
* Using an undefined/undocumented binding for the tps6586x.
* Not including the required properties for #clock-cells in both clock
  nodes, and not including the compatible value in the osc node.

I'm aware that U-Boot's current code-base isn't influenced by these issues,
but this kind of thing is pretty much on the same level as BIOS vendors
only caring about Windows working on their HW and not other OSs.

I hope this doesn't come back and bite me, e.g. someone using this as an
example for kernel work.

-- 
nvpublic

Re: [PATCH v7 11/20] tegra: fdt: Add clock bindings for Tegra2 Seaboard

[Simon Glass]

Hi Stephen,

On Tue, Feb 28, 2012 at 10:47 AM, Stephen Warren <swarren@nvidia.com> wrote:
> Simon Glass wrote at Tuesday, February 28, 2012 11:08 AM:
>> Add the definition of the oscillator clock frequency and the 32KHz clock.
>> The latter is provided by a PMIC on I2C which we don't actually use at
>> present, but we expect this definition to be used in the kernel and want
>> to keep our .dts the same.
>>
>> Signed-off-by: Simon Glass <sjg@chromium.org>
>
> Sigh.
>
> I suppose I can ack this, only because it's U-Boot and not the kernel
> so I care a little less about making sure it's correct.
>
> Acked-by: Stephen Warren <swarren@nvidia.com>
>
> Please let it be noted that I do object to:
> * Using an undefined/undocumented binding for the tps6586x.
> * Not including the required properties for #clock-cells in both clock
>  nodes, and not including the compatible value in the osc node.

Once you have this in Linux please point me to the commit and I will
do an update.

Re the # issue I will take a look in the next few weeks.

Regards,
Simon

>
> I'm aware that U-Boot's current code-base isn't influenced by these issues,
> but this kind of thing is pretty much on the same level as BIOS vendors
> only caring about Windows working on their HW and not other OSs.
>
> I hope this doesn't come back and bite me, e.g. someone using this as an
> example for kernel work.
>
> --
> nvpublic
>

[PATCH v7 15/20] tegra: fdt: Add function to return peripheral/clock ID

[Simon Glass]

A common requirement is to find the clock ID for a peripheral. This is the
second cell of the 'clocks' property (the first being the phandle itself).

Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
---
Changes in v4:
- Add fdtdec function to return peripheral ID

Changes in v6:
- Move peripheral decode function into Tegra's clock.c

Changes in v7:
- Add belts and braces checking of device tree clock ID

 arch/arm/cpu/armv7/tegra2/clock.c        |   56 ++++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-tegra2/clock.h |   13 +++++++
 2 files changed, 69 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/tegra2/clock.c b/arch/arm/cpu/armv7/tegra2/clock.c
index 11d2346..959322b 100644
--- a/arch/arm/cpu/armv7/tegra2/clock.c
+++ b/arch/arm/cpu/armv7/tegra2/clock.c
@@ -28,6 +28,7 @@
 #include <asm/arch/tegra2.h>
 #include <common.h>
 #include <div64.h>
+#include <fdtdec.h>
 
 /*
  * This is our record of the current clock rate of each clock. We don't
@@ -918,6 +919,61 @@ void clock_ll_start_uart(enum periph_id periph_id)
 	reset_set_enable(periph_id, 0);
 }
 
+/*
+ * Convert a device tree clock ID to our peripheral ID. They are mostly
+ * the same but we are very cautious so we check that a valid clock ID is
+ * provided.
+ *
+ * @param clk_id	Clock ID according to tegra2 device tree binding
+ * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
+ */
+static enum periph_id clk_id_to_periph_id(int clk_id)
+{
+	if (clk_id > 95)
+		return PERIPH_ID_NONE;
+
+	switch (clk_id) {
+	case 1:
+	case 2:
+	case 7:
+	case 10:
+	case 20:
+	case 30:
+	case 35:
+	case 49:
+	case 56:
+	case 74:
+	case 76:
+	case 77:
+	case 78:
+	case 79:
+	case 80:
+	case 81:
+	case 82:
+	case 83:
+	case 91:
+	case 95:
+		return PERIPH_ID_NONE;
+	default:
+		return clk_id;
+	}
+}
+
+int clock_decode_periph_id(const void *blob, int node)
+{
+	enum periph_id id;
+	u32 cell[2];
+	int err;
+
+	err = fdtdec_get_int_array(blob, node, "clocks", cell,
+				   ARRAY_SIZE(cell));
+	if (err)
+		return -1;
+	id = clk_id_to_periph_id(cell[1]);
+	assert(clock_periph_id_isvalid(id));
+	return id;
+}
+
 int clock_verify(void)
 {
 	struct clk_pll *pll = get_pll(CLOCK_ID_PERIPH);
diff --git a/arch/arm/include/asm/arch-tegra2/clock.h b/arch/arm/include/asm/arch-tegra2/clock.h
index 080ef18..6b12c76 100644
--- a/arch/arm/include/asm/arch-tegra2/clock.h
+++ b/arch/arm/include/asm/arch-tegra2/clock.h
@@ -177,6 +177,7 @@ enum periph_id {
 	PERIPH_ID_CRAM2,
 
 	PERIPH_ID_COUNT,
+	PERIPH_ID_NONE = -1,
 };
 
 /* Converts a clock number to a clock register: 0=L, 1=H, 2=U */
@@ -355,6 +356,18 @@ unsigned clock_get_rate(enum clock_id clkid);
  */
 void clock_ll_start_uart(enum periph_id periph_id);
 
+/**
+ * Decode a peripheral ID from a device tree node.
+ *
+ * This works by looking up the peripheral's 'clocks' node and reading out
+ * the second cell, which is the clock number / peripheral ID.
+ *
+ * @param blob		FDT blob to use
+ * @param node		Node to look at
+ * @return peripheral ID, or PERIPH_ID_NONE if none
+ */
+enum periph_id clock_decode_periph_id(const void *blob, int node);
+
 /*
  * Checks that clocks are valid and prints a warning if not
  *
-- 
1.7.7.3

RE: [PATCH v7 15/20] tegra: fdt: Add function to return peripheral/clock ID

[Stephen Warren]

Simon Glass wrote at Tuesday, February 28, 2012 11:08 AM:
> A common requirement is to find the clock ID for a peripheral. This is the
> second cell of the 'clocks' property (the first being the phandle itself).
> 
> Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

-- 
nvpublic

RE: [PATCH v7 15/20] tegra: fdt: Add function to return peripheral/clock ID

[Tom Warren]

Simon,

> -----Original Message-----
> From: Simon Glass [mailto:sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org]
> Sent: Tuesday, February 28, 2012 11:08 AM
> To: U-Boot Mailing List
> Cc: Tom Warren; Stephen Warren; Simon Glass; linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org;
> Jerry Van Baren; Devicetree Discuss
> Subject: [PATCH v7 15/20] tegra: fdt: Add function to return
> peripheral/clock ID
> 
> A common requirement is to find the clock ID for a peripheral. This is the
> second cell of the 'clocks' property (the first being the phandle itself).
> 
> Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
> ---
> Changes in v4:
> - Add fdtdec function to return peripheral ID
> 
> Changes in v6:
> - Move peripheral decode function into Tegra's clock.c
> 
> Changes in v7:
> - Add belts and braces checking of device tree clock ID
> 
>  arch/arm/cpu/armv7/tegra2/clock.c        |   56
> ++++++++++++++++++++++++++++++
>  arch/arm/include/asm/arch-tegra2/clock.h |   13 +++++++
>  2 files changed, 69 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/tegra2/clock.c
> b/arch/arm/cpu/armv7/tegra2/clock.c
> index 11d2346..959322b 100644
> --- a/arch/arm/cpu/armv7/tegra2/clock.c
> +++ b/arch/arm/cpu/armv7/tegra2/clock.c
> @@ -28,6 +28,7 @@
>  #include <asm/arch/tegra2.h>
>  #include <common.h>
>  #include <div64.h>
> +#include <fdtdec.h>
> 
>  /*
>   * This is our record of the current clock rate of each clock. We don't @@
> -918,6 +919,61 @@ void clock_ll_start_uart(enum periph_id periph_id)
>  	reset_set_enable(periph_id, 0);
>  }
> 
> +/*
> + * Convert a device tree clock ID to our peripheral ID. They are mostly
> + * the same but we are very cautious so we check that a valid clock ID
> +is
> + * provided.
> + *
> + * @param clk_id	Clock ID according to tegra2 device tree binding
> + * @return peripheral ID, or PERIPH_ID_NONE if the clock ID is invalid
> +*/ static enum periph_id clk_id_to_periph_id(int clk_id) {
> +	if (clk_id > 95)
> +		return PERIPH_ID_NONE;
> +
> +	switch (clk_id) {
> +	case 1:
> +	case 2:
> +	case 7:
> +	case 10:
> +	case 20:
> +	case 30:
> +	case 35:
> +	case 49:
> +	case 56:
> +	case 74:
> +	case 76:
> +	case 77:
> +	case 78:
> +	case 79:
> +	case 80:
> +	case 81:
> +	case 82:
> +	case 83:
> +	case 91:
> +	case 95:
> +		return PERIPH_ID_NONE;
> +	default:
> +		return clk_id;
> +	}
> +}
> +
> +int clock_decode_periph_id(const void *blob, int node) {
> +	enum periph_id id;
> +	u32 cell[2];
> +	int err;
> +
> +	err = fdtdec_get_int_array(blob, node, "clocks", cell,
> +				   ARRAY_SIZE(cell));

This call to fdtdec_get_int_array() breaks Harmony and Ventana builds, since they're not yet DT-enabled (CONFIG_OF_CONTROL isn't #defined).

I'd fix this myself, but I'm not sure what the correct fix is to keep Harmony/Ventana building & booting.

Please fix, test on all Tegra2 builds (MAKEALL -s tegra2) and resend. Thanks.

Tom

> +	if (err)
> +		return -1;
> +	id = clk_id_to_periph_id(cell[1]);
> +	assert(clock_periph_id_isvalid(id));
> +	return id;
> +}
> +
>  int clock_verify(void)
>  {
>  	struct clk_pll *pll = get_pll(CLOCK_ID_PERIPH); diff --git
> a/arch/arm/include/asm/arch-tegra2/clock.h b/arch/arm/include/asm/arch-
> tegra2/clock.h
> index 080ef18..6b12c76 100644
> --- a/arch/arm/include/asm/arch-tegra2/clock.h
> +++ b/arch/arm/include/asm/arch-tegra2/clock.h
> @@ -177,6 +177,7 @@ enum periph_id {
>  	PERIPH_ID_CRAM2,
> 
>  	PERIPH_ID_COUNT,
> +	PERIPH_ID_NONE = -1,
>  };
> 
>  /* Converts a clock number to a clock register: 0=L, 1=H, 2=U */ @@ -355,6
> +356,18 @@ unsigned clock_get_rate(enum clock_id clkid);
>   */
>  void clock_ll_start_uart(enum periph_id periph_id);
> 
> +/**
> + * Decode a peripheral ID from a device tree node.
> + *
> + * This works by looking up the peripheral's 'clocks' node and reading
> +out
> + * the second cell, which is the clock number / peripheral ID.
> + *
> + * @param blob		FDT blob to use
> + * @param node		Node to look at
> + * @return peripheral ID, or PERIPH_ID_NONE if none  */ enum periph_id
> +clock_decode_periph_id(const void *blob, int node);
> +
>  /*
>   * Checks that clocks are valid and prints a warning if not
>   *
> --
> 1.7.7.3
-- 
nvpublic

RE: [PATCH v7 09/20] tegra: fdt: Add additional USB binding

[Stephen Warren]

Simon Glass wrote at Tuesday, February 28, 2012 11:08 AM:
> This adds a property to indicate a port which can switch between host and device
> mode.
> 
> Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>

Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>

(I can't recall; did this patch make it into the kernel too?)

-- 
nvpublic

Re: [PATCH v7 09/20] tegra: fdt: Add additional USB binding

[Simon Glass]

Hi,

On Tue, Feb 28, 2012 at 10:42 AM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
> Simon Glass wrote at Tuesday, February 28, 2012 11:08 AM:
>> This adds a property to indicate a port which can switch between host and device
>> mode.
>>
>> Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>
> Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> (I can't recall; did this patch make it into the kernel too?)

Not that I know of.

Regards,
Simon

>
> --
> nvpublic
>

Re: [PATCH v7 09/20] tegra: fdt: Add additional USB binding

[Stephen Warren]

Simon Glass wrote at Tuesday, February 28, 2012 11:49 AM:
> On Tue, Feb 28, 2012 at 10:42 AM, Stephen Warren <swarren@nvidia.com> wrote:
> > Simon Glass wrote at Tuesday, February 28, 2012 11:08 AM:
> >> This adds a property to indicate a port which can switch between host and device
> >> mode.
> >>
> >> Signed-off-by: Simon Glass <sjg@chromium.org>
> >
> > Acked-by: Stephen Warren <swarren@nvidia.com>
> >
> > (I can't recall; did this patch make it into the kernel too?)
> 
> Not that I know of.

OK, it must have been another change that you pushed there.

Please push this one to the kernel too, thanks.

-- 
nvpublic

Re: [PATCH v7 09/20] tegra: fdt: Add additional USB binding

[Simon Glass]

Hi Stephen,

On Tue, Feb 28, 2012 at 10:49 AM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
> Simon Glass wrote at Tuesday, February 28, 2012 11:49 AM:
>> On Tue, Feb 28, 2012 at 10:42 AM, Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> wrote:
>> > Simon Glass wrote at Tuesday, February 28, 2012 11:08 AM:
>> >> This adds a property to indicate a port which can switch between host and device
>> >> mode.
>> >>
>> >> Signed-off-by: Simon Glass <sjg-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
>> >
>> > Acked-by: Stephen Warren <swarren-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>> >
>> > (I can't recall; did this patch make it into the kernel too?)
>>
>> Not that I know of.
>
> OK, it must have been another change that you pushed there.
>
> Please push this one to the kernel too, thanks.

OK, I sent a ping on that thread so let's see if we get a response.

It could be that it has been committed somewhere but no one responded
on the mailing list.

Regards,
Simon

>
> --
> nvpublic
>