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From: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
To: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>,
	Sergei Shtylyov
	<sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>,
	devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org,
	Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>,
	Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Subject: [PATCH v5 1/7] ARM: davinci, cp_intc: Add irq domain support
Date: Wed, 30 May 2012 12:18:57 +0200	[thread overview]
Message-ID: <1338373143-7467-2-git-send-email-hs@denx.de> (raw)
In-Reply-To: <1338373143-7467-1-git-send-email-hs-ynQEQJNshbs@public.gmane.org>

Signed-off-by: Heiko Schocher <hs-ynQEQJNshbs@public.gmane.org>
Cc: davinci-linux-open-source-VycZQUHpC/PFrsHnngEfi1aTQe2KTcn/@public.gmane.org
Cc: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Cc: Sekhar Nori <nsekhar-l0cyMroinI0@public.gmane.org>
Cc: Wolfgang Denk <wd-ynQEQJNshbs@public.gmane.org>
Cc: Sergei Shtylyov <sshtylyov-Igf4POYTYCDQT0dZR+AlfA@public.gmane.org>

---
- changes for v2:
- add comment from Grant Likely:
  - migrate the whole interrupt controller to natively use an
    irq_domain. Rebased complete patchserie to:
    git://git.secretlab.ca/git/linux-2.6.git irqdomain/next

    commit 3a806bfcde2cc3e4853f2807b2e3c94e7ccaf450
    Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
    Date:   Fri Jan 27 06:44:34 2012 -0700

    irq_domain: mostly eliminate slow-path revmap lookups
- changes for v3:
  - add comments from Sergei Shtylyov:
    - rename compatible" prop to "ti,cp_intc"
    - cp_intc_init() is now also for the of case
      the name of the init function (it calls the
      "new" __cp_intc_init() function, which was
      the "old" cp_intc_init()). Throught this
      rework the changes for OF is better visible.
      As the OF case uses the irq_domain rework from
      Grant Likely, maybe the none OF case can use
      this also, but this should be tested on a hw ...
  - rebased to:
    git://git.secretlab.ca/git/linux-2.6.git irqdomain/next

    commit 280ad7fda5f95211857fda38960f2b6fdf6edd3e
    Author: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
    Date:   Fri Feb 24 14:58:54 2012 -0700

    mfd: twl-core: Add IRQ_DOMAIN dependency

- changes for v4
  - split patch in 2 patches, one for irq_domain adaption
    one for DT enhancement, as Nori Sekhar suggested
  - add comment from Grant Likely for the DT part:
    remove if/else clause, not needed.
    Make use of DT runtime configurable

- changes for v5:
  add comments from Sergei Shtylyov:
  - s/intc/cp_intc in commit subject
  - Codingstyle fixes
  add comment from Grant Likely:
  - call irq_domain_add also in the non DT case
    (was fixed in v4)
  - switched from using d->irq to d->hwirq for the hardware
    irq number in irq_chip hooks

 arch/arm/mach-davinci/cp_intc.c |   63 ++++++++++++++++++++++++++++++--------
 1 files changed, 49 insertions(+), 14 deletions(-)

diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
index f83152d..45d5256 100644
--- a/arch/arm/mach-davinci/cp_intc.c
+++ b/arch/arm/mach-davinci/cp_intc.c
@@ -9,8 +9,10 @@
  * kind, whether express or implied.
  */
 
+#include <linux/export.h>
 #include <linux/init.h>
 #include <linux/irq.h>
+#include <linux/irqdomain.h>
 #include <linux/io.h>
 
 #include <mach/common.h>
@@ -28,7 +30,7 @@ static inline void cp_intc_write(unsigned long value, unsigned offset)
 
 static void cp_intc_ack_irq(struct irq_data *d)
 {
-	cp_intc_write(d->irq, CP_INTC_SYS_STAT_IDX_CLR);
+	cp_intc_write(d->hwirq, CP_INTC_SYS_STAT_IDX_CLR);
 }
 
 /* Disable interrupt */
@@ -36,20 +38,20 @@ static void cp_intc_mask_irq(struct irq_data *d)
 {
 	/* XXX don't know why we need to disable nIRQ here... */
 	cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR);
-	cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_CLR);
+	cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_CLR);
 	cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
 }
 
 /* Enable interrupt */
 static void cp_intc_unmask_irq(struct irq_data *d)
 {
-	cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_SET);
+	cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_SET);
 }
 
 static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
 {
-	unsigned reg		= BIT_WORD(d->irq);
-	unsigned mask		= BIT_MASK(d->irq);
+	unsigned reg		= BIT_WORD(d->hwirq);
+	unsigned mask		= BIT_MASK(d->hwirq);
 	unsigned polarity	= cp_intc_read(CP_INTC_SYS_POLARITY(reg));
 	unsigned type		= cp_intc_read(CP_INTC_SYS_TYPE(reg));
 
@@ -99,18 +101,36 @@ static struct irq_chip cp_intc_irq_chip = {
 	.irq_set_wake	= cp_intc_set_wake,
 };
 
-void __init cp_intc_init(void)
+static struct irq_domain *cp_intc_domain;
+
+static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
+			  irq_hw_number_t hw)
+{
+	pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
+
+	irq_set_chip(virq, &cp_intc_irq_chip);
+	set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
+	irq_set_handler(virq, handle_edge_irq);
+	return 0;
+}
+
+static const struct irq_domain_ops cp_intc_host_ops = {
+	.map = cp_intc_host_map,
+	.xlate = irq_domain_xlate_onetwocell,
+};
+
+int __init __cp_intc_init(struct device_node *node)
 {
-	unsigned long num_irq	= davinci_soc_info.intc_irq_num;
+	u32 num_irq		= davinci_soc_info.intc_irq_num;
 	u8 *irq_prio		= davinci_soc_info.intc_irq_prios;
 	u32 *host_map		= davinci_soc_info.intc_host_map;
 	unsigned num_reg	= BITS_TO_LONGS(num_irq);
-	int i;
+	int i, irq_base;
 
 	davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
 	davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
 	if (WARN_ON(!davinci_intc_base))
-		return;
+		return -EINVAL;
 
 	cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
 
@@ -165,13 +185,28 @@ void __init cp_intc_init(void)
 		for (i = 0; host_map[i] != -1; i++)
 			cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
 
-	/* Set up genirq dispatching for cp_intc */
-	for (i = 0; i < num_irq; i++) {
-		irq_set_chip(i, &cp_intc_irq_chip);
-		set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
-		irq_set_handler(i, handle_edge_irq);
+	irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
+	if (irq_base < 0) {
+		pr_warn("Couldn't allocate IRQ numbers\n");
+		irq_base = 0;
+	}
+
+	/* create a legacy host */
+	cp_intc_domain = irq_domain_add_legacy(node, num_irq,
+					irq_base, 0, &cp_intc_host_ops, NULL);
+
+	if (!cp_intc_domain) {
+		pr_err("cp_intc: failed to allocate irq host!\n");
+		return -EINVAL;
 	}
 
 	/* Enable global interrupt */
 	cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
+
+	return 0;
+}
+
+void __init cp_intc_init(void)
+{
+	__cp_intc_init(NULL);
 }
-- 
1.7.7.6

  parent reply	other threads:[~2012-05-30 10:18 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-05-30 10:18 [PATCH v5 0/7] ARM: davinci: add support for the am1808 based enbw_cmc board Heiko Schocher
     [not found] ` <1338373143-7467-1-git-send-email-hs-ynQEQJNshbs@public.gmane.org>
2012-05-30 10:18   ` Heiko Schocher [this message]
     [not found]     ` <1338373143-7467-2-git-send-email-hs-ynQEQJNshbs@public.gmane.org>
2012-06-01 19:36       ` [PATCH v5 1/7] ARM: davinci, cp_intc: Add irq domain support Sekhar Nori
     [not found]         ` <4FC919C9.6070107-l0cyMroinI0@public.gmane.org>
2012-06-12 17:36           ` Sekhar Nori
     [not found]             ` <4FD77E0F.8050907-l0cyMroinI0@public.gmane.org>
2012-06-13  9:50               ` Heiko Schocher
2012-06-25 17:15       ` Sekhar Nori
     [not found]         ` <4FE89CCB.4090609-l0cyMroinI0@public.gmane.org>
2012-06-26  6:54           ` Heiko Schocher
2012-05-30 10:18   ` [PATCH v5 2/7] ARM: davinci, cp_intc: Add OF support for TI interrupt controller Heiko Schocher
     [not found]     ` <1338373143-7467-3-git-send-email-hs-ynQEQJNshbs@public.gmane.org>
2012-07-03 19:09       ` Sekhar Nori
     [not found]         ` <4FF34360.6030501-l0cyMroinI0@public.gmane.org>
2012-07-03 19:16           ` [PATCH] ARM: davinci: " Sekhar Nori
     [not found]             ` <1341342970-27535-1-git-send-email-nsekhar-l0cyMroinI0@public.gmane.org>
2012-07-05 12:43               ` Heiko Schocher
     [not found]                 ` <4FF58BDC.6060802-ynQEQJNshbs@public.gmane.org>
2012-07-06 16:53                   ` Sekhar Nori
     [not found]                     ` <4FF71822.2070908-l0cyMroinI0@public.gmane.org>
2012-07-10  8:43                       ` Sekhar Nori
2012-05-30 10:18   ` [PATCH v5 3/7] ARM: davinci: configure davinci aemif chipselects through OF Heiko Schocher
2012-05-30 10:19   ` [PATCH v5 5/7] ARM: davinci: i2c: add OF support Heiko Schocher
     [not found]     ` <1338373143-7467-6-git-send-email-hs-ynQEQJNshbs@public.gmane.org>
2012-07-13 13:57       ` Sekhar Nori
     [not found]         ` <5000294C.5070606-l0cyMroinI0@public.gmane.org>
2012-07-14  4:15           ` Heiko Schocher
     [not found]             ` <5000F276.3080301-ynQEQJNshbs@public.gmane.org>
2012-07-16 16:16               ` Sekhar Nori
2012-05-30 10:19   ` [PATCH v5 6/7] ARM: mtd: nand: davinci: add OF support for davinci nand controller Heiko Schocher
     [not found]     ` <1338373143-7467-7-git-send-email-hs-ynQEQJNshbs@public.gmane.org>
2012-07-18 17:45       ` Sekhar Nori
2012-05-30 10:19   ` [PATCH v5 7/7] ARM: davinci: add support for the am1808 based enbw_cmc board Heiko Schocher
2012-05-30 10:19 ` [PATCH v5 4/7] ARM: davinci: net: davinci_emac: add OF support Heiko Schocher
     [not found]   ` <1338373143-7467-5-git-send-email-hs-ynQEQJNshbs@public.gmane.org>
2012-07-08 14:26     ` Sekhar Nori
     [not found]       ` <4FF998A7.50309-l0cyMroinI0@public.gmane.org>
2012-07-09  8:25         ` Heiko Schocher

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