* [PATCH 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback
[not found] ` <1342440686-21860-1-git-send-email-l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
@ 2012-07-16 12:11 ` Leela Krishna Amudala
2012-07-16 12:11 ` [PATCH 2/7] ARM: EXYNOS5: add machine specific support for backlight Leela Krishna Amudala
` (5 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Leela Krishna Amudala @ 2012-07-16 12:11 UTC (permalink / raw)
To: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
This patch updates the register address offsets and adds SFR definitions
for writeback for Samsung's V8 display controller.
Signed-off-by: Leela Krishna Amudala <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/plat-samsung/include/plat/regs-fb-v4.h | 10 ++++
arch/arm/plat-samsung/include/plat/regs-fb.h | 51 +++++++++++++++++++++++
drivers/video/Kconfig | 6 +++
3 files changed, 67 insertions(+), 0 deletions(-)
diff --git a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
index 4c3647f..1639c17 100644
--- a/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb-v4.h
@@ -30,9 +30,16 @@
#define VIDCON1_FSTATUS_EVEN (1 << 15)
/* Video timing controls */
+#ifdef CONFIG_FB_EXYNOS_FIMD_V8
+#define VIDTCON0 (0x20010)
+#define VIDTCON1 (0x20014)
+#define VIDTCON3 (0x2001C)
+#else
#define VIDTCON0 (0x10)
#define VIDTCON1 (0x14)
#define VIDTCON2 (0x18)
+#define VIDTCON3 (0x1C)
+#endif
/* Window position controls */
@@ -43,9 +50,12 @@
#define VIDOSD_BASE (0x40)
#define VIDINTCON0 (0x130)
+#define VIDINTCON1 (0x134)
/* WINCONx */
+#define WINCONx_CSC_CON_EQ709 (1 << 28)
+#define WINCONx_CSC_CON_EQ601 (0 << 28)
#define WINCONx_CSCWIDTH_MASK (0x3 << 26)
#define WINCONx_CSCWIDTH_SHIFT (26)
#define WINCONx_CSCWIDTH_WIDE (0x0 << 26)
diff --git a/arch/arm/plat-samsung/include/plat/regs-fb.h b/arch/arm/plat-samsung/include/plat/regs-fb.h
index 9a78012..6d2ee16 100644
--- a/arch/arm/plat-samsung/include/plat/regs-fb.h
+++ b/arch/arm/plat-samsung/include/plat/regs-fb.h
@@ -32,12 +32,28 @@
#define VIDCON0 (0x00)
#define VIDCON0_INTERLACE (1 << 29)
+
+#ifdef CONFIG_FB_EXYNOS_FIMD_V8
+#define VIDOUT_CON (0x20000)
+#define VIDOUT_CON_VIDOUT_UP_MASK (0x1 << 16)
+#define VIDOUT_CON_VIDOUT_UP_SHIFT (16)
+#define VIDOUT_CON_VIDOUT_UP_ALWAYS (0x0 << 16)
+#define VIDOUT_CON_VIDOUT_UP_START_FRAME (0x1 << 16)
+#define VIDOUT_CON_VIDOUT_F_MASK (0x7 << 8)
+#define VIDOUT_CON_VIDOUT_F_SHIFT (8)
+#define VIDOUT_CON_VIDOUT_F_RGB (0x0 << 8)
+#define VIDOUT_CON_VIDOUT_F_I80_LDI0 (0x2 << 8)
+#define VIDOUT_CON_VIDOUT_F_I80_LDI1 (0x3 << 8)
+#define VIDOUT_CON_VIDOUT_F_WB (0x4 << 8)
+#endif
+
#define VIDCON0_VIDOUT_MASK (0x3 << 26)
#define VIDCON0_VIDOUT_SHIFT (26)
#define VIDCON0_VIDOUT_RGB (0x0 << 26)
#define VIDCON0_VIDOUT_TV (0x1 << 26)
#define VIDCON0_VIDOUT_I80_LDI0 (0x2 << 26)
#define VIDCON0_VIDOUT_I80_LDI1 (0x3 << 26)
+#define VIDCON0_VIDOUT_WB (0x4 << 26)
#define VIDCON0_L1_DATA_MASK (0x7 << 23)
#define VIDCON0_L1_DATA_SHIFT (23)
@@ -81,7 +97,13 @@
#define VIDCON0_ENVID (1 << 1)
#define VIDCON0_ENVID_F (1 << 0)
+#ifdef CONFIG_FB_EXYNOS_FIMD_V8
+#define VIDOUT_CON (0x20000)
+#define VIDCON1 (0x20004)
+#else
#define VIDCON1 (0x04)
+#endif
+
#define VIDCON1_LINECNT_MASK (0x7ff << 16)
#define VIDCON1_LINECNT_SHIFT (16)
#define VIDCON1_LINECNT_GET(_v) (((_v) >> 16) & 0x7ff)
@@ -111,6 +133,14 @@
#define VIDCON2_TVFMTSEL1_RGB (0x0 << 12)
#define VIDCON2_TVFMTSEL1_YUV422 (0x1 << 12)
#define VIDCON2_TVFMTSEL1_YUV444 (0x2 << 12)
+#define VIDCON2_TVFMTSEL1_SHIFT (12)
+#define VIDCON2_TVFMTSEL_SW (1 << 14)
+#define VIDCON2_TVFORMATSEL_YUV444 (0x2 << 12)
+
+#define VIDCON2_TVFMTSEL1_MASK (0x3 << 12)
+#define VIDCON2_TVFMTSEL1_RGB (0x0 << 12)
+#define VIDCON2_TVFMTSEL1_YUV422 (0x1 << 12)
+#define VIDCON2_TVFMTSEL1_YUV444 (0x2 << 12)
#define VIDCON2_ORGYCbCr (1 << 8)
#define VIDCON2_YUVORDCrCb (1 << 7)
@@ -165,8 +195,15 @@
#define VIDTCON1_HSPW_SHIFT (0)
#define VIDTCON1_HSPW_LIMIT (0xff)
#define VIDTCON1_HSPW(_x) ((_x) << 0)
+#define VIDCON1_VCLK_MASK (0x3 << 9)
+#define VIDCON1_VCLK_HOLD (0x0 << 9)
+#define VIDCON1_VCLK_RUN (0x1 << 9)
+#ifdef CONFIG_FB_EXYNOS_FIMD_V8
+#define VIDTCON2 (0x20018)
+#else
#define VIDTCON2 (0x18)
+#endif
#define VIDTCON2_LINEVAL_E(_x) ((((_x) & 0x800) >> 11) << 23)
#define VIDTCON2_LINEVAL_MASK (0x7ff << 11)
#define VIDTCON2_LINEVAL_SHIFT (11)
@@ -186,6 +223,9 @@
#define WINCONx_BYTSWP (1 << 17)
#define WINCONx_HAWSWP (1 << 16)
#define WINCONx_WSWP (1 << 15)
+#define WINCONx_ENLOCAL_MASK (0xf << 15)
+#define WINCONx_INRGB_RGB (0 << 13)
+#define WINCONx_INRGB_YCBCR (1 << 13)
#define WINCONx_BURSTLEN_MASK (0x3 << 9)
#define WINCONx_BURSTLEN_SHIFT (9)
#define WINCONx_BURSTLEN_16WORD (0x0 << 9)
@@ -205,6 +245,7 @@
#define WINCON0_BPPMODE_24BPP_888 (0xb << 2)
#define WINCON1_BLD_PIX (1 << 6)
+#define WINCON1_BLD_PLANE (0 << 6)
#define WINCON1_ALPHA_SEL (1 << 1)
#define WINCON1_BPPMODE_MASK (0xf << 2)
@@ -395,9 +436,19 @@
#define WPALCON_W0PAL_16BPP_A555 (0x5 << 0)
#define WPALCON_W0PAL_16BPP_565 (0x6 << 0)
+/* Clock gate mode control */
+#define REG_CLKGATE_MODE (0x1b0)
+#define REG_CLKGATE_MODE_AUTO_CLOCK_GATE (0 << 0)
+#define REG_CLKGATE_MODE_NON_CLOCK_GATE (1 << 0)
+
/* Blending equation control */
#define BLENDCON (0x260)
#define BLENDCON_NEW_MASK (1 << 0)
#define BLENDCON_NEW_8BIT_ALPHA_VALUE (1 << 0)
#define BLENDCON_NEW_4BIT_ALPHA_VALUE (0 << 0)
+/* Window alpha control */
+#define VIDW0ALPHA0 (0x200)
+#define VIDW0ALPHA1 (0x204)
+#define DPCLKCON (0x27c)
+#define DPCLKCON_ENABLE (1 << 1)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 0217f74..f81bf55 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -2053,6 +2053,12 @@ config FB_S3C
Currently the support is only for the S3C6400 and S3C6410 SoCs.
+config FB_EXYNOS_FIMD_V8
+ bool "register extensions for FIMD version 8"
+ depends on ARCH_EXYNOS5
+ ---help---
+ This uses register extensions for FIMD version 8
+
config FB_S3C_DEBUG_REGWRITE
bool "Debug register writes"
depends on FB_S3C
--
1.7.0.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 2/7] ARM: EXYNOS5: add machine specific support for backlight
[not found] ` <1342440686-21860-1-git-send-email-l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2012-07-16 12:11 ` [PATCH 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback Leela Krishna Amudala
@ 2012-07-16 12:11 ` Leela Krishna Amudala
2012-07-16 12:11 ` [PATCH 3/7] ARM: EXYNOS5: add machine specific support for LCD Leela Krishna Amudala
` (4 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Leela Krishna Amudala @ 2012-07-16 12:11 UTC (permalink / raw)
To: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
Adds machine specific support for LCD backlight for SMDK board based
on Exynos5
Signed-off-by: Leela Krishna Amudala <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/mach-exynos/Kconfig | 1 +
arch/arm/mach-exynos/mach-exynos5-dt.c | 28 ++++++++++++++++++++++++++++
2 files changed, 29 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index 498596b..a2a2940 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -412,6 +412,7 @@ config MACH_EXYNOS5_DT
select SOC_EXYNOS5250
select USE_OF
select ARM_AMBA
+ select SAMSUNG_DEV_BACKLIGHT
help
Machine support for Samsung Exynos4 machine with device tree enabled.
Select this if a fdt blob is available for the EXYNOS4 SoC based board.
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 7b1e11a..0a200fd 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -11,6 +11,8 @@
#include <linux/of_platform.h>
#include <linux/serial_core.h>
+#include <linux/pwm_backlight.h>
+#include <linux/gpio.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
@@ -18,9 +20,34 @@
#include <plat/cpu.h>
#include <plat/regs-serial.h>
+#include <plat/backlight.h>
+#include <plat/gpio-cfg.h>
#include "common.h"
+
+static int smdk5250_bl_notify(struct device *unused, int brightness)
+{
+ /* manage lcd_bl_en signal */
+ if (brightness)
+ gpio_set_value(EXYNOS5_GPX3(0), 1);
+ else
+ gpio_set_value(EXYNOS5_GPX3(0), 0);
+
+ return brightness;
+}
+
+/* LCD Backlight data */
+static struct samsung_bl_gpio_info smdk5250_bl_gpio_info = {
+ .no = EXYNOS5_GPB2(0),
+ .func = S3C_GPIO_SFN(2),
+};
+
+static struct platform_pwm_backlight_data smdk5250_bl_data = {
+ .pwm_period_ns = 1000000,
+ .notify = smdk5250_bl_notify,
+};
+
/*
* The following lookup table is used to override device names when devices
* are registered from device tree. This is temporarily added to enable
@@ -61,6 +88,7 @@ static void __init exynos5250_dt_map_io(void)
static void __init exynos5250_dt_machine_init(void)
{
+ samsung_bl_set(&smdk5250_bl_gpio_info, &smdk5250_bl_data);
of_platform_populate(NULL, of_default_bus_match_table,
exynos5250_auxdata_lookup, NULL);
}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 3/7] ARM: EXYNOS5: add machine specific support for LCD
[not found] ` <1342440686-21860-1-git-send-email-l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
2012-07-16 12:11 ` [PATCH 1/7] ARM: SAMSUNG: add additional registers and SFR definitions for writeback Leela Krishna Amudala
2012-07-16 12:11 ` [PATCH 2/7] ARM: EXYNOS5: add machine specific support for backlight Leela Krishna Amudala
@ 2012-07-16 12:11 ` Leela Krishna Amudala
2012-07-16 12:11 ` [PATCH 4/7] ARM: EXYNOS: Adding DRM platform device Leela Krishna Amudala
` (3 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Leela Krishna Amudala @ 2012-07-16 12:11 UTC (permalink / raw)
To: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
This patch adds machine specific support for LCD controller like setting power to LCD
and adding LCD platform device.
Signed-off-by: Prathyush K <prathyush.k-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Leela Krishna Amudala <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/mach-exynos/mach-exynos5-dt.c | 57 ++++++++++++++++++++++++++++++++
1 files changed, 57 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 0a200fd..652a537 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -13,6 +13,7 @@
#include <linux/serial_core.h>
#include <linux/pwm_backlight.h>
#include <linux/gpio.h>
+#include <linux/delay.h>
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
@@ -25,6 +26,8 @@
#include "common.h"
+#include <video/platform_lcd.h>
+
static int smdk5250_bl_notify(struct device *unused, int brightness)
{
@@ -48,6 +51,55 @@ static struct platform_pwm_backlight_data smdk5250_bl_data = {
.notify = smdk5250_bl_notify,
};
+static void lcd_set_power(struct plat_lcd_data *pd,
+ unsigned int power)
+{
+
+ /* reset */
+ gpio_request_one(EXYNOS5_GPX1(5), GPIOF_OUT_INIT_HIGH, "GPX1");
+
+ mdelay(20);
+ if (power) {
+ /* fire nRESET on power up */
+ gpio_set_value(EXYNOS5_GPX1(5), 0);
+ mdelay(20);
+ gpio_set_value(EXYNOS5_GPX1(5), 1);
+ mdelay(20);
+ gpio_free(EXYNOS5_GPX1(5));
+ } else {
+ /* fire nRESET on power off */
+ gpio_set_value(EXYNOS5_GPX1(5), 0);
+ mdelay(20);
+ gpio_set_value(EXYNOS5_GPX1(5), 1);
+ mdelay(20);
+ gpio_free(EXYNOS5_GPX1(5));
+ }
+ mdelay(20);
+
+ /*
+ * Request lcd_bl_en GPIO for smdk5250_bl_notify().
+ * TODO: Fix this so we are not at risk of requesting the GPIO
+ * multiple times, this should be done with device tree, and
+ * likely integrated into the plat-samsung/dev-backlight.c init.
+ */
+ gpio_request_one(EXYNOS5_GPX3(0), GPIOF_OUT_INIT_LOW, "GPX3");
+}
+
+static int smdk5250_match_fb(struct plat_lcd_data *pd, struct fb_info *info)
+{
+ /* Don't call .set_power callback while unblanking */
+ return 0;
+}
+
+static struct plat_lcd_data smdk5250_lcd_data = {
+ .set_power = lcd_set_power,
+ .match_fb = smdk5250_match_fb,
+};
+
+static struct platform_device smdk5250_lcd = {
+ .name = "platform-lcd",
+ .dev.platform_data = &smdk5250_lcd_data,
+};
/*
* The following lookup table is used to override device names when devices
* are registered from device tree. This is temporarily added to enable
@@ -80,6 +132,10 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
{},
};
+static struct platform_device *smdk5250_devices[] __initdata = {
+ &smdk5250_lcd, /* for platform_lcd device */
+};
+
static void __init exynos5250_dt_map_io(void)
{
exynos_init_io(NULL, 0);
@@ -91,6 +147,7 @@ static void __init exynos5250_dt_machine_init(void)
samsung_bl_set(&smdk5250_bl_gpio_info, &smdk5250_bl_data);
of_platform_populate(NULL, of_default_bus_match_table,
exynos5250_auxdata_lookup, NULL);
+ platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
}
static char const *exynos5250_dt_compat[] __initdata = {
--
1.7.0.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 4/7] ARM: EXYNOS: Adding DRM platform device
[not found] ` <1342440686-21860-1-git-send-email-l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
` (2 preceding siblings ...)
2012-07-16 12:11 ` [PATCH 3/7] ARM: EXYNOS5: add machine specific support for LCD Leela Krishna Amudala
@ 2012-07-16 12:11 ` Leela Krishna Amudala
2012-07-16 12:11 ` [PATCH 5/7] ARM: EXYNOS5: add device tree based discovery support for FIMD Leela Krishna Amudala
` (2 subsequent siblings)
6 siblings, 0 replies; 8+ messages in thread
From: Leela Krishna Amudala @ 2012-07-16 12:11 UTC (permalink / raw)
To: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
Add DRM platform device to machine file for exynos5.
Signed-off-by: Prathyush K <prathyush.k-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Leela Krishna Amudala <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/mach-exynos/mach-exynos5-dt.c | 27 +++++++++++++++++++++++++++
1 files changed, 27 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 652a537..a91c928 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -17,6 +17,7 @@
#include <asm/mach/arch.h>
#include <asm/hardware/gic.h>
+#include <asm/io.h>
#include <mach/map.h>
#include <plat/cpu.h>
@@ -29,6 +30,22 @@
#include <video/platform_lcd.h>
+static void exynos_fimd_gpio_setup_24bpp(void)
+{
+ unsigned int reg = 0;
+ /*
+ * Set DISP1BLK_CFG register for Display path selection
+ * FIMD of DISP1_BLK Bypass selection : DISP1BLK_CFG[15]
+ * ---------------------
+ * 0 | MIE/MDNIE
+ * 1 | FIMD : selected
+ */
+ reg = __raw_readl(S3C_VA_SYS + 0x0214);
+ reg &= ~(1 << 15); /* To save other reset values */
+ reg |= (1 << 15);
+ __raw_writel(reg, S3C_VA_SYS + 0x0214);
+}
+
static int smdk5250_bl_notify(struct device *unused, int brightness)
{
/* manage lcd_bl_en signal */
@@ -51,6 +68,14 @@ static struct platform_pwm_backlight_data smdk5250_bl_data = {
.notify = smdk5250_bl_notify,
};
+static struct platform_device exynos_drm_device = {
+ .name = "exynos-drm",
+ .dev = {
+ .dma_mask = &exynos_drm_device.dev.coherent_dma_mask,
+ .coherent_dma_mask = 0xffffffffUL,
+ }
+};
+
static void lcd_set_power(struct plat_lcd_data *pd,
unsigned int power)
{
@@ -134,6 +159,7 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
static struct platform_device *smdk5250_devices[] __initdata = {
&smdk5250_lcd, /* for platform_lcd device */
+ &exynos_drm_device,
};
static void __init exynos5250_dt_map_io(void)
@@ -147,6 +173,7 @@ static void __init exynos5250_dt_machine_init(void)
samsung_bl_set(&smdk5250_bl_gpio_info, &smdk5250_bl_data);
of_platform_populate(NULL, of_default_bus_match_table,
exynos5250_auxdata_lookup, NULL);
+ exynos_fimd_gpio_setup_24bpp();
platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
}
--
1.7.0.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 5/7] ARM: EXYNOS5: add device tree based discovery support for FIMD
[not found] ` <1342440686-21860-1-git-send-email-l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
` (3 preceding siblings ...)
2012-07-16 12:11 ` [PATCH 4/7] ARM: EXYNOS: Adding DRM platform device Leela Krishna Amudala
@ 2012-07-16 12:11 ` Leela Krishna Amudala
2012-07-16 12:11 ` [PATCH 6/7] ARM: EXYNOS5: Add the bus clock " Leela Krishna Amudala
2012-07-16 12:11 ` [PATCH 7/7] ARM: EXYNOS5: Set parent clock to fimd Leela Krishna Amudala
6 siblings, 0 replies; 8+ messages in thread
From: Leela Krishna Amudala @ 2012-07-16 12:11 UTC (permalink / raw)
To: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
From: Leela Krishna <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
This patch adds support for device tree based discovery for Samsung's
display controller. Adds DRM-Fimd plat data for smdk5250
evt1 to the corresponding dts file
Signed-off-by: Leela Krishna Amudala <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/boot/dts/exynos5250-smdk5250.dts | 16 ++++++++++++++++
arch/arm/boot/dts/exynos5250.dtsi | 7 +++++++
arch/arm/mach-exynos/include/mach/map.h | 1 +
arch/arm/mach-exynos/mach-exynos5-dt.c | 2 ++
4 files changed, 26 insertions(+), 0 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 49945cc..781f836 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -71,4 +71,20 @@
i2c@12CD0000 {
status = "disabled";
};
+
+ lcd_fimd0: lcd_panel0 {
+ lcd-htiming = <4 4 4 1280>;
+ lcd-vtiming = <4 4 4 800>;
+ supports-mipi-panel;
+ };
+
+ fimd {
+ samsung,fimd-display = <&lcd_fimd0>;
+ samsung,fimd-vidout-rgb;
+ samsung,fimd-inv-vclk;
+ samsung,fimd-frame-rate = <60>;
+ samsung,default-window = <0>;
+ samsung,fimd-win-bpp = <32>;
+ };
+
};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 4272b29..f9954fe 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -424,4 +424,11 @@
#gpio-cells = <4>;
};
};
+
+ fimd {
+ compatible = "samsung,exynos5-drm";
+ interrupt-parent = <&combiner>;
+ reg = <0x14400000 0x40000>;
+ interrupts = <18 5>, <18 4>, <18 6>;
+ };
};
diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h
index ca4aa89..731b56e 100644
--- a/arch/arm/mach-exynos/include/mach/map.h
+++ b/arch/arm/mach-exynos/include/mach/map.h
@@ -167,6 +167,7 @@
#define EXYNOS4_PA_MIPI_CSIS1 0x11890000
#define EXYNOS4_PA_FIMD0 0x11C00000
+#define EXYNOS5_PA_FIMD1 0x14400000
#define EXYNOS4_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000))
#define EXYNOS4_PA_DWMCI 0x12550000
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index a91c928..9d5bccc 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -154,6 +154,8 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA0, "dma-pl330.0", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_PDMA1, "dma-pl330.1", NULL),
OF_DEV_AUXDATA("arm,pl330", EXYNOS5_PA_MDMA1, "dma-pl330.2", NULL),
+ OF_DEV_AUXDATA("samsung,exynos5-drm", EXYNOS5_PA_FIMD1,
+ "exynos5-fb", NULL),
{},
};
--
1.7.0.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 6/7] ARM: EXYNOS5: Add the bus clock for FIMD
[not found] ` <1342440686-21860-1-git-send-email-l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
` (4 preceding siblings ...)
2012-07-16 12:11 ` [PATCH 5/7] ARM: EXYNOS5: add device tree based discovery support for FIMD Leela Krishna Amudala
@ 2012-07-16 12:11 ` Leela Krishna Amudala
2012-07-16 12:11 ` [PATCH 7/7] ARM: EXYNOS5: Set parent clock to fimd Leela Krishna Amudala
6 siblings, 0 replies; 8+ messages in thread
From: Leela Krishna Amudala @ 2012-07-16 12:11 UTC (permalink / raw)
To: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
From: Leela Krishna <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
This patch adds the bus clock for FIMD and changes
the device name for lcd clock
Signed-off-by: Leela Krishna Amudala <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/mach-exynos/clock-exynos5.c | 7 ++++++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index fefa336..61bf88d 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -629,6 +629,11 @@ static struct clk exynos5_init_clocks_off[] = {
.enable = exynos5_clk_ip_disp1_ctrl,
.ctrlbit = (1 << 3),
}, {
+ .name = "fimd",
+ .devname = "exynos5-fb",
+ .enable = exynos5_clk_ip_disp1_ctrl,
+ .ctrlbit = (1 << 0),
+ }, {
.name = "iis",
.devname = "samsung-i2s.1",
.enable = exynos5_clk_ip_peric_ctrl,
@@ -1046,7 +1051,7 @@ static struct clksrc_clk exynos5_clksrcs[] = {
}, {
.clk = {
.name = "sclk_fimd",
- .devname = "s3cfb.1",
+ .devname = "exynos5-fb",
.enable = exynos5_clksrc_mask_disp1_0_ctrl,
.ctrlbit = (1 << 0),
},
--
1.7.0.4
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH 7/7] ARM: EXYNOS5: Set parent clock to fimd
[not found] ` <1342440686-21860-1-git-send-email-l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
` (5 preceding siblings ...)
2012-07-16 12:11 ` [PATCH 6/7] ARM: EXYNOS5: Add the bus clock " Leela Krishna Amudala
@ 2012-07-16 12:11 ` Leela Krishna Amudala
6 siblings, 0 replies; 8+ messages in thread
From: Leela Krishna Amudala @ 2012-07-16 12:11 UTC (permalink / raw)
To: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
From: Leela Krishna <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
This patch sets mout_mpll_user as parent clock to fimd also
sets Fimd source clock rate to 800 MHz for MIPI LCD
Signed-off-by: Leela Krishna Amudala <l.krishna-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
arch/arm/mach-exynos/clock-exynos5.c | 25 +++++++++++++++----------
arch/arm/mach-exynos/mach-exynos5-dt.c | 11 +++++++++++
arch/arm/plat-samsung/include/plat/clock.h | 2 ++
3 files changed, 28 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 61bf88d..a0d65f6 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -1039,6 +1039,18 @@ static struct clksrc_clk exynos5_clk_sclk_mmc3 = {
.reg_div = { .reg = EXYNOS5_CLKDIV_FSYS2, .shift = 24, .size = 8 },
};
+struct clksrc_clk exynos5_clk_sclk_fimd = {
+ .clk = {
+ .name = "sclk_fimd",
+ .devname = "exynos5-fb",
+ .enable = exynos5_clksrc_mask_disp1_0_ctrl,
+ .ctrlbit = (1 << 0),
+ },
+ .sources = &exynos5_clkset_group,
+ .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 },
+ .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 },
+};
+
static struct clksrc_clk exynos5_clksrcs[] = {
{
.clk = {
@@ -1050,16 +1062,6 @@ static struct clksrc_clk exynos5_clksrcs[] = {
.reg_div = { .reg = EXYNOS5_CLKDIV_FSYS3, .shift = 8, .size = 8 },
}, {
.clk = {
- .name = "sclk_fimd",
- .devname = "exynos5-fb",
- .enable = exynos5_clksrc_mask_disp1_0_ctrl,
- .ctrlbit = (1 << 0),
- },
- .sources = &exynos5_clkset_group,
- .reg_src = { .reg = EXYNOS5_CLKSRC_DISP1_0, .shift = 0, .size = 4 },
- .reg_div = { .reg = EXYNOS5_CLKDIV_DISP1_0, .shift = 0, .size = 4 },
- }, {
- .clk = {
.name = "aclk_266_gscl",
},
.sources = &clk_src_gscl_266,
@@ -1153,6 +1155,7 @@ static struct clksrc_clk *exynos5_sysclks[] = {
&exynos5_clk_dout_mmc4,
&exynos5_clk_aclk_acp,
&exynos5_clk_pclk_acp,
+ &exynos5_clk_sclk_fimd,
};
static struct clk *exynos5_clk_cdev[] = {
@@ -1402,6 +1405,8 @@ void __init_or_cpufreq exynos5_setup_clocks(void)
clk_set_rate(&exynos5_clk_aclk_acp.clk, 267000000);
clk_set_rate(&exynos5_clk_pclk_acp.clk, 134000000);
+ clk_set_parent(&exynos5_clk_sclk_fimd.clk,
+ &exynos5_clk_mout_mpll_user.clk);
for (ptr = 0; ptr < ARRAY_SIZE(exynos5_clksrcs); ptr++)
s3c_set_clksrc(&exynos5_clksrcs[ptr], true);
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index 9d5bccc..248ca58 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -24,6 +24,9 @@
#include <plat/regs-serial.h>
#include <plat/backlight.h>
#include <plat/gpio-cfg.h>
+#include <plat/clock.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
#include "common.h"
@@ -172,9 +175,17 @@ static void __init exynos5250_dt_map_io(void)
static void __init exynos5250_dt_machine_init(void)
{
+ struct device_node *fimd_node;
+
samsung_bl_set(&smdk5250_bl_gpio_info, &smdk5250_bl_data);
of_platform_populate(NULL, of_default_bus_match_table,
exynos5250_auxdata_lookup, NULL);
+
+ fimd_node = of_find_node_with_property(NULL, "supports-mipi-panel");
+ if (of_get_property(fimd_node, "supports-mipi-panel", NULL))
+ clk_set_rate(&exynos5_clk_sclk_fimd.clk, 800000000);
+ of_node_put(fimd_node);
+
exynos_fimd_gpio_setup_24bpp();
platform_add_devices(smdk5250_devices, ARRAY_SIZE(smdk5250_devices));
}
diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index a62753d..3d27783 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -83,6 +83,8 @@ extern struct clk clk_ext;
extern struct clksrc_clk clk_epllref;
extern struct clksrc_clk clk_esysclk;
+extern struct clksrc_clk exynos5_clk_sclk_fimd;
+
/* S3C64XX specific clocks */
extern struct clk clk_h2;
extern struct clk clk_27m;
--
1.7.0.4
^ permalink raw reply related [flat|nested] 8+ messages in thread