From: "Heiko Stübner" <heiko@sntech.de>
To: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc: Atish Patra <atishp@rivosinc.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Atish Patra <atishp@atishpatra.org>,
Anup Patel <anup@brainfault.org>,
Damien Le Moal <damien.lemoal@wdc.com>,
devicetree@vger.kernel.org, Jisheng Zhang <jszhang@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>,
linux-riscv@lists.infradead.org,
Palmer Dabbelt <palmer@dabbelt.com>,
Paul Walmsley <paul.walmsley@sifive.com>,
Rob Herring <robh+dt@kernel.org>,
Atish Patra <atishp@atishpatra.org>
Subject: Re: [v5 6/9] RISC-V: Add perf platform driver based on SBI PMU extension
Date: Mon, 24 Jan 2022 14:12:56 +0100 [thread overview]
Message-ID: <13483045.gklhn8uf4L@diego> (raw)
In-Reply-To: <20211225054647.1750577-7-atishp@rivosinc.com>
Am Samstag, 25. Dezember 2021, 06:46:44 CET schrieb Atish Patra:
> From: Atish Patra <atish.patra@wdc.com>
>
> RISC-V SBI specification added a PMU extension that allows to configure
> start/stop any pmu counter. The RISC-V perf can use most of the generic
> perf features except interrupt overflow and event filtering based on
> privilege mode which will be added in future.
>
> It also allows to monitor a handful of firmware counters that can provide
> insights into firmware activity during a performance analysis.
>
> Signed-off-by: Atish Patra <atish.patra@wdc.com>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> ---
[...]
> +static int pmu_sbi_device_probe(struct platform_device *pdev)
> +{
> + struct riscv_pmu *pmu = NULL;
> + int num_counters;
> + int ret;
> +
> + pr_info("SBI PMU extension is available\n");
> + /* Notify legacy implementation that SBI pmu is available*/
> + riscv_pmu_legacy_init(true);
Just wondering, shouldn't the riscv_pmu_legacy_init() call live in
pmu_sbi_devinit) below?
I.e. when you detected the presence of the PMU sbi extension you already
know that you don't want the legacy one and you have less control over
probe-ordering (when the driver actually probes) than the initcall itself.
Also, I think a better naming for the function might be good.
Right now just reading
riscv_pmu_legacy_init(true);
suggests that you _want_ the legacy-init to be enabled, while
in reality the function means the opposite, disabling the legacy init.
So maybe something like
riscv_pmu_disable_legacy(true); ?
Heiko
> + pmu = riscv_pmu_alloc();
> + if (!pmu)
> + return -ENOMEM;
> +
> + num_counters = pmu_sbi_find_num_ctrs();
> + if (num_counters < 0) {
> + pr_err("SBI PMU extension doesn't provide any counters\n");
> + return -ENODEV;
> + }
> +
> + /* cache all the information about counters now */
> + if (pmu_sbi_get_ctrinfo(num_counters))
> + return -ENODEV;
> +
> + pmu->num_counters = num_counters;
> + pmu->ctr_start = pmu_sbi_ctr_start;
> + pmu->ctr_stop = pmu_sbi_ctr_stop;
> + pmu->event_map = pmu_sbi_event_map;
> + pmu->ctr_get_idx = pmu_sbi_ctr_get_idx;
> + pmu->ctr_get_width = pmu_sbi_ctr_get_width;
> + pmu->ctr_clear_idx = pmu_sbi_ctr_clear_idx;
> + pmu->ctr_read = pmu_sbi_ctr_read;
> +
> + ret = cpuhp_state_add_instance(CPUHP_AP_PERF_RISCV_STARTING, &pmu->node);
> + if (ret)
> + return ret;
> +
> + ret = perf_pmu_register(&pmu->pmu, "cpu", PERF_TYPE_RAW);
> + if (ret) {
> + cpuhp_state_remove_instance(CPUHP_AP_PERF_RISCV_STARTING, &pmu->node);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +static struct platform_driver pmu_sbi_driver = {
> + .probe = pmu_sbi_device_probe,
> + .driver = {
> + .name = RISCV_PMU_PDEV_NAME,
> + },
> +};
> +
> +static int __init pmu_sbi_devinit(void)
> +{
> + int ret;
> + struct platform_device *pdev;
> +
> + if (((sbi_major_version() == 0) && (sbi_minor_version() < 3)) ||
> + sbi_probe_extension(SBI_EXT_PMU) <= 0) {
> + return 0;
> + }
> +
> + ret = cpuhp_setup_state_multi(CPUHP_AP_PERF_RISCV_STARTING,
> + "perf/riscv/pmu:starting",
> + pmu_sbi_starting_cpu, pmu_sbi_dying_cpu);
> + if (ret) {
> + pr_err("CPU hotplug notifier for RISC-V PMU could not be registered: %d\n",
> + ret);
> + return ret;
> + }
> +
> + ret = platform_driver_register(&pmu_sbi_driver);
> + if (ret)
> + return ret;
> +
> + pdev = platform_device_register_simple(RISCV_PMU_PDEV_NAME, -1, NULL, 0);
> + if (IS_ERR(pdev)) {
> + platform_driver_unregister(&pmu_sbi_driver);
> + return PTR_ERR(pdev);
> + }
> +
> + return ret;
> +}
> +device_initcall(pmu_sbi_devinit)
>
next prev parent reply other threads:[~2022-01-24 13:13 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-25 5:46 [v5 0/9] Improve RISC-V Perf support using SBI PMU and sscofpmf extension Atish Patra
2021-12-25 5:46 ` [v5 1/9] RISC-V: Remove the current perf implementation Atish Patra
2022-01-17 15:58 ` Anup Patel
2021-12-25 5:46 ` [v5 2/9] RISC-V: Add CSR encodings for all HPMCOUNTERS Atish Patra
2022-01-17 16:01 ` Anup Patel
2021-12-25 5:46 ` [v5 3/9] RISC-V: Add a perf core library for pmu drivers Atish Patra
2022-01-18 5:01 ` Anup Patel
2021-12-25 5:46 ` [v5 4/9] RISC-V: Add a simple platform driver for RISC-V legacy perf Atish Patra
2022-01-18 5:23 ` Anup Patel
2021-12-25 5:46 ` [v5 5/9] RISC-V: Add RISC-V SBI PMU extension definitions Atish Patra
2022-01-17 16:15 ` Anup Patel
2021-12-25 5:46 ` [v5 6/9] RISC-V: Add perf platform driver based on SBI PMU extension Atish Patra
2022-01-18 6:30 ` Anup Patel
2022-02-17 20:31 ` Atish Patra
2022-01-24 13:12 ` Heiko Stübner [this message]
2022-02-17 20:29 ` Atish Patra
2021-12-25 5:46 ` [v5 7/9] RISC-V: Add sscofpmf extension support Atish Patra
2021-12-25 5:46 ` [v5 8/9] Documentation: riscv: Remove the old documentation Atish Patra
2022-01-17 16:16 ` Anup Patel
2021-12-25 5:46 ` [v5 9/9] MAINTAINERS: Add entry for RISC-V PMU drivers Atish Patra
2022-01-18 5:31 ` Anup Patel
2021-12-25 6:12 ` [v5 0/9] Improve RISC-V Perf support using SBI PMU and sscofpmf extension Atish Patra
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=13483045.gklhn8uf4L@diego \
--to=heiko@sntech.de \
--cc=anup@brainfault.org \
--cc=aou@eecs.berkeley.edu \
--cc=atishp@atishpatra.org \
--cc=atishp@rivosinc.com \
--cc=damien.lemoal@wdc.com \
--cc=devicetree@vger.kernel.org \
--cc=jszhang@kernel.org \
--cc=krzysztof.kozlowski@canonical.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox