From: Philipp Zabel <p.zabel@pengutronix.de>
To: linux-arm-kernel@lists.infradead.org
Cc: Marek Vasut <marex@denx.de>,
Fabio Estevam <fabio.estevam@freescale.com>,
Mike Turquette <mturquette@linaro.org>,
Stephen Warren <swarren@wwwdotorg.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
kernel@pengutronix.de, Stephen Warren <swarren@nvidia.com>,
Shawn Guo <shawn.guo@linaro.org>,
devicetree-discuss@lists.ozlabs.org
Subject: [PATCH 1/7] dt: describe base reset signal binding
Date: Wed, 16 Jan 2013 17:13:01 +0100 [thread overview]
Message-ID: <1358352787-15441-2-git-send-email-p.zabel@pengutronix.de> (raw)
In-Reply-To: <1358352787-15441-1-git-send-email-p.zabel@pengutronix.de>
From: Stephen Warren <swarren@nvidia.com>
This binding is intended to represent the hardware reset signals present
internally in most IC (SoC, FPGA, ...) designs.
Such a binding would allow the creation of a "reset subsystem", which
could replace APIs such as the following Tegra-specific API:
void tegra_periph_reset_deassert(struct clk *c);
void tegra_periph_reset_assert(struct clk *c);
(Note that at present, Tegra couples reset assertion with the clock for
the affected peripheral module. However, reset and clocking are two
separate, yet admittedly related, concepts).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
---
Documentation/devicetree/bindings/reset/reset.txt | 75 +++++++++++++++++++++
1 file changed, 75 insertions(+)
create mode 100644 Documentation/devicetree/bindings/reset/reset.txt
diff --git a/Documentation/devicetree/bindings/reset/reset.txt b/Documentation/devicetree/bindings/reset/reset.txt
new file mode 100644
index 0000000..31db6ff
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/reset.txt
@@ -0,0 +1,75 @@
+= Reset Signal Device Tree Bindings =
+
+This binding is intended to represent the hardware reset signals present
+internally in most IC (SoC, FPGA, ...) designs. Reset signals for whole
+standalone chips are most likely better represented as GPIOs, although there
+are likely to be exceptions to this rule.
+
+Hardware blocks typically receive a reset signal. This signal is generated by
+a reset provider (e.g. power management or clock module) and received by a
+reset consumer (the module being reset, or a module managing when a sub-
+ordinate module is reset). This binding exists to represent the provider and
+consumer, and provide a way to couple the two together.
+
+A reset signal is represented by the phandle of the provider, plus a reset
+specifier - a list of DT cells that represents the reset signal within the
+provider. The length (number of cells) and semantics of the reset specifier
+are dictated by the binding of the reset provider, although common schemes
+are described below.
+
+A word on where to place reset signal consumers in device tree: It is possible
+in hardware for a reset signal to affect multiple logically separate HW blocks
+at once. In this case, it would be unwise to represent this reset signal in
+the DT node of each affected HW block, since if activated, an unrelated block
+may be reset. Instead, reset signals should be represented in the DT node
+where it makes most sense to control it; this may be a bus node if all
+children of the bus are affected by the reset signal, or an individual HW
+block node for dedicated reset signals. The intent of this binding is to give
+appropriate software access to the reset signals in order to manage the HW,
+rather than to slavishly enumerate the reset signal that affects each HW
+block.
+
+= Reset providers =
+
+Required properties:
+#reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
+ with a single reset output and 1 for nodes with multiple
+ reset outputs.
+
+For example:
+
+ rst: reset-controller {
+ #reset-cells = <1>;
+ };
+
+= Reset consumers =
+
+Required properties:
+resets: List of phandle and reset specifier pairs, one pair
+ for each reset signal that affects the device, or that the
+ device manages. Note: if the reset provider specifies '0' for
+ #reset-cells, then only the phandle portion of the pair will
+ appear.
+
+Optional properties:
+reset-names: List of reset signal name strings sorted in the same order as
+ the resets property. Consumers drivers will use reset-names to
+ match reset signal names with reset specifiers.
+
+For example:
+
+ device {
+ resets = <&rst 20>;
+ reset-names = "reset";
+ };
+
+This represents a device with a single reset signal named "reset".
+
+ bus {
+ resets = <&rst 10> <&rst 11> <&rst 12> <&rst 11>;
+ reset-names = "i2s1", "i2s2", "dma", "mixer";
+ };
+
+This represents a bus that controls the reset signal of each of four sub-
+ordinate devices. Consider for example a bus that fails to operate unless no
+child device has reset asserted.
--
1.7.10.4
next prev parent reply other threads:[~2013-01-16 16:13 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-01-16 16:13 [RFC PATCH 0/5] Reset controller API to reset IP modules on i.MX5 and i.MX6 Philipp Zabel
2013-01-16 16:13 ` Philipp Zabel [this message]
[not found] ` <1358352787-15441-2-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2013-01-16 22:06 ` [PATCH 1/7] dt: describe base reset signal binding Stephen Warren
[not found] ` <1358352787-15441-1-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2013-01-16 16:13 ` [PATCH 2/7] reset: Add reset controller API Philipp Zabel
[not found] ` <1358352787-15441-3-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2013-01-16 20:15 ` Sascha Hauer
2013-01-16 22:15 ` Stephen Warren
[not found] ` <50F7267E.8090309-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-01-17 10:45 ` Philipp Zabel
[not found] ` <1358419524.2411.126.camel-/rZezPiN1rtR6QfukMTsflXZhhPuCNm+@public.gmane.org>
2013-01-17 16:55 ` Stephen Warren
2013-01-17 5:16 ` Shawn Guo
2013-01-16 16:13 ` [PATCH 3/7] ARM i.MX6q: Add GPU, VPU, IPU, and OpenVG resets to System Reset Controller (SRC) Philipp Zabel
[not found] ` <1358352787-15441-4-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2013-01-17 5:31 ` Shawn Guo
2013-01-18 19:57 ` Matt Sealey
[not found] ` <CAKGA1bmjKQcX3RzSjbnuYqoJqbzXYGa_Whv7QQkNyAhBDzZWdw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-01-21 9:52 ` Philipp Zabel
[not found] ` <1358761930.2522.54.camel-/rZezPiN1rtR6QfukMTsflXZhhPuCNm+@public.gmane.org>
2013-01-21 17:47 ` Matt Sealey
[not found] ` <CAKGA1bmkyU_LEJt17SvUwUUh0wXG-2o_5nOGaW8RWDV45g3bVg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2013-01-22 7:50 ` Shawn Guo
2013-01-16 16:13 ` [PATCH 4/7] ARM i.MX6q: Link system reset controller (SRC) to IPU in DT Philipp Zabel
[not found] ` <1358352787-15441-5-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2013-01-17 5:34 ` Shawn Guo
2013-01-16 16:13 ` [PATCH 5/7] staging: drm/imx: Use SRC to reset IPU Philipp Zabel
2013-01-16 16:13 ` [PATCH 6/7] ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53 Philipp Zabel
[not found] ` <1358352787-15441-7-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2013-01-17 6:12 ` Shawn Guo
[not found] ` <20130117061200.GK26179-rvtDTF3kK1ictlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
2013-01-17 10:45 ` Philipp Zabel
2013-01-16 16:13 ` [PATCH 7/7] ARM i.MX5: Add system reset controller (SRC) to i.MX51 and i.MX53 device tree Philipp Zabel
[not found] ` <1358352787-15441-8-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2013-01-16 22:19 ` Stephen Warren
[not found] ` <50F72780.8040208-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2013-01-17 6:37 ` Shawn Guo
2013-01-17 10:45 ` Philipp Zabel
2013-01-16 18:46 ` [RFC PATCH 0/5] Reset controller API to reset IP modules on i.MX5 and i.MX6 Marek Vasut
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