[PATCH 1/2] pinctrl: imx6q: add DTE pinctrl items for mx6q uart

[PATCH 1/2] pinctrl: imx6q: add DTE pinctrl items for mx6q uart

[Huang Shijie]

This patch adds two DTE pinctrl items for UART in mx6q.
  MX6Q_PAD_EIM_D27__UART2_RXD_DTE: set the RX/TX into DTE mode.
  MX6Q_PAD_EIM_D29__UART2_RTS_DTE: set the RTS/CTS into DTE mode.

If the uart want to work in DTE mode and enable the hardware flow control,
it must selects these two pinctrl items.

Signed-off-by: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 .../bindings/pinctrl/fsl,imx6q-pinctrl.txt         |    2 ++
 drivers/pinctrl/pinctrl-imx6q.c                    |    2 ++
 2 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
index a4119f6..91b8fa5 100644
--- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
+++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
@@ -1628,3 +1628,5 @@ MX6Q_PAD_SD2_DAT3__SJC_DONE			1589
 MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3		1590
 MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID		1591
 MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID		1592
+MX6Q_PAD_EIM_D27__UART2_RXD_DTE			1593
+MX6Q_PAD_EIM_D29__UART2_RTS_DTE			1594
diff --git a/drivers/pinctrl/pinctrl-imx6q.c b/drivers/pinctrl/pinctrl-imx6q.c
index 663346b..7eaacfb 100644
--- a/drivers/pinctrl/pinctrl-imx6q.c
+++ b/drivers/pinctrl/pinctrl-imx6q.c
@@ -1952,6 +1952,8 @@ static struct imx_pin_reg imx6q_pin_regs[] = {
 	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */
 	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 0, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID */
 	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */
+	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 4, 0x0928, 0), /* MX6Q_PAD_EIM_D27__UART2_RXD_DTE */
+	IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 4, 0x0924, 0), /* MX6Q_PAD_EIM_D29__UART2_RTS_DTE */
 };
 
 /* Pad names for the pinmux subsystem */
-- 
1.7.1

[PATCH 2/2] pinctrl: imx: use pin_func_ids to search the pinctrl item.

[Huang Shijie]

The uart may works in DTE mode or DCE mode. The customer can sets the different
modes by the pinctrl. But the pinctrl items for DTE or DCE may share the
same Pad id, such as:
  MX6Q_PAD_EIM_D27__UART2_RXD_DTE and MX6Q_PAD_EIM_D27__WEIM_WEIM_D_27
  share the same MX6Q_PAD_EIM_D27 pad id.

The current code only search the pinctrl items by pad id. So if there two
pinctrl items shares the same pad id, the current code only use the first one,
even you tell the system to use the second one in the DTS file.

This patch adds a new field pin_func_ids to imx_pin_group{}, and uses the
pin_func_ids as the index to search the pinctrl items. In this way, we can
avoid the issue.

Signed-off-by: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/pinctrl/pinctrl-imx.c |   30 ++++++++++++++++++++++--------
 drivers/pinctrl/pinctrl-imx.h |    1 +
 2 files changed, 23 insertions(+), 8 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-imx.c b/drivers/pinctrl/pinctrl-imx.c
index 4cebb9c..8c6abc0 100644
--- a/drivers/pinctrl/pinctrl-imx.c
+++ b/drivers/pinctrl/pinctrl-imx.c
@@ -56,11 +56,15 @@ struct imx_pinctrl {
 
 static const struct imx_pin_reg *imx_find_pin_reg(
 				const struct imx_pinctrl_soc_info *info,
-				unsigned pin, bool is_mux, unsigned mux)
+				unsigned pin, bool is_mux, unsigned mux,
+				int pin_func_id)
 {
 	const struct imx_pin_reg *pin_reg = NULL;
 	int i;
 
+	if (pin_func_id > -1 && pin_func_id < info->npin_regs)
+		return info->pin_regs + pin_func_id;
+
 	for (i = 0; i < info->npin_regs; i++) {
 		pin_reg = &info->pin_regs[i];
 		if (pin_reg->pid != pin)
@@ -223,8 +227,10 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
 	struct imx_pinctrl *ipctl = pinctrl_dev_get_drvdata(pctldev);
 	const struct imx_pinctrl_soc_info *info = ipctl->info;
 	const struct imx_pin_reg *pin_reg;
-	const unsigned *pins, *mux;
+	const unsigned int *pins, *mux;
+	int *pin_func_ids;
 	unsigned int npins, pin_id;
+	int pin_func_id;
 	int i;
 
 	/*
@@ -234,6 +240,7 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
 	pins = info->groups[group].pins;
 	npins = info->groups[group].npins;
 	mux = info->groups[group].mux_mode;
+	pin_func_ids = info->groups[group].pin_func_ids;
 
 	WARN_ON(!pins || !npins || !mux);
 
@@ -242,8 +249,10 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
 
 	for (i = 0; i < npins; i++) {
 		pin_id = pins[i];
+		pin_func_id = pin_func_ids[i];
 
-		pin_reg = imx_find_pin_reg(info, pin_id, 1, mux[i]);
+		pin_reg = imx_find_pin_reg(info, pin_id, 1, mux[i],
+					pin_func_id);
 		if (!pin_reg)
 			return -EINVAL;
 
@@ -254,8 +263,9 @@ static int imx_pmx_enable(struct pinctrl_dev *pctldev, unsigned selector,
 		}
 
 		writel(mux[i], ipctl->base + pin_reg->mux_reg);
-		dev_dbg(ipctl->dev, "write: offset 0x%x val 0x%x\n",
-			pin_reg->mux_reg, mux[i]);
+		dev_dbg(ipctl->dev,
+			"Pinid(%d), func-id(%d), write: offset 0x%x val 0x%x\n",
+			pin_id, pin_func_id, pin_reg->mux_reg, mux[i]);
 
 		/* some pins also need select input setting, set it if found */
 		if (pin_reg->input_reg) {
@@ -313,7 +323,7 @@ static int imx_pinconf_get(struct pinctrl_dev *pctldev,
 	const struct imx_pinctrl_soc_info *info = ipctl->info;
 	const struct imx_pin_reg *pin_reg;
 
-	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
+	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0, -1);
 	if (!pin_reg)
 		return -EINVAL;
 
@@ -335,7 +345,7 @@ static int imx_pinconf_set(struct pinctrl_dev *pctldev,
 	const struct imx_pinctrl_soc_info *info = ipctl->info;
 	const struct imx_pin_reg *pin_reg;
 
-	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
+	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0, -1);
 	if (!pin_reg)
 		return -EINVAL;
 
@@ -363,7 +373,7 @@ static void imx_pinconf_dbg_show(struct pinctrl_dev *pctldev,
 	const struct imx_pin_reg *pin_reg;
 	unsigned long config;
 
-	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0);
+	pin_reg = imx_find_pin_reg(info, pin_id, 0, 0, -1);
 	if (!pin_reg || !pin_reg->conf_reg) {
 		seq_printf(s, "N/A");
 		return;
@@ -460,6 +470,9 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
 				GFP_KERNEL);
 	grp->configs = devm_kzalloc(info->dev, grp->npins * sizeof(unsigned long),
 				GFP_KERNEL);
+	grp->pin_func_ids = devm_kzalloc(info->dev,
+				grp->npins * sizeof(unsigned long), GFP_KERNEL);
+
 	for (i = 0, j = 0; i < size; i += 2, j++) {
 		pin_func_id = be32_to_cpu(*list++);
 		ret = imx_pinctrl_get_pin_id_and_mux(info, pin_func_id,
@@ -473,6 +486,7 @@ static int imx_pinctrl_parse_groups(struct device_node *np,
 		if (config & IMX_PAD_SION)
 			grp->mux_mode[j] |= IOMUXC_CONFIG_SION;
 		grp->configs[j] = config & ~IMX_PAD_SION;
+		grp->pin_func_ids[j] = pin_func_id;
 	}
 
 #ifdef DEBUG
diff --git a/drivers/pinctrl/pinctrl-imx.h b/drivers/pinctrl/pinctrl-imx.h
index 9b65e78..2c11b2f 100644
--- a/drivers/pinctrl/pinctrl-imx.h
+++ b/drivers/pinctrl/pinctrl-imx.h
@@ -35,6 +35,7 @@ struct imx_pin_group {
 	unsigned npins;
 	unsigned int *mux_mode;
 	unsigned long *configs;
+	int *pin_func_ids;
 };
 
 /**
-- 
1.7.1

Re: [PATCH 2/2] pinctrl: imx: use pin_func_ids to search the pinctrl item.

[Linus Walleij]

On Wed, Feb 27, 2013 at 3:35 AM, Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:

> The uart may works in DTE mode or DCE mode. The customer can sets the different
> modes by the pinctrl. But the pinctrl items for DTE or DCE may share the
> same Pad id, such as:
>   MX6Q_PAD_EIM_D27__UART2_RXD_DTE and MX6Q_PAD_EIM_D27__WEIM_WEIM_D_27
>   share the same MX6Q_PAD_EIM_D27 pad id.
>
> The current code only search the pinctrl items by pad id. So if there two
> pinctrl items shares the same pad id, the current code only use the first one,
> even you tell the system to use the second one in the DTS file.
>
> This patch adds a new field pin_func_ids to imx_pin_group{}, and uses the
> pin_func_ids as the index to search the pinctrl items. In this way, we can
> avoid the issue.
>
> Signed-off-by: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

Dong/Shawn: what about this patch?

The patches anyway has to be merged through the i.MX tree I think,
if there is a huge movement in these files currently.

Yours,
Linus Walleij

Re: [PATCH 2/2] pinctrl: imx: use pin_func_ids to search the pinctrl item.

[Dong Aisheng]

Hi Linus,

On 1 March 2013 21:07, Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> On Wed, Feb 27, 2013 at 3:35 AM, Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
>
>> The uart may works in DTE mode or DCE mode. The customer can sets the different
>> modes by the pinctrl. But the pinctrl items for DTE or DCE may share the
>> same Pad id, such as:
>>   MX6Q_PAD_EIM_D27__UART2_RXD_DTE and MX6Q_PAD_EIM_D27__WEIM_WEIM_D_27
>>   share the same MX6Q_PAD_EIM_D27 pad id.
>>
>> The current code only search the pinctrl items by pad id. So if there two
>> pinctrl items shares the same pad id, the current code only use the first one,
>> even you tell the system to use the second one in the DTS file.
>>
>> This patch adds a new field pin_func_ids to imx_pin_group{}, and uses the
>> pin_func_ids as the index to search the pinctrl items. In this way, we can
>> avoid the issue.
>>
>> Signed-off-by: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>
> Dong/Shawn: what about this patch?
>

We do not need this patch anymore since we've changed the binding a bit.

Regards
Dong Aisheng

> The patches anyway has to be merged through the i.MX tree I think,
> if there is a huge movement in these files currently.
>
> Yours,
> Linus Walleij

Re: [PATCH 2/2] pinctrl: imx: use pin_func_ids to search the pinctrl item.

[Linus Walleij]

On Mon, Mar 4, 2013 at 3:18 AM, Dong Aisheng <dong.aisheng-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> On 1 March 2013 21:07, Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
>> On Wed, Feb 27, 2013 at 3:35 AM, Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
>>
>>> The uart may works in DTE mode or DCE mode. The customer can sets the different
>>> modes by the pinctrl. But the pinctrl items for DTE or DCE may share the
>>> same Pad id, such as:
>>>   MX6Q_PAD_EIM_D27__UART2_RXD_DTE and MX6Q_PAD_EIM_D27__WEIM_WEIM_D_27
>>>   share the same MX6Q_PAD_EIM_D27 pad id.
>>>
>>> The current code only search the pinctrl items by pad id. So if there two
>>> pinctrl items shares the same pad id, the current code only use the first one,
>>> even you tell the system to use the second one in the DTS file.
>>>
>>> This patch adds a new field pin_func_ids to imx_pin_group{}, and uses the
>>> pin_func_ids as the index to search the pinctrl items. In this way, we can
>>> avoid the issue.
>>>
>>> Signed-off-by: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>>
>> Dong/Shawn: what about this patch?
>
> We do not need this patch anymore since we've changed the binding a bit.

OK ignoring this then.

Yours,
Linus Walleij

Re: [PATCH 1/2] pinctrl: imx6q: add DTE pinctrl items for mx6q uart

[Dong Aisheng]

Hi Shijie,

On 27 February 2013 10:35, Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org> wrote:
> This patch adds two DTE pinctrl items for UART in mx6q.
>   MX6Q_PAD_EIM_D27__UART2_RXD_DTE: set the RX/TX into DTE mode.
>   MX6Q_PAD_EIM_D29__UART2_RTS_DTE: set the RTS/CTS into DTE mode.
>
> If the uart want to work in DTE mode and enable the hardware flow control,
> it must selects these two pinctrl items.
>
> Signed-off-by: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>

Thanks for the patch.
We're switching to use pre-proccessor feature provided by dtc and
changing the binding a bit.
So this patch may not be needed anymore.

Regards
Dong Aisheng

>  .../bindings/pinctrl/fsl,imx6q-pinctrl.txt         |    2 ++
>  drivers/pinctrl/pinctrl-imx6q.c                    |    2 ++
>  2 files changed, 4 insertions(+), 0 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
> index a4119f6..91b8fa5 100644
> --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
> @@ -1628,3 +1628,5 @@ MX6Q_PAD_SD2_DAT3__SJC_DONE                       1589
>  MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3              1590
>  MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID          1591
>  MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID              1592
> +MX6Q_PAD_EIM_D27__UART2_RXD_DTE                        1593
> +MX6Q_PAD_EIM_D29__UART2_RTS_DTE                        1594
> diff --git a/drivers/pinctrl/pinctrl-imx6q.c b/drivers/pinctrl/pinctrl-imx6q.c
> index 663346b..7eaacfb 100644
> --- a/drivers/pinctrl/pinctrl-imx6q.c
> +++ b/drivers/pinctrl/pinctrl-imx6q.c
> @@ -1952,6 +1952,8 @@ static struct imx_pin_reg imx6q_pin_regs[] = {
>         IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */
>         IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 0, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID */
>         IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */
> +       IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 4, 0x0928, 0), /* MX6Q_PAD_EIM_D27__UART2_RXD_DTE */
> +       IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 4, 0x0924, 0), /* MX6Q_PAD_EIM_D29__UART2_RTS_DTE */
>  };
>
>  /* Pad names for the pinmux subsystem */
> --
> 1.7.1
>
>

Re: [PATCH 1/2] pinctrl: imx6q: add DTE pinctrl items for mx6q uart

[Shawn Guo]

On Wed, Feb 27, 2013 at 10:35:52AM +0800, Huang Shijie wrote:
> This patch adds two DTE pinctrl items for UART in mx6q.
>   MX6Q_PAD_EIM_D27__UART2_RXD_DTE: set the RX/TX into DTE mode.
>   MX6Q_PAD_EIM_D29__UART2_RTS_DTE: set the RTS/CTS into DTE mode.
> 
> If the uart want to work in DTE mode and enable the hardware flow control,
> it must selects these two pinctrl items.
> 
> Signed-off-by: Huang Shijie <b32955-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
>  .../bindings/pinctrl/fsl,imx6q-pinctrl.txt         |    2 ++
>  drivers/pinctrl/pinctrl-imx6q.c                    |    2 ++
>  2 files changed, 4 insertions(+), 0 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
> index a4119f6..91b8fa5 100644
> --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
> +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
> @@ -1628,3 +1628,5 @@ MX6Q_PAD_SD2_DAT3__SJC_DONE			1589
>  MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3		1590
>  MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID		1591
>  MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID		1592
> +MX6Q_PAD_EIM_D27__UART2_RXD_DTE			1593
> +MX6Q_PAD_EIM_D29__UART2_RTS_DTE			1594
> diff --git a/drivers/pinctrl/pinctrl-imx6q.c b/drivers/pinctrl/pinctrl-imx6q.c
> index 663346b..7eaacfb 100644
> --- a/drivers/pinctrl/pinctrl-imx6q.c
> +++ b/drivers/pinctrl/pinctrl-imx6q.c
> @@ -1952,6 +1952,8 @@ static struct imx_pin_reg imx6q_pin_regs[] = {
>  	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */
>  	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 0, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID */
>  	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */
> +	IMX_PIN_REG(MX6Q_PAD_EIM_D27, 0x03D4, 0x00C0, 4, 0x0928, 0), /* MX6Q_PAD_EIM_D27__UART2_RXD_DTE */
> +	IMX_PIN_REG(MX6Q_PAD_EIM_D29, 0x03DC, 0x00C8, 4, 0x0924, 0), /* MX6Q_PAD_EIM_D29__UART2_RTS_DTE */

We are moving all these data into device tree.  Please patch dts against
my imx/dt branch instead.

Shawn

>  };
>  
>  /* Pad names for the pinmux subsystem */
> -- 
> 1.7.1
> 
>