From: Andreas Larsson <andreas@gaisler.com>
To: Linus Walleij <linus.walleij@linaro.org>,
Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>,
Anton Vorontsov <anton.vorontsov@linaro.org>,
linux-kernel@vger.kernel.org,
devicetree-discuss@lists.ozlabs.org, software@gaisler.com
Subject: [PATCH v5 1/3] gpio: gpio-generic: Add 16 and 32 bit big endian byte order support
Date: Fri, 15 Mar 2013 14:45:38 +0100 [thread overview]
Message-ID: <1363355140-28216-2-git-send-email-andreas@gaisler.com> (raw)
In-Reply-To: <1363355140-28216-1-git-send-email-andreas@gaisler.com>
There is no general support for 64-bit big endian accesses, so that is
left unsupported.
Signed-off-by: Andreas Larsson <andreas@gaisler.com>
---
drivers/gpio/gpio-generic.c | 56 ++++++++++++++++++++++++++++++++-------
include/linux/basic_mmio_gpio.h | 1 +
2 files changed, 48 insertions(+), 9 deletions(-)
diff --git a/drivers/gpio/gpio-generic.c b/drivers/gpio/gpio-generic.c
index 05fcc0f..42d4706 100644
--- a/drivers/gpio/gpio-generic.c
+++ b/drivers/gpio/gpio-generic.c
@@ -104,6 +104,26 @@ static unsigned long bgpio_read64(void __iomem *reg)
}
#endif /* BITS_PER_LONG >= 64 */
+static void bgpio_write16be(void __iomem *reg, unsigned long data)
+{
+ iowrite16be(data, reg);
+}
+
+static unsigned long bgpio_read16be(void __iomem *reg)
+{
+ return ioread16be(reg);
+}
+
+static void bgpio_write32be(void __iomem *reg, unsigned long data)
+{
+ iowrite32be(data, reg);
+}
+
+static unsigned long bgpio_read32be(void __iomem *reg)
+{
+ return ioread32be(reg);
+}
+
static unsigned long bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin)
{
return 1 << pin;
@@ -249,7 +269,8 @@ static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val)
static int bgpio_setup_accessors(struct device *dev,
struct bgpio_chip *bgc,
- bool be)
+ bool bit_be,
+ bool byte_be)
{
switch (bgc->bits) {
@@ -258,17 +279,33 @@ static int bgpio_setup_accessors(struct device *dev,
bgc->write_reg = bgpio_write8;
break;
case 16:
- bgc->read_reg = bgpio_read16;
- bgc->write_reg = bgpio_write16;
+ if (byte_be) {
+ bgc->read_reg = bgpio_read16be;
+ bgc->write_reg = bgpio_write16be;
+ } else {
+ bgc->read_reg = bgpio_read16;
+ bgc->write_reg = bgpio_write16;
+ }
break;
case 32:
- bgc->read_reg = bgpio_read32;
- bgc->write_reg = bgpio_write32;
+ if (byte_be) {
+ bgc->read_reg = bgpio_read32be;
+ bgc->write_reg = bgpio_write32be;
+ } else {
+ bgc->read_reg = bgpio_read32;
+ bgc->write_reg = bgpio_write32;
+ }
break;
#if BITS_PER_LONG >= 64
case 64:
- bgc->read_reg = bgpio_read64;
- bgc->write_reg = bgpio_write64;
+ if (byte_be) {
+ dev_err(dev,
+ "64 bit big endian byte order unsupported\n");
+ return -EINVAL;
+ } else {
+ bgc->read_reg = bgpio_read64;
+ bgc->write_reg = bgpio_write64;
+ }
break;
#endif /* BITS_PER_LONG >= 64 */
default:
@@ -276,7 +313,7 @@ static int bgpio_setup_accessors(struct device *dev,
return -EINVAL;
}
- bgc->pin2mask = be ? bgpio_pin2mask_be : bgpio_pin2mask;
+ bgc->pin2mask = bit_be ? bgpio_pin2mask_be : bgpio_pin2mask;
return 0;
}
@@ -385,7 +422,8 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
if (ret)
return ret;
- ret = bgpio_setup_accessors(dev, bgc, flags & BGPIOF_BIG_ENDIAN);
+ ret = bgpio_setup_accessors(dev, bgc, flags & BGPIOF_BIG_ENDIAN,
+ flags & BGPIOF_BIG_ENDIAN_BYTE_ORDER);
if (ret)
return ret;
diff --git a/include/linux/basic_mmio_gpio.h b/include/linux/basic_mmio_gpio.h
index 1c504ca..d8a97ec 100644
--- a/include/linux/basic_mmio_gpio.h
+++ b/include/linux/basic_mmio_gpio.h
@@ -72,5 +72,6 @@ int bgpio_init(struct bgpio_chip *bgc, struct device *dev,
#define BGPIOF_BIG_ENDIAN BIT(0)
#define BGPIOF_UNREADABLE_REG_SET BIT(1) /* reg_set is unreadable */
#define BGPIOF_UNREADABLE_REG_DIR BIT(2) /* reg_dir is unreadable */
+#define BGPIOF_BIG_ENDIAN_BYTE_ORDER BIT(3)
#endif /* __BASIC_MMIO_GPIO_H */
--
1.7.10.4
next prev parent reply other threads:[~2013-03-15 13:45 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-15 13:45 [PATCH v5 0/3] gpio: Add device driver for GRGPIO cores and support custom accessors with gpio-generic Andreas Larsson
2013-03-15 13:45 ` Andreas Larsson [this message]
2013-03-19 0:40 ` [PATCH v5 1/3] gpio: gpio-generic: Add 16 and 32 bit big endian byte order support Anton Vorontsov
[not found] ` <20130319004012.GA1004-1CZZkhFgUWNRmOO2HpYVOJIbA5emDH3N@public.gmane.org>
2013-03-27 8:58 ` Linus Walleij
2013-04-03 7:49 ` Andreas Larson
2013-04-10 18:27 ` Linus Walleij
2013-03-15 13:45 ` [PATCH v5 2/3] gpio: grgpio: Add device driver for GRGPIO cores Andreas Larsson
2013-04-10 18:50 ` Linus Walleij
2013-04-15 12:38 ` Andreas Larson
[not found] ` <516BF4D2.8060901-FkzTOoA/JUlBDgjK7y7TUQ@public.gmane.org>
2013-04-23 11:09 ` Linus Walleij
2013-03-15 13:45 ` [PATCH v5 3/3] gpio: grgpio: Add irq support Andreas Larsson
2013-04-10 19:25 ` Linus Walleij
2013-04-15 12:38 ` Andreas Larson
2013-04-23 11:14 ` Linus Walleij
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