From mboxrd@z Thu Jan 1 00:00:00 1970 From: Andrew Murray Subject: [PATCH v5 3/3] of/pci: mips: convert to common of_pci_range_parser Date: Wed, 10 Apr 2013 08:29:28 +0100 Message-ID: <1365578969-30966-4-git-send-email-Andrew.Murray@arm.com> References: <1365578969-30966-1-git-send-email-Andrew.Murray@arm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1365578969-30966-1-git-send-email-Andrew.Murray-5wv7dgnIgG8@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: devicetree-discuss-bounces+gldd-devicetree-discuss=m.gmane.org-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org Sender: "devicetree-discuss" To: rob.herring-bsGFqQB8/DxBDgjK7y7TUQ@public.gmane.org Cc: siva.kallam-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Liviu.Dudau-5wv7dgnIgG8@public.gmane.org, paulus-eUNUBHrolfbYtjvyW6yDsg@public.gmane.org, linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-lFZ/pmaqli7XmaaqVzeoHQ@public.gmane.org, jg1.han-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/@public.gmane.org, devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org, kgene.kim-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, suren.reddy-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, Andrew Murray List-Id: devicetree@vger.kernel.org This patch converts the pci_load_of_ranges function to use the new common of_pci_range_parser. Signed-off-by: Andrew Murray Signed-off-by: Liviu Dudau --- arch/mips/pci/pci.c | 50 ++++++++++++++++---------------------------------- 1 files changed, 16 insertions(+), 34 deletions(-) diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c index 0872f12..bee49a4 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c @@ -122,51 +122,33 @@ static void pcibios_scanbus(struct pci_controller *hose) #ifdef CONFIG_OF void pci_load_of_ranges(struct pci_controller *hose, struct device_node *node) { - const __be32 *ranges; - int rlen; - int pna = of_n_addr_cells(node); - int np = pna + 5; + struct of_pci_range_range range; + struct of_pci_range_parser parser; + u32 res_type; pr_info("PCI host bridge %s ranges:\n", node->full_name); - ranges = of_get_property(node, "ranges", &rlen); - if (ranges == NULL) - return; hose->of_node = node; - while ((rlen -= np * 4) >= 0) { - u32 pci_space; + if (of_pci_range_parser(&parser, node)) + return; + + for_each_of_pci_range(&parser, &range) { struct resource *res = NULL; - u64 addr, size; - - pci_space = be32_to_cpup(&ranges[0]); - addr = of_translate_address(node, ranges + 3); - size = of_read_number(ranges + pna + 3, 2); - ranges += np; - switch ((pci_space >> 24) & 0x3) { - case 1: /* PCI IO space */ + + res_type = range.flags & IORESOURCE_TYPE_BITS; + if (res_type == IORESOURCE_IO) { pr_info(" IO 0x%016llx..0x%016llx\n", - addr, addr + size - 1); + range.addr, range.addr + range.size - 1); hose->io_map_base = - (unsigned long)ioremap(addr, size); + (unsigned long)ioremap(range.addr, range.size); res = hose->io_resource; - res->flags = IORESOURCE_IO; - break; - case 2: /* PCI Memory space */ - case 3: /* PCI 64 bits Memory space */ + } else if (res_type == IORESOURCE_MEM) { pr_info(" MEM 0x%016llx..0x%016llx\n", - addr, addr + size - 1); + range.addr, range.addr + range.size - 1); res = hose->mem_resource; - res->flags = IORESOURCE_MEM; - break; - } - if (res != NULL) { - res->start = addr; - res->name = node->full_name; - res->end = res->start + size - 1; - res->parent = NULL; - res->sibling = NULL; - res->child = NULL; } + if (res != NULL) + of_pci_range_to_resource(&range, node, res); } } #endif -- 1.7.0.4