[PATCH v3 00/13] ARM: EXYNOS: Fix Universal C210 support

[PATCH v3 00/13] ARM: EXYNOS: Fix Universal C210 support

[Tomasz Figa]

This series intends to fix support for Universal C210 board in mainline.
Main difference from other boards based on Exynos 4210 is that hardware
revision of the SoC used on Universal C210 does not support MCT timers
and legacy PWM timers must be used instead.

First (and the biggest) part of the series deals with cleaning up and
fixing the samsung_pwm_timer clocksource driver, that was posted
recently by Arnd. In addition the driver is prepared to share the
hardware with PWM driver that will be reworked later, since it is not
a component crucial for system operation.

Second part fixes ATAGS support of Exynos 4210 rev0 SoC, which needs
different timer initialization, using the new samsung_pwm_timer driver.

Third and last part adds Device Tree-based support for Universal C210
board by providing device tree sources for it.

On Universal C210 board, both with and without DT:

Tested-by: Tomasz Figa <t.figa@samsung.com>

Tomasz Figa (13):
  Documentation: Add device tree bindings for Samsung PWM timers
  clocksource: samsung_pwm_timer: Let platforms select the driver
  clocksource: samsung_pwm_timer: Make PWM spinlock global
  clocksource: samsung_pwm_timer: Keep all driver data in a structure
  clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct
  clocksource: samsung_pwm_timer: Add support for non-DT platforms
  clocksource: samsung_pwm_timer: Use proper clockevents max_delta
  clocksource: samsung_pwm_timer: Correct programming of clock events
  clocksource: samsung_pwm_timer: Work around rounding errors in
    clockevents core
  ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos
  ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC
  ARM: dts: exynos4: Add node for PWM device
  ARM: dts: exynos4210: Add basic dts file for universal_c210 board

 .../devicetree/bindings/pwm/pwm-samsung.txt        |  43 +++
 arch/arm/boot/dts/Makefile                         |   1 +
 arch/arm/boot/dts/exynos4.dtsi                     |   8 +
 arch/arm/boot/dts/exynos4210-universal_c210.dts    | 352 +++++++++++++++++++++
 arch/arm/mach-exynos/Kconfig                       |   3 +-
 arch/arm/mach-exynos/common.c                      |  45 ++-
 arch/arm/mach-exynos/common.h                      |   2 +
 arch/arm/mach-exynos/mach-universal_c210.c         |   5 +-
 arch/arm/plat-samsung/Kconfig                      |   4 +-
 drivers/clocksource/Kconfig                        |   3 +-
 drivers/clocksource/samsung_pwm_timer.c            | 215 +++++++------
 include/clocksource/samsung_pwm.h                  |  11 +-
 12 files changed, 561 insertions(+), 131 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-samsung.txt
 create mode 100644 arch/arm/boot/dts/exynos4210-universal_c210.dts

-- 
1.8.2.1

[PATCH v3 01/13] Documentation: Add device tree bindings for Samsung PWM timers

[Tomasz Figa]

This patch adds missing documentation describing Device Tree bindings
for Samsung PWM timers.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 .../devicetree/bindings/pwm/pwm-samsung.txt        | 43 ++++++++++++++++++++++
 1 file changed, 43 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pwm/pwm-samsung.txt

diff --git a/Documentation/devicetree/bindings/pwm/pwm-samsung.txt b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
new file mode 100644
index 0000000..ac67c68
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-samsung.txt
@@ -0,0 +1,43 @@
+* Samsung PWM timers
+
+Samsung SoCs contain PWM timer blocks which can be used for system clock source
+and clock event timers, as well as to drive SoC outputs with PWM signal. Each
+PWM timer block provides 5 PWM channels (not all of them can drive physical
+outputs - see SoC and board manual).
+
+Be aware that the clocksource driver supports only uniprocessor systems.
+
+Required properties:
+- compatible : should be one of following:
+    samsung,s3c2410-pwm - for 16-bit timers present on S3C24xx SoCs
+    samsung,s3c6400-pwm - for 32-bit timers present on S3C64xx SoCs
+    samsung,s5p6440-pwm - for 32-bit timers present on S5P64x0 SoCs
+    samsung,s5pc100-pwm - for 32-bit timers present on S5PC100, S5PV210,
+			  Exynos4210 rev0 SoCs
+    samsung,exynos4210-pwm - for 32-bit timers present on Exynos4210,
+                          Exynos4x12 and Exynos5250 SoCs
+- reg: base address and size of register area
+- interrupts: list of timer interrupts (one interrupt per timer, starting at
+  timer 0)
+- #pwm-cells: number of cells used for PWM specifier - must be 3
+   the specifier format is as follows:
+     - phandle to PWM controller node
+     - index of PWM channel (from 0 to 4)
+     - PWM signal period in nanoseconds
+     - bitmask of optional PWM flags:
+        0x1 - invert PWM signal
+
+Optional properties:
+- samsung,pwm-outputs: list of PWM channels used as PWM outputs on particular
+    platform - an array of up to 5 elements being indices of PWM channels
+    (from 0 to 4), the order does not matter.
+
+Example:
+	pwm@7f006000 {
+		compatible = "samsung,s3c6400-pwm";
+		reg = <0x7f006000 0x1000>;
+		interrupt-parent = <&vic0>;
+		interrupts = <23>, <24>, <25>, <27>, <28>;
+		samsung,pwm-outputs = <0>, <1>;
+		#pwm-cells = <3>;
+	}
-- 
1.8.2.1

[PATCH v3 02/13] clocksource: samsung_pwm_timer: Let platforms select the driver

[Tomasz Figa]

This patch modifies the way of enabling the driver to let the platforms
select it in their Kconfig instead of specifying particular platforms in
Kconfig entry of the driver.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 drivers/clocksource/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index f261ddc..4700305 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -78,7 +78,7 @@ config CLKSRC_EXYNOS_MCT
 	  Support for Multi Core Timer controller on Exynos SoCs.
 
 config CLKSRC_SAMSUNG_PWM
-	def_bool ARCH_EXYNOS4
+	bool
 	depends on OF
 	select CLKSRC_MMIO
 	help
-- 
1.8.2.1

[PATCH v3 03/13] clocksource: samsung_pwm_timer: Make PWM spinlock global

[Tomasz Figa]

This patch makes the PWM spinlock global and exports it to allow using
it in Samsung PWM driver (will be reworked to use proper synchronization
in further patches).

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 drivers/clocksource/samsung_pwm_timer.c | 24 +++++++++++++-----------
 include/clocksource/samsung_pwm.h       |  2 ++
 2 files changed, 15 insertions(+), 11 deletions(-)

diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index 1752457..d9048b8 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -49,6 +49,9 @@
 #define TCON_INVERT(chan)		(1 << (4 * (chan) + 2))
 #define TCON_AUTORELOAD(chan)		(1 << (4 * (chan) + 3))
 
+DEFINE_SPINLOCK(samsung_pwm_lock);
+EXPORT_SYMBOL(samsung_pwm_lock);
+
 struct samsung_timer_source {
 	unsigned int event_id;
 	unsigned int source_id;
@@ -72,14 +75,14 @@ static void samsung_timer_set_prescale(struct samsung_pwm *pwm,
 	if (channel >= 2)
 		shift = TCFG0_PRESCALER1_SHIFT;
 
-	spin_lock_irqsave(&pwm->slock, flags);
+	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
 	reg = readl(pwm->base + REG_TCFG0);
 	reg &= ~(TCFG0_PRESCALER_MASK << shift);
 	reg |= (prescale - 1) << shift;
 	writel(reg, pwm->base + REG_TCFG0);
 
-	spin_unlock_irqrestore(&pwm->slock, flags);
+	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
 
 static void samsung_timer_set_divisor(struct samsung_pwm *pwm,
@@ -92,14 +95,14 @@ static void samsung_timer_set_divisor(struct samsung_pwm *pwm,
 
 	bits = (fls(divisor) - 1) - pwm->variant.div_base;
 
-	spin_lock_irqsave(&pwm->slock, flags);
+	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
 	reg = readl(pwm->base + REG_TCFG1);
 	reg &= ~(TCFG1_MUX_MASK << shift);
 	reg |= bits << shift;
 	writel(reg, pwm->base + REG_TCFG1);
 
-	spin_unlock_irqrestore(&pwm->slock, flags);
+	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
 
 static void samsung_time_stop(unsigned int channel)
@@ -110,13 +113,13 @@ static void samsung_time_stop(unsigned int channel)
 	if (channel > 0)
 		++channel;
 
-	spin_lock_irqsave(&pwm->slock, flags);
+	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
 	tcon = __raw_readl(pwm->base + REG_TCON);
 	tcon &= ~TCON_START(channel);
 	__raw_writel(tcon, pwm->base + REG_TCON);
 
-	spin_unlock_irqrestore(&pwm->slock, flags);
+	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
 
 static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
@@ -128,7 +131,7 @@ static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
 	if (tcon_chan > 0)
 		++tcon_chan;
 
-	spin_lock_irqsave(&pwm->slock, flags);
+	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
 	tcon = __raw_readl(pwm->base + REG_TCON);
 
@@ -141,7 +144,7 @@ static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
 	__raw_writel(tcnt, pwm->base + REG_TCMPB(channel));
 	__raw_writel(tcon, pwm->base + REG_TCON);
 
-	spin_unlock_irqrestore(&pwm->slock, flags);
+	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
 
 static void samsung_time_start(unsigned int channel, bool periodic)
@@ -152,7 +155,7 @@ static void samsung_time_start(unsigned int channel, bool periodic)
 	if (channel > 0)
 		++channel;
 
-	spin_lock_irqsave(&pwm->slock, flags);
+	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
 	tcon = __raw_readl(pwm->base + REG_TCON);
 
@@ -166,7 +169,7 @@ static void samsung_time_start(unsigned int channel, bool periodic)
 
 	__raw_writel(tcon, pwm->base + REG_TCON);
 
-	spin_unlock_irqrestore(&pwm->slock, flags);
+	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
 
 static int samsung_set_next_event(unsigned long cycles,
@@ -394,7 +397,6 @@ static void __init samsung_pwm_alloc(struct device_node *np,
 		return;
 	}
 	memcpy(&pwm->variant, variant, sizeof(pwm->variant));
-	spin_lock_init(&pwm->slock);
 	for (i = 0; i < SAMSUNG_PWM_NUM; ++i)
 		pwm->irq[i] = irq_of_parse_and_map(np, i);
 
diff --git a/include/clocksource/samsung_pwm.h b/include/clocksource/samsung_pwm.h
index eff8668..399d241 100644
--- a/include/clocksource/samsung_pwm.h
+++ b/include/clocksource/samsung_pwm.h
@@ -23,6 +23,8 @@
 struct platform_device;
 struct device_node;
 
+extern spinlock_t samsung_pwm_lock;
+
 struct samsung_pwm_variant {
 	u8 bits;
 	u8 div_base;
-- 
1.8.2.1

[PATCH v3 04/13] clocksource: samsung_pwm_timer: Keep all driver data in a structure

[Tomasz Figa]

This patch modifies the driver to keep all its private data consistently
in a single struct, instead of keeping part as separate variables.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 drivers/clocksource/samsung_pwm_timer.c | 157 +++++++++++++++-----------------
 1 file changed, 74 insertions(+), 83 deletions(-)

diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index d9048b8..e3257fa 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -52,21 +52,25 @@
 DEFINE_SPINLOCK(samsung_pwm_lock);
 EXPORT_SYMBOL(samsung_pwm_lock);
 
-struct samsung_timer_source {
+struct samsung_pwm_clocksource {
+	void __iomem *base;
+	unsigned int irq[SAMSUNG_PWM_NUM];
+	struct samsung_pwm_variant variant;
+
+	struct clk *timerclk;
+
 	unsigned int event_id;
 	unsigned int source_id;
 	unsigned int tcnt_max;
 	unsigned int tscaler_div;
 	unsigned int tdiv;
+
+	unsigned long clock_count_per_tick;
 };
 
-static struct samsung_pwm *pwm;
-static struct clk *timerclk;
-static struct samsung_timer_source timer_source;
-static unsigned long clock_count_per_tick;
+static struct samsung_pwm_clocksource pwm;
 
-static void samsung_timer_set_prescale(struct samsung_pwm *pwm,
-					unsigned int channel, u16 prescale)
+static void samsung_timer_set_prescale(unsigned int channel, u16 prescale)
 {
 	unsigned long flags;
 	u8 shift = 0;
@@ -77,30 +81,29 @@ static void samsung_timer_set_prescale(struct samsung_pwm *pwm,
 
 	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
-	reg = readl(pwm->base + REG_TCFG0);
+	reg = readl(pwm.base + REG_TCFG0);
 	reg &= ~(TCFG0_PRESCALER_MASK << shift);
 	reg |= (prescale - 1) << shift;
-	writel(reg, pwm->base + REG_TCFG0);
+	writel(reg, pwm.base + REG_TCFG0);
 
 	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
 
-static void samsung_timer_set_divisor(struct samsung_pwm *pwm,
-					unsigned int channel, u8 divisor)
+static void samsung_timer_set_divisor(unsigned int channel, u8 divisor)
 {
 	u8 shift = TCFG1_SHIFT(channel);
 	unsigned long flags;
 	u32 reg;
 	u8 bits;
 
-	bits = (fls(divisor) - 1) - pwm->variant.div_base;
+	bits = (fls(divisor) - 1) - pwm.variant.div_base;
 
 	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
-	reg = readl(pwm->base + REG_TCFG1);
+	reg = readl(pwm.base + REG_TCFG1);
 	reg &= ~(TCFG1_MUX_MASK << shift);
 	reg |= bits << shift;
-	writel(reg, pwm->base + REG_TCFG1);
+	writel(reg, pwm.base + REG_TCFG1);
 
 	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
@@ -115,9 +118,9 @@ static void samsung_time_stop(unsigned int channel)
 
 	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
-	tcon = __raw_readl(pwm->base + REG_TCON);
+	tcon = __raw_readl(pwm.base + REG_TCON);
 	tcon &= ~TCON_START(channel);
-	__raw_writel(tcon, pwm->base + REG_TCON);
+	__raw_writel(tcon, pwm.base + REG_TCON);
 
 	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
@@ -133,16 +136,16 @@ static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
 
 	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
-	tcon = __raw_readl(pwm->base + REG_TCON);
+	tcon = __raw_readl(pwm.base + REG_TCON);
 
 	tcnt--;
 
 	tcon &= ~(TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan));
 	tcon |= TCON_MANUALUPDATE(tcon_chan);
 
-	__raw_writel(tcnt, pwm->base + REG_TCNTB(channel));
-	__raw_writel(tcnt, pwm->base + REG_TCMPB(channel));
-	__raw_writel(tcon, pwm->base + REG_TCON);
+	__raw_writel(tcnt, pwm.base + REG_TCNTB(channel));
+	__raw_writel(tcnt, pwm.base + REG_TCMPB(channel));
+	__raw_writel(tcon, pwm.base + REG_TCON);
 
 	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
@@ -157,7 +160,7 @@ static void samsung_time_start(unsigned int channel, bool periodic)
 
 	spin_lock_irqsave(&samsung_pwm_lock, flags);
 
-	tcon = __raw_readl(pwm->base + REG_TCON);
+	tcon = __raw_readl(pwm.base + REG_TCON);
 
 	tcon &= ~TCON_MANUALUPDATE(channel);
 	tcon |= TCON_START(channel);
@@ -167,7 +170,7 @@ static void samsung_time_start(unsigned int channel, bool periodic)
 	else
 		tcon &= ~TCON_AUTORELOAD(channel);
 
-	__raw_writel(tcon, pwm->base + REG_TCON);
+	__raw_writel(tcon, pwm.base + REG_TCON);
 
 	spin_unlock_irqrestore(&samsung_pwm_lock, flags);
 }
@@ -175,8 +178,8 @@ static void samsung_time_start(unsigned int channel, bool periodic)
 static int samsung_set_next_event(unsigned long cycles,
 				struct clock_event_device *evt)
 {
-	samsung_time_setup(timer_source.event_id, cycles);
-	samsung_time_start(timer_source.event_id, false);
+	samsung_time_setup(pwm.event_id, cycles);
+	samsung_time_start(pwm.event_id, false);
 
 	return 0;
 }
@@ -184,23 +187,23 @@ static int samsung_set_next_event(unsigned long cycles,
 static void samsung_timer_resume(void)
 {
 	/* event timer restart */
-	samsung_time_setup(timer_source.event_id, clock_count_per_tick);
-	samsung_time_start(timer_source.event_id, true);
+	samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick);
+	samsung_time_start(pwm.event_id, true);
 
 	/* source timer restart */
-	samsung_time_setup(timer_source.source_id, timer_source.tcnt_max);
-	samsung_time_start(timer_source.source_id, true);
+	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
+	samsung_time_start(pwm.source_id, true);
 }
 
 static void samsung_set_mode(enum clock_event_mode mode,
 				struct clock_event_device *evt)
 {
-	samsung_time_stop(timer_source.event_id);
+	samsung_time_stop(pwm.event_id);
 
 	switch (mode) {
 	case CLOCK_EVT_MODE_PERIODIC:
-		samsung_time_setup(timer_source.event_id, clock_count_per_tick);
-		samsung_time_start(timer_source.event_id, true);
+		samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick);
+		samsung_time_start(pwm.event_id, true);
 		break;
 
 	case CLOCK_EVT_MODE_ONESHOT:
@@ -228,9 +231,9 @@ static irqreturn_t samsung_clock_event_isr(int irq, void *dev_id)
 {
 	struct clock_event_device *evt = dev_id;
 
-	if (pwm->variant.has_tint_cstat) {
-		u32 mask = (1 << timer_source.event_id);
-		writel(mask | (mask << 5), pwm->base + REG_TINT_CSTAT);
+	if (pwm.variant.has_tint_cstat) {
+		u32 mask = (1 << pwm.event_id);
+		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
 	}
 
 	evt->event_handler(evt);
@@ -251,39 +254,37 @@ static void __init samsung_clockevent_init(void)
 	unsigned long clock_rate;
 	unsigned int irq_number;
 
-	pclk = clk_get_rate(timerclk);
+	pclk = clk_get_rate(pwm.timerclk);
 
-	samsung_timer_set_prescale(pwm, timer_source.event_id,
-						timer_source.tscaler_div);
-	samsung_timer_set_divisor(pwm, timer_source.event_id,
-						timer_source.tdiv);
+	samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div);
+	samsung_timer_set_divisor(pwm.event_id, pwm.tdiv);
 
-	clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv);
-	clock_count_per_tick = clock_rate / HZ;
+	clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv);
+	pwm.clock_count_per_tick = clock_rate / HZ;
 
 	time_event_device.cpumask = cpumask_of(0);
 	clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
 
-	irq_number = pwm->irq[timer_source.event_id];
+	irq_number = pwm.irq[pwm.event_id];
 	setup_irq(irq_number, &samsung_clock_event_irq);
 
-	if (pwm->variant.has_tint_cstat) {
-		u32 mask = (1 << timer_source.event_id);
-		writel(mask | (mask << 5), pwm->base + REG_TINT_CSTAT);
+	if (pwm.variant.has_tint_cstat) {
+		u32 mask = (1 << pwm.event_id);
+		writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT);
 	}
 }
 
 static void __iomem *samsung_timer_reg(void)
 {
-	switch (timer_source.source_id) {
+	switch (pwm.source_id) {
 	case 0:
 	case 1:
 	case 2:
 	case 3:
-		return pwm->base + timer_source.source_id * 0x0c + 0x14;
+		return pwm.base + pwm.source_id * 0x0c + 0x14;
 
 	case 4:
-		return pwm->base + 0x40;
+		return pwm.base + 0x40;
 
 	default:
 		BUG();
@@ -314,23 +315,21 @@ static void __init samsung_clocksource_init(void)
 	unsigned long clock_rate;
 	int ret;
 
-	pclk = clk_get_rate(timerclk);
+	pclk = clk_get_rate(pwm.timerclk);
 
-	samsung_timer_set_prescale(pwm, timer_source.source_id,
-						timer_source.tscaler_div);
-	samsung_timer_set_divisor(pwm, timer_source.source_id,
-						timer_source.tdiv);
+	samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div);
+	samsung_timer_set_divisor(pwm.source_id, pwm.tdiv);
 
-	clock_rate = pclk / (timer_source.tscaler_div * timer_source.tdiv);
+	clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv);
 
-	samsung_time_setup(timer_source.source_id, timer_source.tcnt_max);
-	samsung_time_start(timer_source.source_id, true);
+	samsung_time_setup(pwm.source_id, pwm.tcnt_max);
+	samsung_time_start(pwm.source_id, true);
 
 	setup_sched_clock(samsung_read_sched_clock,
-						pwm->variant.bits, clock_rate);
+						pwm.variant.bits, clock_rate);
 
 	ret = clocksource_mmio_init(reg, "samsung_clocksource_timer",
-					clock_rate, 250, pwm->variant.bits,
+					clock_rate, 250, pwm.variant.bits,
 					clocksource_mmio_readl_down);
 	if (ret)
 		panic("samsung_clocksource_timer: can't register clocksource\n");
@@ -338,19 +337,19 @@ static void __init samsung_clocksource_init(void)
 
 static void __init samsung_timer_resources(void)
 {
-	timerclk = clk_get(NULL, "timers");
-	if (IS_ERR(timerclk))
+	pwm.timerclk = clk_get(NULL, "timers");
+	if (IS_ERR(pwm.timerclk))
 		panic("failed to get timers clock for timer");
 
-	clk_prepare_enable(timerclk);
+	clk_prepare_enable(pwm.timerclk);
 
-	timer_source.tcnt_max = (1UL << pwm->variant.bits) - 1;
-	if (pwm->variant.bits == 16) {
-		timer_source.tscaler_div = 25;
-		timer_source.tdiv = 2;
+	pwm.tcnt_max = (1UL << pwm.variant.bits) - 1;
+	if (pwm.variant.bits == 16) {
+		pwm.tscaler_div = 25;
+		pwm.tdiv = 2;
 	} else {
-		timer_source.tscaler_div = 2;
-		timer_source.tdiv = 1;
+		pwm.tscaler_div = 2;
+		pwm.tdiv = 1;
 	}
 }
 
@@ -362,20 +361,17 @@ static void __init samsung_pwm_clocksource_init(void)
 	u8 mask;
 	int channel;
 
-	if (!pwm)
-		panic("no pwm clocksource device found");
-
-	mask = ~pwm->variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1);
+	mask = ~pwm.variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1);
 	channel = fls(mask) - 1;
 	if (channel < 0)
 		panic("failed to find PWM channel for clocksource");
-	timer_source.source_id = channel;
+	pwm.source_id = channel;
 
 	mask &= ~(1 << channel);
 	channel = fls(mask) - 1;
 	if (channel < 0)
 		panic("failed to find PWM channel for clock event");
-	timer_source.event_id = channel;
+	pwm.event_id = channel;
 
 	samsung_timer_resources();
 	samsung_clockevent_init();
@@ -391,14 +387,9 @@ static void __init samsung_pwm_alloc(struct device_node *np,
 	u32 val;
 	int i;
 
-	pwm = kzalloc(sizeof(*pwm), GFP_KERNEL);
-	if (!pwm) {
-		pr_err("%s: could not allocate PWM device struct\n", __func__);
-		return;
-	}
-	memcpy(&pwm->variant, variant, sizeof(pwm->variant));
+	memcpy(&pwm.variant, variant, sizeof(pwm.variant));
 	for (i = 0; i < SAMSUNG_PWM_NUM; ++i)
-		pwm->irq[i] = irq_of_parse_and_map(np, i);
+		pwm.irq[i] = irq_of_parse_and_map(np, i);
 
 	of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) {
 		if (val >= SAMSUNG_PWM_NUM) {
@@ -406,7 +397,7 @@ static void __init samsung_pwm_alloc(struct device_node *np,
 								__func__);
 			continue;
 		}
-		pwm->variant.output_mask |= 1 << val;
+		pwm.variant.output_mask |= 1 << val;
 	}
 
 	of_address_to_resource(np, 0, &res);
@@ -416,8 +407,8 @@ static void __init samsung_pwm_alloc(struct device_node *np,
 		return;
 	}
 
-	pwm->base = ioremap(res.start, resource_size(&res));
-	if (!pwm->base) {
+	pwm.base = ioremap(res.start, resource_size(&res));
+	if (!pwm.base) {
 		pr_err("%s: failed to map PWM registers\n", __func__);
 		release_mem_region(res.start, resource_size(&res));
 		return;
-- 
1.8.2.1

[PATCH v3 05/13] clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct

[Tomasz Figa]

This patch removes the unused samsung_pwm struct from public header.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 include/clocksource/samsung_pwm.h | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/include/clocksource/samsung_pwm.h b/include/clocksource/samsung_pwm.h
index 399d241..b1d8fe7 100644
--- a/include/clocksource/samsung_pwm.h
+++ b/include/clocksource/samsung_pwm.h
@@ -20,9 +20,6 @@
 
 #define SAMSUNG_PWM_NUM		5
 
-struct platform_device;
-struct device_node;
-
 extern spinlock_t samsung_pwm_lock;
 
 struct samsung_pwm_variant {
@@ -33,11 +30,4 @@ struct samsung_pwm_variant {
 	bool has_tint_cstat;
 };
 
-struct samsung_pwm {
-	struct samsung_pwm_variant variant;
-	spinlock_t slock;
-	void __iomem *base;
-	int irq[SAMSUNG_PWM_NUM];
-};
-
 #endif /* __CLOCKSOURCE_SAMSUNG_PWM_H */
-- 
1.8.2.1

[PATCH v3 06/13] clocksource: samsung_pwm_timer: Add support for non-DT platforms

[Tomasz Figa]

This patch extends the driver to support platforms that still use legacy
ATAGS-based boot, without device tree, by providing an exported function
that can be used from platform code to initialize the clocksource.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 drivers/clocksource/Kconfig             |  1 -
 drivers/clocksource/samsung_pwm_timer.c | 16 ++++++++++++++--
 include/clocksource/samsung_pwm.h       |  3 +++
 3 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 4700305..f151c6c 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -79,7 +79,6 @@ config CLKSRC_EXYNOS_MCT
 
 config CLKSRC_SAMSUNG_PWM
 	bool
-	depends on OF
 	select CLKSRC_MMIO
 	help
 	  This is a new clocksource driver for the PWM timer found in
diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index e3257fa..9f4bd6a 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -356,7 +356,7 @@ static void __init samsung_timer_resources(void)
 /*
  * PWM master driver
  */
-static void __init samsung_pwm_clocksource_init(void)
+static void __init _samsung_pwm_clocksource_init(void)
 {
 	u8 mask;
 	int channel;
@@ -378,6 +378,17 @@ static void __init samsung_pwm_clocksource_init(void)
 	samsung_clocksource_init();
 }
 
+void __init samsung_pwm_clocksource_init(void __iomem *base,
+			unsigned int *irqs, struct samsung_pwm_variant *variant)
+{
+	pwm.base = base;
+	memcpy(&pwm.variant, variant, sizeof(pwm.variant));
+	memcpy(pwm.irq, irqs, SAMSUNG_PWM_NUM * sizeof(*irqs));
+
+	_samsung_pwm_clocksource_init();
+}
+
+#ifdef CONFIG_CLKSRC_OF
 static void __init samsung_pwm_alloc(struct device_node *np,
 				     const struct samsung_pwm_variant *variant)
 {
@@ -414,7 +425,7 @@ static void __init samsung_pwm_alloc(struct device_node *np,
 		return;
 	}
 
-	samsung_pwm_clocksource_init();
+	_samsung_pwm_clocksource_init();
 }
 
 static const struct samsung_pwm_variant s3c24xx_variant = {
@@ -468,3 +479,4 @@ static void __init s5p_pwm_clocksource_init(struct device_node *np)
 	samsung_pwm_alloc(np, &s5p_variant);
 }
 CLOCKSOURCE_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);
+#endif
diff --git a/include/clocksource/samsung_pwm.h b/include/clocksource/samsung_pwm.h
index b1d8fe7..5c449c8 100644
--- a/include/clocksource/samsung_pwm.h
+++ b/include/clocksource/samsung_pwm.h
@@ -30,4 +30,7 @@ struct samsung_pwm_variant {
 	bool has_tint_cstat;
 };
 
+void samsung_pwm_clocksource_init(void __iomem *base,
+		unsigned int *irqs, struct samsung_pwm_variant *variant);
+
 #endif /* __CLOCKSOURCE_SAMSUNG_PWM_H */
-- 
1.8.2.1

[PATCH v3 07/13] clocksource: samsung_pwm_timer: Use proper clockevents max_delta

[Tomasz Figa]

This patch replaces hardcoded -1 argument passed to
clockevents_config_and_register() with tcnt_max calculated based on
variant data.

This fixes invalid max delta configuration for 16-bit timers of s3c24xx.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 drivers/clocksource/samsung_pwm_timer.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index 9f4bd6a..cb86615 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -263,7 +263,8 @@ static void __init samsung_clockevent_init(void)
 	pwm.clock_count_per_tick = clock_rate / HZ;
 
 	time_event_device.cpumask = cpumask_of(0);
-	clockevents_config_and_register(&time_event_device, clock_rate, 1, -1);
+	clockevents_config_and_register(&time_event_device,
+						clock_rate, 1, pwm.tcnt_max);
 
 	irq_number = pwm.irq[pwm.event_id];
 	setup_irq(irq_number, &samsung_clock_event_irq);
-- 
1.8.2.1

[PATCH v3 08/13] clocksource: samsung_pwm_timer: Correct programming of clock events

[Tomasz Figa]

In current code, the tick count value programmed to the hardware is
always decremented by one. This is reasonable for periodic mode, since
there is one extra tick between 0 and COUNT (after reloading), but it
makes oneshot events happen 1 tick earlier than requested, because the
interrupt is triggered on transition from 1 to 0.

This patch removes the decrementation from PWM channel setup code and
moves it instead to periodic timer setup, to make both periodic and
oneshot modes work correctly.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 drivers/clocksource/samsung_pwm_timer.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index cb86615..92b2f13 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -138,8 +138,6 @@ static void samsung_time_setup(unsigned int channel, unsigned long tcnt)
 
 	tcon = __raw_readl(pwm.base + REG_TCON);
 
-	tcnt--;
-
 	tcon &= ~(TCON_START(tcon_chan) | TCON_AUTORELOAD(tcon_chan));
 	tcon |= TCON_MANUALUPDATE(tcon_chan);
 
@@ -187,7 +185,7 @@ static int samsung_set_next_event(unsigned long cycles,
 static void samsung_timer_resume(void)
 {
 	/* event timer restart */
-	samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick);
+	samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1);
 	samsung_time_start(pwm.event_id, true);
 
 	/* source timer restart */
@@ -202,7 +200,7 @@ static void samsung_set_mode(enum clock_event_mode mode,
 
 	switch (mode) {
 	case CLOCK_EVT_MODE_PERIODIC:
-		samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick);
+		samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1);
 		samsung_time_start(pwm.event_id, true);
 		break;
 
-- 
1.8.2.1

[PATCH v3 09/13] clocksource: samsung_pwm_timer: Work around rounding errors in clockevents core

[Tomasz Figa]

Due to rounding errors in clockevents core (in conversions between ticks
and nsecs), it might happen that the set_next_event callback gets called
with cycles = 0, causing the code to incorrectly program the PWM timer.

This patch modifies the callback to program the timer for 1 tick, if
received tick count value is 0.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 drivers/clocksource/samsung_pwm_timer.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index 92b2f13..0234c8d 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -176,6 +176,19 @@ static void samsung_time_start(unsigned int channel, bool periodic)
 static int samsung_set_next_event(unsigned long cycles,
 				struct clock_event_device *evt)
 {
+	/*
+	 * This check is needed to account for internal rounding
+	 * errors inside clockevents core, which might result in
+	 * passing cycles = 0, which in turn would not generate any
+	 * timer interrupt and hang the system.
+	 *
+	 * Another solution would be to set up the clockevent device
+	 * with min_delta = 2, but this would unnecessarily increase
+	 * the minimum sleep period.
+	 */
+	if (!cycles)
+		cycles = 1;
+
 	samsung_time_setup(pwm.event_id, cycles);
 	samsung_time_start(pwm.event_id, false);
 
-- 
1.8.2.1

[PATCH v3 10/13] ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos

[Tomasz Figa]

This patch removes legacy PWM timer interrupt initialization from
exynos{4,5}_init_irq() functions, since it conflicts with internal
interrupt handling of the new PWM clocksource driver.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-exynos/common.c | 15 ---------------
 arch/arm/plat-samsung/Kconfig |  4 ++--
 2 files changed, 2 insertions(+), 17 deletions(-)

diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 64ef39e..9574498 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -492,13 +492,6 @@ void __init exynos4_init_irq(void)
 		combiner_init(S5P_VA_COMBINER_BASE, NULL,
 			      max_combiner_nr(), COMBINER_IRQ(0, 0));
 
-	/*
-	 * The parameters of s5p_init_irq() are for VIC init.
-	 * Theses parameters should be NULL and 0 because EXYNOS4
-	 * uses GIC instead of VIC.
-	 */
-	s5p_init_irq(NULL, 0);
-
 	gic_arch_extn.irq_set_wake = s3c_irq_wake;
 }
 
@@ -507,14 +500,6 @@ void __init exynos5_init_irq(void)
 #ifdef CONFIG_OF
 	irqchip_init();
 #endif
-	/*
-	 * The parameters of s5p_init_irq() are for VIC init.
-	 * Theses parameters should be NULL and 0 because EXYNOS4
-	 * uses GIC instead of VIC.
-	 */
-	if (!of_machine_is_compatible("samsung,exynos5440"))
-		s5p_init_irq(NULL, 0);
-
 	gic_arch_extn.irq_set_wake = s3c_irq_wake;
 }
 
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig
index 53e7eeb..04410da 100644
--- a/arch/arm/plat-samsung/Kconfig
+++ b/arch/arm/plat-samsung/Kconfig
@@ -97,9 +97,9 @@ config SAMSUNG_IRQ_VIC_TIMER
          Internal configuration to build the VIC timer interrupt code.
 
 config S5P_IRQ
-	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
+	def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210)
 	help
-	  Support common interrup part for ARCH_S5P and ARCH_EXYNOS SoCs
+	  Support common interrupt part for ARCH_S5P SoCs
 
 config S5P_EXT_INT
 	bool
-- 
1.8.2.1

[PATCH v3 11/13] ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC

[Tomasz Figa]

This patch extends exynos_init_time() function to handle Exynos4210 rev0
SoC, which differs in availability of system timers and needs different
clocksource initialization.

This makes it possible to use exynos_init_time() function as init_time
callback for all Exynos-based boards, including Universal_C210, which
originally had to use samsung_timer_init().

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/mach-exynos/Kconfig               |  3 ++-
 arch/arm/mach-exynos/common.c              | 30 +++++++++++++++++++++++++++++-
 arch/arm/mach-exynos/common.h              |  2 ++
 arch/arm/mach-exynos/mach-universal_c210.c |  5 ++---
 4 files changed, 35 insertions(+), 5 deletions(-)

diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig
index eefea36..f7af1e0 100644
--- a/arch/arm/mach-exynos/Kconfig
+++ b/arch/arm/mach-exynos/Kconfig
@@ -268,6 +268,7 @@ config MACH_ARMLEX4210
 config MACH_UNIVERSAL_C210
 	bool "Mobile UNIVERSAL_C210 Board"
 	select CLKSRC_MMIO
+	select CLKSRC_SAMSUNG_PWM
 	select CPU_EXYNOS4210
 	select EXYNOS4_SETUP_FIMC
 	select EXYNOS4_SETUP_FIMD0
@@ -299,7 +300,6 @@ config MACH_UNIVERSAL_C210
 	select S5P_DEV_TV
 	select S5P_GPIO_INT
 	select S5P_SETUP_MIPIPHY
-	select SAMSUNG_HRT
 	help
 	  Machine support for Samsung Mobile Universal S5PC210 Reference
 	  Board.
@@ -428,6 +428,7 @@ config MACH_EXYNOS4_DT
 	depends on ARCH_EXYNOS4
 	select ARM_AMBA
 	select CLKSRC_OF
+	select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210
 	select CPU_EXYNOS4210
 	select KEYBOARD_SAMSUNG if INPUT_KEYBOARD
 	select PINCTRL
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index 9574498..52c024f 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -10,12 +10,14 @@
  */
 
 #include <linux/kernel.h>
+#include <linux/bitops.h>
 #include <linux/interrupt.h>
 #include <linux/irq.h>
 #include <linux/irqchip.h>
 #include <linux/io.h>
 #include <linux/device.h>
 #include <linux/gpio.h>
+#include <clocksource/samsung_pwm.h>
 #include <linux/sched.h>
 #include <linux/serial_core.h>
 #include <linux/of.h>
@@ -445,8 +447,27 @@ static void __init exynos5440_map_io(void)
 	iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
 }
 
+static struct samsung_pwm_variant exynos4_pwm_variant = {
+	.bits		= 32,
+	.div_base	= 0,
+	.has_tint_cstat	= true,
+	.tclk_mask	= 0,
+};
+
+void __init exynos_set_timer_source(u8 channels)
+{
+	exynos4_pwm_variant.output_mask = BIT(SAMSUNG_PWM_NUM) - 1;
+	exynos4_pwm_variant.output_mask &= ~channels;
+}
+
 void __init exynos_init_time(void)
 {
+	unsigned int timer_irqs[SAMSUNG_PWM_NUM] = {
+		EXYNOS4_IRQ_TIMER0_VIC, EXYNOS4_IRQ_TIMER1_VIC,
+		EXYNOS4_IRQ_TIMER2_VIC, EXYNOS4_IRQ_TIMER3_VIC,
+		EXYNOS4_IRQ_TIMER4_VIC,
+	};
+
 	if (of_have_populated_dt()) {
 #ifdef CONFIG_OF
 		of_clk_init(NULL);
@@ -458,7 +479,14 @@ void __init exynos_init_time(void)
 		exynos4_clk_init(NULL, !soc_is_exynos4210(), S5P_VA_CMU, readl(S5P_VA_CHIPID + 8) & 1);
 		exynos4_clk_register_fixed_ext(xxti_f, xusbxti_f);
 #endif
-		mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0, EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1);
+#ifdef CONFIG_CLKSRC_SAMSUNG_PWM
+		if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_0)
+			samsung_pwm_clocksource_init(S3C_VA_TIMER,
+					timer_irqs, &exynos4_pwm_variant);
+		else
+#endif
+			mct_init(S5P_VA_SYSTIMER, EXYNOS4_IRQ_MCT_G0,
+					EXYNOS4_IRQ_MCT_L0, EXYNOS4_IRQ_MCT_L1);
 	}
 }
 
diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h
index 60dd35c..11fc1e2 100644
--- a/arch/arm/mach-exynos/common.h
+++ b/arch/arm/mach-exynos/common.h
@@ -32,6 +32,8 @@ void exynos4_clk_register_fixed_ext(unsigned long, unsigned long);
 
 void exynos_firmware_init(void);
 
+void exynos_set_timer_source(u8 channels);
+
 #ifdef CONFIG_PM_GENERIC_DOMAINS
 int exynos_pm_late_initcall(void);
 #else
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index 020e1f4..6ca31c4 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -41,7 +41,6 @@
 #include <plat/mfc.h>
 #include <plat/sdhci.h>
 #include <plat/fimc-core.h>
-#include <plat/samsung-time.h>
 #include <plat/camport.h>
 
 #include <mach/map.h>
@@ -1117,7 +1116,7 @@ static void __init universal_map_io(void)
 {
 	exynos_init_io(NULL, 0);
 	s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
-	samsung_set_timer_source(SAMSUNG_PWM2, SAMSUNG_PWM4);
+	exynos_set_timer_source(BIT(2) | BIT(4));
 	xxti_f = 0;
 	xusbxti_f = 24000000;
 }
@@ -1177,7 +1176,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
 	.map_io		= universal_map_io,
 	.init_machine	= universal_machine_init,
 	.init_late	= exynos_init_late,
-	.init_time	= samsung_timer_init,
+	.init_time	= exynos_init_time,
 	.reserve        = &universal_reserve,
 	.restart	= exynos4_restart,
 MACHINE_END
-- 
1.8.2.1

Re: [PATCH v3 11/13] ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC

[Olof Johansson]

On Tue, Apr 23, 2013 at 05:46:32PM +0200, Tomasz Figa wrote:
> This patch extends exynos_init_time() function to handle Exynos4210 rev0
> SoC, which differs in availability of system timers and needs different
> clocksource initialization.
> 
> This makes it possible to use exynos_init_time() function as init_time
> callback for all Exynos-based boards, including Universal_C210, which
> originally had to use samsung_timer_init().
> 
> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>

I didn't apply this one since I had massive conflicts caused by it. Can you
please resubmit on top of late/fixes?

Thanks,


-Olof

Re: [PATCH v3 11/13] ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC

[Tomasz Figa]

On Sunday 28 of April 2013 12:22:31 Olof Johansson wrote:
> On Tue, Apr 23, 2013 at 05:46:32PM +0200, Tomasz Figa wrote:
> > This patch extends exynos_init_time() function to handle Exynos4210
> > rev0 SoC, which differs in availability of system timers and needs
> > different clocksource initialization.
> > 
> > This makes it possible to use exynos_init_time() function as init_time
> > callback for all Exynos-based boards, including Universal_C210, which
> > originally had to use samsung_timer_init().
> > 
> > Signed-off-by: Tomasz Figa <t.figa@samsung.com>
> > Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
> 
> I didn't apply this one since I had massive conflicts caused by it. Can
> you please resubmit on top of late/fixes?

As we discussed on IRC, since this patch has multiple dependencies, let's 
wait until everything settles and apply it then, as an rc fix to avoid 
further merge conflicts.

Best regards,
Tomasz

[PATCH v3 12/13] ARM: dts: exynos4: Add node for PWM device

[Tomasz Figa]

This patch adds device tree node for PWM block present on Exynos 4 SoCs.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/boot/dts/exynos4.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index efd441a..bed40ee 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -338,6 +338,14 @@
 		status = "disabled";
 	};
 
+	pwm@139D0000 {
+		compatible = "samsung,exynos4210-pwm";
+		reg = <0x139D0000 0x1000>;
+		interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
+		#pwm-cells = <2>;
+		status = "disabled";
+	};
+
 	amba {
 		#address-cells = <1>;
 		#size-cells = <1>;
-- 
1.8.2.1

[PATCH v3 13/13] ARM: dts: exynos4210: Add basic dts file for universal_c210 board

[Tomasz Figa]

This patch adds basic device tree sources for Universal C210 board.

Currently support includes:
- eMMC
- serial
- max8952 and max8998 voltage regulators.
- gpio-keys

More support will be added in further patches.

Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
---
 arch/arm/boot/dts/Makefile                      |   1 +
 arch/arm/boot/dts/exynos4210-universal_c210.dts | 352 ++++++++++++++++++++++++
 2 files changed, 353 insertions(+)
 create mode 100644 arch/arm/boot/dts/exynos4210-universal_c210.dts

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 8fd41b3..6647274 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -49,6 +49,7 @@ dtb-$(CONFIG_ARCH_DOVE) += dove-cm-a510.dtb \
 dtb-$(CONFIG_ARCH_EXYNOS) += exynos4210-origen.dtb \
 	exynos4210-smdkv310.dtb \
 	exynos4210-trats.dtb \
+	exynos4210-universal_c210.dtb \
 	exynos4412-odroidx.dtb \
 	exynos4412-smdk4412.dtb \
 	exynos4412-origen.dtb \
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
new file mode 100644
index 0000000..345cdb5
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -0,0 +1,352 @@
+/*
+ * Samsung's Exynos4210 based Universal C210 board device tree source
+ *
+ * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
+ *		http://www.samsung.com
+ *
+ * Device tree source file for Samsung's Universal C210 board which is based on
+ * Samsung's Exynos4210 rev0 SoC.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/dts-v1/;
+/include/ "exynos4210.dtsi"
+
+/ {
+	model = "Samsung Universal C210 based on Exynos4210 rev0";
+	compatible = "samsung,universal_c210", "samsung,exynos4210";
+
+	memory {
+		reg =  <0x40000000 0x10000000
+			0x50000000 0x10000000>;
+	};
+
+	chosen {
+		bootargs = "console=ttySAC2,115200N8 root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
+	};
+
+	mct@10050000 {
+		compatible = "none";
+	};
+
+	fixed-rate-clocks {
+		xxti {
+			compatible = "samsung,clock-xxti";
+			clock-frequency = <0>;
+		};
+
+		xusbxti {
+			compatible = "samsung,clock-xusbxti";
+			clock-frequency = <24000000>;
+		};
+	};
+
+	vemmc_reg: voltage-regulator {
+	        compatible = "regulator-fixed";
+		regulator-name = "VMEM_VDD_2_8V";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		gpio = <&gpe1 3 0>;
+		enable-active-high;
+	};
+
+	sdhci_emmc: sdhci@12510000 {
+		bus-width = <8>;
+		non-removable;
+		pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus8>;
+		pinctrl-names = "default";
+		vmmc-supply = <&vemmc_reg>;
+		status = "okay";
+	};
+
+	serial@13800000 {
+		status = "okay";
+	};
+
+	serial@13810000 {
+		status = "okay";
+	};
+
+	serial@13820000 {
+		status = "okay";
+	};
+
+	serial@13830000 {
+		status = "okay";
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		vol-up-key {
+			gpios = <&gpx2 0 1>;
+			linux,code = <115>;
+			label = "volume up";
+			debounce-interval = <1>;
+		};
+
+		vol-down-key {
+			gpios = <&gpx2 1 1>;
+			linux,code = <114>;
+			label = "volume down";
+			debounce-interval = <1>;
+		};
+
+		config-key {
+			gpios = <&gpx2 2 1>;
+			linux,code = <171>;
+			label = "config";
+			debounce-interval = <1>;
+			gpio-key,wakeup;
+		};
+
+		camera-key {
+			gpios = <&gpx2 3 1>;
+			linux,code = <212>;
+			label = "camera";
+			debounce-interval = <1>;
+		};
+
+		power-key {
+			gpios = <&gpx2 7 1>;
+			linux,code = <116>;
+			label = "power";
+			debounce-interval = <1>;
+			gpio-key,wakeup;
+		};
+
+		ok-key {
+			gpios = <&gpx3 5 1>;
+			linux,code = <352>;
+			label = "ok";
+			debounce-interval = <1>;
+		};
+	};
+
+	tsp_reg: voltage-regulator {
+	        compatible = "regulator-fixed";
+		regulator-name = "TSP_2_8V";
+		regulator-min-microvolt = <2800000>;
+		regulator-max-microvolt = <2800000>;
+		gpio = <&gpe2 3 0>;
+		enable-active-high;
+	};
+
+	i2c@13890000 {
+		samsung,i2c-sda-delay = <100>;
+		samsung,i2c-slave-addr = <0x10>;
+		samsung,i2c-max-bus-freq = <100000>;
+		pinctrl-0 = <&i2c3_bus>;
+		pinctrl-names = "default";
+		status = "okay";
+
+		tsp@4a {
+			/* TBD: Atmel maXtouch touchscreen */
+			reg = <0x4a>;
+		};
+	};
+
+	i2c@138B0000 {
+		samsung,i2c-sda-delay = <100>;
+		samsung,i2c-slave-addr = <0x10>;
+		samsung,i2c-max-bus-freq = <100000>;
+		pinctrl-0 = <&i2c5_bus>;
+		pinctrl-names = "default";
+		status = "okay";
+
+		vdd_arm_reg: pmic@60 {
+			compatible = "maxim,max8952";
+			reg = <0x60>;
+
+			max8952,vid-gpios = <&gpx0 3 0>, <&gpx0 4 0>;
+			max8952,default-mode = <0>;
+			max8952,dvs-mode-microvolt = <1250000>, <1200000>,
+							<1050000>, <950000>;
+			max8952,sync-freq = <0>;
+			max8952,ramp-speed = <0>;
+
+			regulator-name = "vdd_arm";
+			regulator-min-microvolt = <770000>;
+			regulator-max-microvolt = <1400000>;
+			regulator-always-on;
+			regulator-boot-on;
+		};
+
+		pmic@66 {
+			compatible = "national,lp3974";
+			reg = <0x66>;
+
+			max8998,pmic-buck1-default-dvs-idx = <0>;
+			max8998,pmic-buck1-dvs-gpios = <&gpx0 5 0>,
+							<&gpx0 6 0>;
+			max8998,pmic-buck1-dvs-voltage = <1100000>, <1000000>,
+							<1100000>, <1000000>;
+
+			max8998,pmic-buck2-default-dvs-idx = <0>;
+			max8998,pmic-buck2-dvs-gpio = <&gpe2 0 0>;
+			max8998,pmic-buck2-dvs-voltage = <1200000>, <1100000>;
+
+			regulators {
+				ldo2_reg: LDO2 {
+					regulator-name = "VALIVE_1.2V";
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+					regulator-always-on;
+				};
+
+				ldo3_reg: LDO3 {
+					regulator-name = "VUSB+MIPI_1.1V";
+					regulator-min-microvolt = <1100000>;
+					regulator-max-microvolt = <1100000>;
+				};
+
+				ldo4_reg: LDO4 {
+					regulator-name = "VADC_3.3V";
+					regulator-min-microvolt = <3300000>;
+					regulator-max-microvolt = <3300000>;
+				};
+
+				ldo5_reg: LDO5 {
+					regulator-name = "VTF_2.8V";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+				};
+
+				ldo6_reg: LDO6 {
+					regulator-name = "LDO6";
+					regulator-min-microvolt = <2000000>;
+					regulator-max-microvolt = <2000000>;
+				};
+
+				ldo7_reg: LDO7 {
+					regulator-name = "VLCD+VMIPI_1.8V";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+				};
+
+				ldo8_reg: LDO8 {
+					regulator-name = "VUSB+VDAC_3.3V";
+					regulator-min-microvolt = <3300000>;
+					regulator-max-microvolt = <3300000>;
+				};
+
+				ldo9_reg: LDO9 {
+					regulator-name = "VCC_2.8V";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+					regulator-always-on;
+				};
+
+				ldo10_reg: LDO10 {
+					regulator-name = "VPLL_1.1V";
+					regulator-min-microvolt = <1100000>;
+					regulator-max-microvolt = <1100000>;
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				ldo11_reg: LDO11 {
+					regulator-name = "CAM_AF_3.3V";
+					regulator-min-microvolt = <3300000>;
+					regulator-max-microvolt = <3300000>;
+				};
+
+				ldo12_reg: LDO12 {
+					regulator-name = "PS_2.8V";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+				};
+
+				ldo13_reg: LDO13 {
+					regulator-name = "VHIC_1.2V";
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+				};
+
+				ldo14_reg: LDO14 {
+					regulator-name = "CAM_I_HOST_1.8V";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+				};
+
+				ldo15_reg: LDO15 {
+					regulator-name = "CAM_S_DIG+FM33_CORE_1.2V";
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+				};
+
+				ldo16_reg: LDO16 {
+					regulator-name = "CAM_S_ANA_2.8V";
+					regulator-min-microvolt = <2800000>;
+					regulator-max-microvolt = <2800000>;
+				};
+
+				ldo17_reg: LDO17 {
+					regulator-name = "VCC_3.0V_LCD";
+					regulator-min-microvolt = <3000000>;
+					regulator-max-microvolt = <3000000>;
+				};
+
+				buck1_reg: BUCK1 {
+					regulator-name = "VINT_1.1V";
+					regulator-min-microvolt = <750000>;
+					regulator-max-microvolt = <1500000>;
+					regulator-boot-on;
+					regulator-always-on;
+				};
+
+				buck2_reg: BUCK2 {
+					regulator-name = "VG3D_1.1V";
+					regulator-min-microvolt = <750000>;
+					regulator-max-microvolt = <1500000>;
+					regulator-boot-on;
+				};
+
+				buck3_reg: BUCK3 {
+					regulator-name = "VCC_1.8V";
+					regulator-min-microvolt = <1800000>;
+					regulator-max-microvolt = <1800000>;
+					regulator-always-on;
+				};
+
+				buck4_reg: BUCK4 {
+					regulator-name = "VMEM_1.2V";
+					regulator-min-microvolt = <1200000>;
+					regulator-max-microvolt = <1200000>;
+					regulator-always-on;
+				};
+
+				ap32khz_reg: EN32KHz-AP {
+					regulator-name = "32KHz AP";
+					regulator-always-on;
+				};
+
+				cp32khz_reg: EN32KHz-CP {
+					regulator-name = "32KHz CP";
+				};
+
+				vichg_reg: ENVICHG {
+					regulator-name = "VICHG";
+				};
+
+				safeout1_reg: ESAFEOUT1 {
+					regulator-name = "SAFEOUT1";
+					regulator-always-on;
+				};
+
+				safeout2_reg: ESAFEOUT2 {
+					regulator-name = "SAFEOUT2";
+					regulator-boot-on;
+				};
+			};
+		};
+	};
+
+	pwm@139D0000 {
+		compatible = "samsung,s5p6440-pwm";
+		status = "okay";
+	};
+};
-- 
1.8.2.1

Re: [PATCH v3 00/13] ARM: EXYNOS: Fix Universal C210 support

[Tomasz Figa]

On Tuesday 23 of April 2013 17:46:21 Tomasz Figa wrote:
> This series intends to fix support for Universal C210 board in mainline.
> Main difference from other boards based on Exynos 4210 is that hardware
> revision of the SoC used on Universal C210 does not support MCT timers
> and legacy PWM timers must be used instead.
> 
> First (and the biggest) part of the series deals with cleaning up and
> fixing the samsung_pwm_timer clocksource driver, that was posted
> recently by Arnd. In addition the driver is prepared to share the
> hardware with PWM driver that will be reworked later, since it is not
> a component crucial for system operation.
> 
> Second part fixes ATAGS support of Exynos 4210 rev0 SoC, which needs
> different timer initialization, using the new samsung_pwm_timer driver.
> 
> Third and last part adds Device Tree-based support for Universal C210
> board by providing device tree sources for it.
> 
> On Universal C210 board, both with and without DT:
> 
> Tested-by: Tomasz Figa <t.figa@samsung.com>
> 
> Tomasz Figa (13):
>   Documentation: Add device tree bindings for Samsung PWM timers
>   clocksource: samsung_pwm_timer: Let platforms select the driver
>   clocksource: samsung_pwm_timer: Make PWM spinlock global
>   clocksource: samsung_pwm_timer: Keep all driver data in a structure
>   clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct
>   clocksource: samsung_pwm_timer: Add support for non-DT platforms
>   clocksource: samsung_pwm_timer: Use proper clockevents max_delta
>   clocksource: samsung_pwm_timer: Correct programming of clock events
>   clocksource: samsung_pwm_timer: Work around rounding errors in
>     clockevents core
>   ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos
>   ARM: EXYNOS: Fix support of Exynos4210 rev0 SoC
>   ARM: dts: exynos4: Add node for PWM device
>   ARM: dts: exynos4210: Add basic dts file for universal_c210 board
> 
>  .../devicetree/bindings/pwm/pwm-samsung.txt        |  43 +++
>  arch/arm/boot/dts/Makefile                         |   1 +
>  arch/arm/boot/dts/exynos4.dtsi                     |   8 +
>  arch/arm/boot/dts/exynos4210-universal_c210.dts    | 352
> +++++++++++++++++++++ arch/arm/mach-exynos/Kconfig                       | 
>  3 +-
>  arch/arm/mach-exynos/common.c                      |  45 ++-
>  arch/arm/mach-exynos/common.h                      |   2 +
>  arch/arm/mach-exynos/mach-universal_c210.c         |   5 +-
>  arch/arm/plat-samsung/Kconfig                      |   4 +-
>  drivers/clocksource/Kconfig                        |   3 +-
>  drivers/clocksource/samsung_pwm_timer.c            | 215 +++++++------
>  include/clocksource/samsung_pwm.h                  |  11 +-
>  12 files changed, 561 insertions(+), 131 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-samsung.txt
>  create mode 100644 arch/arm/boot/dts/exynos4210-universal_c210.dts

Kgene, could you merge this series and send a pull request, please?

Best regards,
-- 
Tomasz Figa
Samsung Poland R&D Center
SW Solution Development, Kernel and System Framework

Re: [PATCH v3 00/13] ARM: EXYNOS: Fix Universal C210 support

[Arnd Bergmann]

On Tuesday 23 April 2013, Tomasz Figa wrote:
> This series intends to fix support for Universal C210 board in mainline.
> Main difference from other boards based on Exynos 4210 is that hardware
> revision of the SoC used on Universal C210 does not support MCT timers
> and legacy PWM timers must be used instead.
> 
> First (and the biggest) part of the series deals with cleaning up and
> fixing the samsung_pwm_timer clocksource driver, that was posted
> recently by Arnd. In addition the driver is prepared to share the
> hardware with PWM driver that will be reworked later, since it is not
> a component crucial for system operation.
> 
> Second part fixes ATAGS support of Exynos 4210 rev0 SoC, which needs
> different timer initialization, using the new samsung_pwm_timer driver.
> 
> Third and last part adds Device Tree-based support for Universal C210
> board by providing device tree sources for it.
> 
> On Universal C210 board, both with and without DT:
> 
> Tested-by: Tomasz Figa <t.figa@samsung.com>

Reviewed-by: Arnd Bergmann <arnd@arndb.de>

Olof, Kgene, I think we should have this one in 3.10 since it fixes
a regression. It looks bigger than it really is because I asked Tomasz
to do small patches rather than a single combined patch.

	Arnd

Re: [PATCH v3 00/13] ARM: EXYNOS: Fix Universal C210 support

[Kukjin Kim]

On 04/25/13 23:46, Arnd Bergmann wrote:

>> On Universal C210 board, both with and without DT:
>>
>> Tested-by: Tomasz Figa<t.figa@samsung.com>
>
> Reviewed-by: Arnd Bergmann<arnd@arndb.de>
>
> Olof, Kgene, I think we should have this one in 3.10 since it fixes
> a regression. It looks bigger than it really is because I asked Tomasz
> to do small patches rather than a single combined patch.
>
Basically, I have no objection, I think, dt for universal_c210 is not 
urgent in v3.10 though, because non-dt will be still supported...

K-Gene

Re: [PATCH v3 00/13] ARM: EXYNOS: Fix Universal C210 support

[Olof Johansson]

On Thu, Apr 25, 2013 at 04:46:27PM +0200, Arnd Bergmann wrote:
> On Tuesday 23 April 2013, Tomasz Figa wrote:
> > This series intends to fix support for Universal C210 board in mainline.
> > Main difference from other boards based on Exynos 4210 is that hardware
> > revision of the SoC used on Universal C210 does not support MCT timers
> > and legacy PWM timers must be used instead.
> > 
> > First (and the biggest) part of the series deals with cleaning up and
> > fixing the samsung_pwm_timer clocksource driver, that was posted
> > recently by Arnd. In addition the driver is prepared to share the
> > hardware with PWM driver that will be reworked later, since it is not
> > a component crucial for system operation.
> > 
> > Second part fixes ATAGS support of Exynos 4210 rev0 SoC, which needs
> > different timer initialization, using the new samsung_pwm_timer driver.
> > 
> > Third and last part adds Device Tree-based support for Universal C210
> > board by providing device tree sources for it.
> > 
> > On Universal C210 board, both with and without DT:
> > 
> > Tested-by: Tomasz Figa <t.figa@samsung.com>
> 
> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
> 
> Olof, Kgene, I think we should have this one in 3.10 since it fixes
> a regression. It looks bigger than it really is because I asked Tomasz
> to do small patches rather than a single combined patch.

Ok. Kukjin, I don't mind collecting this in a late/* branch even though time is
running late, since it's a regression. Do you want to send it to me or should
I just pick up the patches?


-Olof

Re: [PATCH v3 00/13] ARM: EXYNOS: Fix Universal C210 support

[Kukjin Kim]

On 04/27/13 09:34, Olof Johansson wrote:

[...]

>>> On Universal C210 board, both with and without DT:
>>>
>>> Tested-by: Tomasz Figa<t.figa@samsung.com>
>>
>> Reviewed-by: Arnd Bergmann<arnd@arndb.de>
>>
>> Olof, Kgene, I think we should have this one in 3.10 since it fixes
>> a regression. It looks bigger than it really is because I asked Tomasz
>> to do small patches rather than a single combined patch.
>
> Ok. Kukjin, I don't mind collecting this in a late/* branch even though time is
> running late, since it's a regression. Do you want to send it to me or should
> I just pick up the patches?
>
Olof, since too late, would be better if you could pick up this series 
in the late/* branch with my ack:

Acked-by: Kukjin Kim <kgene.kim@samsung.com>

Thanks.

- Kukjin

Re: [PATCH v3 00/13] ARM: EXYNOS: Fix Universal C210 support

[Olof Johansson]

On Sun, Apr 28, 2013 at 03:52:33PM +0900, Kukjin Kim wrote:
> On 04/27/13 09:34, Olof Johansson wrote:
> 
> [...]
> 
> >>>On Universal C210 board, both with and without DT:
> >>>
> >>>Tested-by: Tomasz Figa<t.figa@samsung.com>
> >>
> >>Reviewed-by: Arnd Bergmann<arnd@arndb.de>
> >>
> >>Olof, Kgene, I think we should have this one in 3.10 since it fixes
> >>a regression. It looks bigger than it really is because I asked Tomasz
> >>to do small patches rather than a single combined patch.
> >
> >Ok. Kukjin, I don't mind collecting this in a late/* branch even though time is
> >running late, since it's a regression. Do you want to send it to me or should
> >I just pick up the patches?
> >
> Olof, since too late, would be better if you could pick up this
> series in the late/* branch with my ack:
> 
> Acked-by: Kukjin Kim <kgene.kim@samsung.com>

I have applied everything but 11/13 since it had heavy conflicts (I'll commment
on that patch separately).


-Olof