From mboxrd@z Thu Jan 1 00:00:00 1970 From: Sebastian Hesselbarth Subject: [PATCH v3 3/6] ARM: dove: move device tree nodes to DT irqchip and clocksource Date: Thu, 6 Jun 2013 18:27:11 +0200 Message-ID: <1370536034-23956-4-git-send-email-sebastian.hesselbarth@gmail.com> References: <1370536034-23956-1-git-send-email-sebastian.hesselbarth@gmail.com> Return-path: In-Reply-To: <1370536034-23956-1-git-send-email-sebastian.hesselbarth@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Cc: Sebastian Hesselbarth , Grant Likely , Rob Herring , Rob Landley , Thomas Gleixner , John Stultz , Russell King , Jason Cooper , Andrew Lunn , Thomas Petazzoni , Gregory Clement , devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org With recent support for true irqchip and clocksource drivers for Orion SoCs, now make use of it on DT enabled Dove boards. Signed-off-by: Sebastian Hesselbarth --- Cc: Grant Likely Cc: Rob Herring Cc: Rob Landley Cc: Thomas Gleixner Cc: John Stultz Cc: Russell King Cc: Jason Cooper Cc: Andrew Lunn Cc: Thomas Petazzoni Cc: Gregory Clement Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-doc@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org --- arch/arm/boot/dts/dove.dtsi | 21 +++++++++++++++++++-- 1 files changed, 19 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 8612658..8d5be1e8 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -30,11 +30,28 @@ marvell,tauros2-cache-features = <0>; }; - intc: interrupt-controller { + timer: timer@20300 { + compatible = "marvell,orion-timer"; + reg = <0x20300 0x20>; + interrupt-parent = <&bridge_intc>; + interrupts = <1>, <2>; + clocks = <&core_clk 0>; + }; + + intc: main-interrupt-ctrl@20200 { compatible = "marvell,orion-intc"; interrupt-controller; #interrupt-cells = <1>; - reg = <0x20204 0x04>, <0x20214 0x04>; + reg = <0x20200 0x10>, <0x20210 0x10>; + }; + + bridge_intc: bridge-interrupt-ctrl@20110 { + compatible = "marvell,orion-bridge-intc"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x20110 0x8>; + interrupts = <0>; + marvell,#interrupts = <5>; }; core_clk: core-clocks@d0214 { -- 1.7.2.5