[PATCH v2 0/3] Support I2C controllers in RK3528

[PATCH v2 0/3] Support I2C controllers in RK3528

[Yao Zi]

RK3528 integrates eight I2C controllers which are compatible with the
RK3399 variant of i2c-rk3x. This series documents the controllers in
dt-bindings, describe them in SoC devicetree and enable the onboard
EEPROM of Radxa E20C which is connected to I2C-2.

Changed from v1
- rebase on top of linux-rockchip/for-next
- dt-binding: collect review tags
- SoC devicetree
  - sort i2c and gpio in /aliases
  - provide default pinctrl for controllers with only one set of
    possible pins
- Radxa E20C devicetree: mark eeprom as read-only

Yao Zi (3):
  dt-bindings: i2c: i2c-rk3x: Add compatible string for RK3528
  arm64: dts: rockchip: Add I2C controllers for RK3528
  arm64: dts: rockchip: Add onboard EEPROM for Radxa E20C

 .../devicetree/bindings/i2c/i2c-rk3x.yaml     |   1 +
 .../boot/dts/rockchip/rk3528-radxa-e20c.dts   |  14 +++
 arch/arm64/boot/dts/rockchip/rk3528.dtsi      | 110 ++++++++++++++++++
 3 files changed, 125 insertions(+)

-- 
2.49.0

[PATCH v2 1/3] dt-bindings: i2c: i2c-rk3x: Add compatible string for RK3528

[Yao Zi]

Document I2C controllers integrated in RK3528, which are compatible with
the RK3399 variant.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
---
 Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
index 8101afa6f146..2f1e97969c3f 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
@@ -37,6 +37,7 @@ properties:
               - rockchip,px30-i2c
               - rockchip,rk3308-i2c
               - rockchip,rk3328-i2c
+              - rockchip,rk3528-i2c
               - rockchip,rk3562-i2c
               - rockchip,rk3568-i2c
               - rockchip,rk3576-i2c
-- 
2.49.0

[PATCH v2 2/3] arm64: dts: rockchip: Add I2C controllers for RK3528

[Yao Zi]

Describe I2C controllers shipped by RK3528 in devicetree. For I2C-2,
I2C-4 and I2C-7 which come with only a set of possible pins, a default
pin configuration is included.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---
 arch/arm64/boot/dts/rockchip/rk3528.dtsi | 110 +++++++++++++++++++++++
 1 file changed, 110 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
index 826f9be0be19..2c9780069af9 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
@@ -24,6 +24,14 @@ aliases {
 		gpio2 = &gpio2;
 		gpio3 = &gpio3;
 		gpio4 = &gpio4;
+		i2c0 = &i2c0;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+		i2c4 = &i2c4;
+		i2c5 = &i2c5;
+		i2c6 = &i2c6;
+		i2c7 = &i2c7;
 		serial0 = &uart0;
 		serial1 = &uart1;
 		serial2 = &uart2;
@@ -465,6 +473,108 @@ uart7: serial@ffa28000 {
 			status = "disabled";
 		};
 
+		i2c0: i2c@ffa50000 {
+			compatible = "rockchip,rk3528-i2c",
+				     "rockchip,rk3399-i2c";
+			reg = <0x0 0xffa50000 0x0 0x1000>;
+			clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
+			clock-names = "i2c", "pclk";
+			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c1: i2c@ffa58000 {
+			compatible = "rockchip,rk3528-i2c",
+				     "rockchip,rk3399-i2c";
+			reg = <0x0 0xffa58000 0x0 0x1000>;
+			clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
+			clock-names = "i2c", "pclk";
+			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c2: i2c@ffa60000 {
+			compatible = "rockchip,rk3528-i2c",
+				     "rockchip,rk3399-i2c";
+			reg = <0x0 0xffa60000 0x0 0x1000>;
+			clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
+			clock-names = "i2c", "pclk";
+			interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c2m1_xfer>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c3: i2c@ffa68000 {
+			compatible = "rockchip,rk3528-i2c",
+				     "rockchip,rk3399-i2c";
+			reg = <0x0 0xffa68000 0x0 0x1000>;
+			clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
+			clock-names = "i2c", "pclk";
+			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c4: i2c@ffa70000 {
+			compatible = "rockchip,rk3528-i2c",
+				     "rockchip,rk3399-i2c";
+			reg = <0x0 0xffa70000 0x0 0x1000>;
+			clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>;
+			clock-names = "i2c", "pclk";
+			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c4_xfer>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c5: i2c@ffa78000 {
+			compatible = "rockchip,rk3528-i2c",
+				     "rockchip,rk3399-i2c";
+			reg = <0x0 0xffa78000 0x0 0x1000>;
+			clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
+			clock-names = "i2c", "pclk";
+			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c6: i2c@ffa80000 {
+			compatible = "rockchip,rk3528-i2c",
+				     "rockchip,rk3399-i2c";
+			reg = <0x0 0xffa80000 0x0 0x1000>;
+			clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>;
+			clock-names = "i2c", "pclk";
+			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
+		i2c7: i2c@ffa88000 {
+			compatible = "rockchip,rk3528-i2c",
+				     "rockchip,rk3399-i2c";
+			reg = <0x0 0xffa88000 0x0 0x1000>;
+			clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>;
+			clock-names = "i2c", "pclk";
+			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&i2c7_xfer>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+		};
+
 		saradc: adc@ffae0000 {
 			compatible = "rockchip,rk3528-saradc";
 			reg = <0x0 0xffae0000 0x0 0x10000>;
-- 
2.49.0

[PATCH v2 3/3] arm64: dts: rockchip: Add onboard EEPROM for Radxa E20C

[Yao Zi]

Radxa E20C ships an onboard I2C EEPROM for storing production
information. Enable it in devicetree.

Signed-off-by: Yao Zi <ziyao@disroot.org>
---
 arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
index 57a446b5cbd6..6e77f7753ff7 100644
--- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
@@ -110,6 +110,20 @@ vcc5v0_sys: regulator-5v0-vcc-sys {
 	};
 };
 
+&i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&i2c1m0_xfer>;
+	status = "okay";
+
+	eeprom@50 {
+		compatible = "belling,bl24c16a", "atmel,24c16";
+		reg = <0x50>;
+		pagesize = <16>;
+		read-only;
+		vcc-supply = <&vcc_3v3>;
+	};
+};
+
 &pinctrl {
 	gpio-keys {
 		user_key: user-key {
-- 
2.49.0

Re: [PATCH v2 2/3] arm64: dts: rockchip: Add I2C controllers for RK3528

[Krzysztof Kozlowski]

On 17/04/2025 14:01, Yao Zi wrote:
> Describe I2C controllers shipped by RK3528 in devicetree. For I2C-2,
> I2C-4 and I2C-7 which come with only a set of possible pins, a default
> pin configuration is included.
> 
> Signed-off-by: Yao Zi <ziyao@disroot.org>
> ---
>  arch/arm64/boot/dts/rockchip/rk3528.dtsi | 110 +++++++++++++++++++++++
>  1 file changed, 110 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> index 826f9be0be19..2c9780069af9 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> @@ -24,6 +24,14 @@ aliases {
>  		gpio2 = &gpio2;
>  		gpio3 = &gpio3;
>  		gpio4 = &gpio4;
> +		i2c0 = &i2c0;
> +		i2c1 = &i2c1;
> +		i2c2 = &i2c2;
> +		i2c3 = &i2c3;
> +		i2c4 = &i2c4;
> +		i2c5 = &i2c5;
> +		i2c6 = &i2c6;
> +		i2c7 = &i2c7;
Aliases are not properties of the SoC but boards.

Best regards,
Krzysztof

Re: [PATCH v2 2/3] arm64: dts: rockchip: Add I2C controllers for RK3528

[Krzysztof Kozlowski]

On 17/04/2025 16:36, Krzysztof Kozlowski wrote:
> On 17/04/2025 14:01, Yao Zi wrote:
>> Describe I2C controllers shipped by RK3528 in devicetree. For I2C-2,
>> I2C-4 and I2C-7 which come with only a set of possible pins, a default
>> pin configuration is included.
>>
>> Signed-off-by: Yao Zi <ziyao@disroot.org>
>> ---
>>  arch/arm64/boot/dts/rockchip/rk3528.dtsi | 110 +++++++++++++++++++++++
>>  1 file changed, 110 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
>> index 826f9be0be19..2c9780069af9 100644
>> --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
>> +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
>> @@ -24,6 +24,14 @@ aliases {
>>  		gpio2 = &gpio2;
>>  		gpio3 = &gpio3;
>>  		gpio4 = &gpio4;
>> +		i2c0 = &i2c0;
>> +		i2c1 = &i2c1;
>> +		i2c2 = &i2c2;
>> +		i2c3 = &i2c3;
>> +		i2c4 = &i2c4;
>> +		i2c5 = &i2c5;
>> +		i2c6 = &i2c6;
>> +		i2c7 = &i2c7;
> Aliases are not properties of the SoC but boards.

Of course this should be: Bus/interface aliases are not...

Best regards,
Krzysztof

Re: [PATCH v2 2/3] arm64: dts: rockchip: Add I2C controllers for RK3528

[Yao Zi]

On Thu, Apr 17, 2025 at 04:36:57PM +0200, Krzysztof Kozlowski wrote:
> On 17/04/2025 16:36, Krzysztof Kozlowski wrote:
> > On 17/04/2025 14:01, Yao Zi wrote:
> >> Describe I2C controllers shipped by RK3528 in devicetree. For I2C-2,
> >> I2C-4 and I2C-7 which come with only a set of possible pins, a default
> >> pin configuration is included.
> >>
> >> Signed-off-by: Yao Zi <ziyao@disroot.org>
> >> ---
> >>  arch/arm64/boot/dts/rockchip/rk3528.dtsi | 110 +++++++++++++++++++++++
> >>  1 file changed, 110 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> >> index 826f9be0be19..2c9780069af9 100644
> >> --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> >> +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> >> @@ -24,6 +24,14 @@ aliases {
> >>  		gpio2 = &gpio2;
> >>  		gpio3 = &gpio3;
> >>  		gpio4 = &gpio4;
> >> +		i2c0 = &i2c0;
> >> +		i2c1 = &i2c1;
> >> +		i2c2 = &i2c2;
> >> +		i2c3 = &i2c3;
> >> +		i2c4 = &i2c4;
> >> +		i2c5 = &i2c5;
> >> +		i2c6 = &i2c6;
> >> +		i2c7 = &i2c7;
> > Aliases are not properties of the SoC but boards.
> 
> Of course this should be: Bus/interface aliases are not...

Thanks for the explanation. Will move them to the board DT.

> Best regards,
> Krzysztof

Best regards,
Yao Zi

Re: [PATCH v2 2/3] arm64: dts: rockchip: Add I2C controllers for RK3528

[Heiko Stübner]

Hi Krzysztof,

Am Donnerstag, 17. April 2025, 16:46:35 Mitteleuropäische Sommerzeit schrieb Yao Zi:
> On Thu, Apr 17, 2025 at 04:36:57PM +0200, Krzysztof Kozlowski wrote:
> > On 17/04/2025 16:36, Krzysztof Kozlowski wrote:
> > > On 17/04/2025 14:01, Yao Zi wrote:
> > >> Describe I2C controllers shipped by RK3528 in devicetree. For I2C-2,
> > >> I2C-4 and I2C-7 which come with only a set of possible pins, a default
> > >> pin configuration is included.
> > >>
> > >> Signed-off-by: Yao Zi <ziyao@disroot.org>
> > >> ---
> > >>  arch/arm64/boot/dts/rockchip/rk3528.dtsi | 110 +++++++++++++++++++++++
> > >>  1 file changed, 110 insertions(+)
> > >>
> > >> diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> > >> index 826f9be0be19..2c9780069af9 100644
> > >> --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> > >> +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> > >> @@ -24,6 +24,14 @@ aliases {
> > >>  		gpio2 = &gpio2;
> > >>  		gpio3 = &gpio3;
> > >>  		gpio4 = &gpio4;
> > >> +		i2c0 = &i2c0;
> > >> +		i2c1 = &i2c1;
> > >> +		i2c2 = &i2c2;
> > >> +		i2c3 = &i2c3;
> > >> +		i2c4 = &i2c4;
> > >> +		i2c5 = &i2c5;
> > >> +		i2c6 = &i2c6;
> > >> +		i2c7 = &i2c7;
> > > Aliases are not properties of the SoC but boards.
> > 
> > Of course this should be: Bus/interface aliases are not...
> 
> Thanks for the explanation. Will move them to the board DT.

I think we're having that discussion for every soc :-) .

Uarts. gpios, i2c and spi are always labeled foo[0-...] in all pieces
of Rockchip documentation.

The i2c0 controller has pins i2c0-scl, i2c0_sda; i2c0-labeled iomem;
i2c0-labeled irq, clk_i2c0, resetn_i2c0.


I completely _agree_ that {sdhci, sdmmc, emmc, sdio} -> mmcX is fully
board specific, but i2c0 should always get the i2c0 label and no other
controller should occupy that soc-specific i2c0-space, because that would
cause confusion without end.


And with the above it makes no real sense repeating the same list for
every individual board.

If you _insist_ on this, then fine, but I really don't see the point.


Heiko

Re: [PATCH v2 2/3] arm64: dts: rockchip: Add I2C controllers for RK3528

[Jonas Karlman]

On 2025-04-17 14:01, Yao Zi wrote:
> Describe I2C controllers shipped by RK3528 in devicetree. For I2C-2,
> I2C-4 and I2C-7 which come with only a set of possible pins, a default
> pin configuration is included.
> 
> Signed-off-by: Yao Zi <ziyao@disroot.org>

Reading from the i2c EEPROM on a E20C works with this, so this is:

Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

Regards,
Jonas

> ---
>  arch/arm64/boot/dts/rockchip/rk3528.dtsi | 110 +++++++++++++++++++++++
>  1 file changed, 110 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> index 826f9be0be19..2c9780069af9 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi
> @@ -24,6 +24,14 @@ aliases {
>  		gpio2 = &gpio2;
>  		gpio3 = &gpio3;
>  		gpio4 = &gpio4;
> +		i2c0 = &i2c0;
> +		i2c1 = &i2c1;
> +		i2c2 = &i2c2;
> +		i2c3 = &i2c3;
> +		i2c4 = &i2c4;
> +		i2c5 = &i2c5;
> +		i2c6 = &i2c6;
> +		i2c7 = &i2c7;
>  		serial0 = &uart0;
>  		serial1 = &uart1;
>  		serial2 = &uart2;
> @@ -465,6 +473,108 @@ uart7: serial@ffa28000 {
>  			status = "disabled";
>  		};
>  
> +		i2c0: i2c@ffa50000 {
> +			compatible = "rockchip,rk3528-i2c",
> +				     "rockchip,rk3399-i2c";
> +			reg = <0x0 0xffa50000 0x0 0x1000>;
> +			clocks = <&cru CLK_I2C0>, <&cru PCLK_I2C0>;
> +			clock-names = "i2c", "pclk";
> +			interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c1: i2c@ffa58000 {
> +			compatible = "rockchip,rk3528-i2c",
> +				     "rockchip,rk3399-i2c";
> +			reg = <0x0 0xffa58000 0x0 0x1000>;
> +			clocks = <&cru CLK_I2C1>, <&cru PCLK_I2C1>;
> +			clock-names = "i2c", "pclk";
> +			interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c2: i2c@ffa60000 {
> +			compatible = "rockchip,rk3528-i2c",
> +				     "rockchip,rk3399-i2c";
> +			reg = <0x0 0xffa60000 0x0 0x1000>;
> +			clocks = <&cru CLK_I2C2>, <&cru PCLK_I2C2>;
> +			clock-names = "i2c", "pclk";
> +			interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&i2c2m1_xfer>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c3: i2c@ffa68000 {
> +			compatible = "rockchip,rk3528-i2c",
> +				     "rockchip,rk3399-i2c";
> +			reg = <0x0 0xffa68000 0x0 0x1000>;
> +			clocks = <&cru CLK_I2C3>, <&cru PCLK_I2C3>;
> +			clock-names = "i2c", "pclk";
> +			interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c4: i2c@ffa70000 {
> +			compatible = "rockchip,rk3528-i2c",
> +				     "rockchip,rk3399-i2c";
> +			reg = <0x0 0xffa70000 0x0 0x1000>;
> +			clocks = <&cru CLK_I2C4>, <&cru PCLK_I2C4>;
> +			clock-names = "i2c", "pclk";
> +			interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&i2c4_xfer>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c5: i2c@ffa78000 {
> +			compatible = "rockchip,rk3528-i2c",
> +				     "rockchip,rk3399-i2c";
> +			reg = <0x0 0xffa78000 0x0 0x1000>;
> +			clocks = <&cru CLK_I2C5>, <&cru PCLK_I2C5>;
> +			clock-names = "i2c", "pclk";
> +			interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c6: i2c@ffa80000 {
> +			compatible = "rockchip,rk3528-i2c",
> +				     "rockchip,rk3399-i2c";
> +			reg = <0x0 0xffa80000 0x0 0x1000>;
> +			clocks = <&cru CLK_I2C6>, <&cru PCLK_I2C6>;
> +			clock-names = "i2c", "pclk";
> +			interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
> +		i2c7: i2c@ffa88000 {
> +			compatible = "rockchip,rk3528-i2c",
> +				     "rockchip,rk3399-i2c";
> +			reg = <0x0 0xffa88000 0x0 0x1000>;
> +			clocks = <&cru CLK_I2C7>, <&cru PCLK_I2C7>;
> +			clock-names = "i2c", "pclk";
> +			interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
> +			pinctrl-names = "default";
> +			pinctrl-0 = <&i2c7_xfer>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			status = "disabled";
> +		};
> +
>  		saradc: adc@ffae0000 {
>  			compatible = "rockchip,rk3528-saradc";
>  			reg = <0x0 0xffae0000 0x0 0x10000>;

Re: [PATCH v2 3/3] arm64: dts: rockchip: Add onboard EEPROM for Radxa E20C

[Jonas Karlman]

On 2025-04-17 14:01, Yao Zi wrote:
> Radxa E20C ships an onboard I2C EEPROM for storing production
> information. Enable it in devicetree.
> 
> Signed-off-by: Yao Zi <ziyao@disroot.org>

Reading from the EEPROM on my E20C works:

  $ hexdump -C /sys/devices/platform/soc/ffa58000.i2c/i2c-1/1-0050/1-00500/nvmem
  00000000  52 41 44 58 01 00 03 00  00 01 00 00 01 00 01 00  |RADX............|
  00000010  58 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |X...............|
  00000020  00 00 00 00 00 00 00 00  20 20 52 61 64 78 61 20  |........  Radxa |
  00000030  54 65 63 68 6e 6f 6c 6f  67 79 20 43 6f 2e 2c 20  |Technology Co., |
  00000040  4c 74 64 2e 00 00 00 00  00 00 44 31 45 38 31 30  |Ltd.......D1E810|
  00000050  4f 32 52 32 39 58 34 59  36 00 00 00 00 00 00 00  |O2R29X4Y6.......|
  00000060  00 00 00 00 00 00 00 00  00 00 9e 69 04 00 02 00  |...........i....|
  00000070  0c 00 00 00 01 00 56 31  2e 31 30 32 00 00 ed 09  |......V1.102....|
  00000080  05 00 03 00 78 00 00 00  01 00 30 00 00 00 00 00  |....x.....0.....|
  00000090  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 e0  |................|
  000000a0  4c 0d 0a 5c 00 e0 4c 0d  0a 5b 00 00 00 00 00 00  |L..\..L..[......|
  000000b0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
  *
  000000f0  00 00 00 00 00 00 00 00  00 00 00 00 00 00 cf 50  |...............P|

So this is:

Reviewed-by: Jonas Karlman <jonas@kwiboo.se>

Regards,
Jonas

> ---
>  arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
> index 57a446b5cbd6..6e77f7753ff7 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
> +++ b/arch/arm64/boot/dts/rockchip/rk3528-radxa-e20c.dts
> @@ -110,6 +110,20 @@ vcc5v0_sys: regulator-5v0-vcc-sys {
>  	};
>  };
>  
> +&i2c1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&i2c1m0_xfer>;
> +	status = "okay";
> +
> +	eeprom@50 {
> +		compatible = "belling,bl24c16a", "atmel,24c16";
> +		reg = <0x50>;
> +		pagesize = <16>;
> +		read-only;
> +		vcc-supply = <&vcc_3v3>;
> +	};
> +};
> +
>  &pinctrl {
>  	gpio-keys {
>  		user_key: user-key {

Re: [PATCH v2 1/3] dt-bindings: i2c: i2c-rk3x: Add compatible string for RK3528

[Heiko Stübner]

Hi Andi,

Am Donnerstag, 17. April 2025, 14:01:17 Mitteleuropäische Sommerzeit schrieb Yao Zi:
> Document I2C controllers integrated in RK3528, which are compatible with
> the RK3399 variant.
> 
> Signed-off-by: Yao Zi <ziyao@disroot.org>
> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Reviewed-by: Andi Shyti <andi.shyti@kernel.org>

do you expect to apply this patch to the i2c tree individually,
or have it go together with the devicetree patch?


Thanks a lot
Heiko

> ---
>  Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
> index 8101afa6f146..2f1e97969c3f 100644
> --- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
> +++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml
> @@ -37,6 +37,7 @@ properties:
>                - rockchip,px30-i2c
>                - rockchip,rk3308-i2c
>                - rockchip,rk3328-i2c
> +              - rockchip,rk3528-i2c
>                - rockchip,rk3562-i2c
>                - rockchip,rk3568-i2c
>                - rockchip,rk3576-i2c
> 

Re: [PATCH v2 1/3] dt-bindings: i2c: i2c-rk3x: Add compatible string for RK3528

[Andi Shyti]

Hi Heiko,

On Mon, May 05, 2025 at 09:49:36AM +0200, Heiko Stübner wrote:
> Am Donnerstag, 17. April 2025, 14:01:17 Mitteleuropäische Sommerzeit schrieb Yao Zi:
> > Document I2C controllers integrated in RK3528, which are compatible with
> > the RK3399 variant.
> > 
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
> 
> do you expect to apply this patch to the i2c tree individually,
> or have it go together with the devicetree patch?

with these patches, I normally wait a bit to see how the others
in the same series go before merging.

I now merged this patch into i2c/i2c-host.

If there is any particular need to merge everything together in
the devicetree, then I can take it out.

Thanks,
Andi

Re: [PATCH v2 1/3] dt-bindings: i2c: i2c-rk3x: Add compatible string for RK3528

[Heiko Stübner]

Hi Andi,

Am Montag, 5. Mai 2025, 22:47:04 Mitteleuropäische Sommerzeit schrieb Andi Shyti:
> Hi Heiko,
> 
> On Mon, May 05, 2025 at 09:49:36AM +0200, Heiko Stübner wrote:
> > Am Donnerstag, 17. April 2025, 14:01:17 Mitteleuropäische Sommerzeit schrieb Yao Zi:
> > > Document I2C controllers integrated in RK3528, which are compatible with
> > > the RK3399 variant.
> > > 
> > > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > > Reviewed-by: Heiko Stuebner <heiko@sntech.de>
> > > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > > Reviewed-by: Andi Shyti <andi.shyti@kernel.org>
> > 
> > do you expect to apply this patch to the i2c tree individually,
> > or have it go together with the devicetree patch?
> 
> with these patches, I normally wait a bit to see how the others
> in the same series go before merging.
> 
> I now merged this patch into i2c/i2c-host.
> 
> If there is any particular need to merge everything together in
> the devicetree, then I can take it out.

on the contrary ... I was hoping for exactly this :-) .

I.e. there is no need to merge everything together and the common pattern
is "binding goes through the driver-tree", dts goes through some soc-tree
(mine it this case).

But I can only merge the dts patches, _after_ the binding was merged,
so that was more of an elborate "ping" and _sometimes_ maintainers
might expect the binding just going with the dts patches.


So, thanks for merging the binding and I'll merge the dts patches now.


Thanks a lot
Heiko

Re: (subset) [PATCH v2 0/3] Support I2C controllers in RK3528

[Heiko Stuebner]

On Thu, 17 Apr 2025 12:01:16 +0000, Yao Zi wrote:
> RK3528 integrates eight I2C controllers which are compatible with the
> RK3399 variant of i2c-rk3x. This series documents the controllers in
> dt-bindings, describe them in SoC devicetree and enable the onboard
> EEPROM of Radxa E20C which is connected to I2C-2.
> 
> Changed from v1
> - rebase on top of linux-rockchip/for-next
> - dt-binding: collect review tags
> - SoC devicetree
>   - sort i2c and gpio in /aliases
>   - provide default pinctrl for controllers with only one set of
>     possible pins
> - Radxa E20C devicetree: mark eeprom as read-only
> 
> [...]

Applied, thanks!

[2/3] arm64: dts: rockchip: Add I2C controllers for RK3528
      commit: d3a05f490d048808968df1e0d3240ab01fe82211
[3/3] arm64: dts: rockchip: Add onboard EEPROM for Radxa E20C
      commit: 101fe8b5627c68b3f2f941266e26ac355131e2fe

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>