Re: [RFC 1/2] usb: phy: Add Qualcomm SS-USB and HS-USB drivers for DWC3 core

[Pawel Moll <pawel.moll@arm.com>]

On Tue, 2013-08-06 at 12:53 +0100, Ivan T. Ivanov wrote:
> From: "Ivan T. Ivanov" <iivanov@mm-sol.com>
> 
> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com>

I am sure that the information in the subject is more than enough for
you, but would you care to give some more background for the commit log?
Where can we find such controllers? What is DWC3 core? Is it
Qualcomm-specific block, or does it come from one of the IP providers
like Synopsys or Cadence?

>  .../devicetree/bindings/usb/msm-ssusb.txt          |   49 +++
>  drivers/usb/phy/Kconfig                            |   11 +
>  drivers/usb/phy/Makefile                           |    2 +
>  drivers/usb/phy/phy-msm-dwc3-usb2.c                |  342 +++++++++++++++++
>  drivers/usb/phy/phy-msm-dwc3-usb3.c                |  389 ++++++++++++++++++++
>  5 files changed, 793 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/usb/msm-ssusb.txt
>  create mode 100644 drivers/usb/phy/phy-msm-dwc3-usb2.c
>  create mode 100644 drivers/usb/phy/phy-msm-dwc3-usb3.c
> 
> diff --git a/Documentation/devicetree/bindings/usb/msm-ssusb.txt b/Documentation/devicetree/bindings/usb/msm-ssusb.txt
> new file mode 100644
> index 0000000..550b496
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/usb/msm-ssusb.txt
> @@ -0,0 +1,49 @@
> +MSM SuperSpeed USB3.0 SoC controllers

I understand that the device always come in doublets? As in: are nodes
for both USB2 and 3 always required?

> +Required properities :
> +- compatible sould be "qcom,dwc3-usb2";
> +- reg : offset and length of the register set in the memory map
> +- clocks: <&cxo>, <&usb2a_phy_sleep_cxc>;
> +- clock-names: "xo", "sleep_a_clk";
> +<supply-name>-supply: phandle to the regulator device tree node
> +Required "supply-name" examples are:

So required or examples? ;-)

> +       "v1p8" : 1.8v supply for HSPHY
> +       "v3p3" : 3.3v supply for HSPHY
> +       "vbus" : vbus supply for host mode
> +       "vddcx" : vdd supply for HS-PHY digital circuit operation
>
> +Required properities :
> +- compatible sould be "qcom,dwc3-usb3";
> +- reg : offset and length of the register set in the memory map
> +- clocks: <&cxo>, <&usb30_mock_utmi_cxc>;
> +- clock-names: "xo", "ref_clk";
> +<supply-name>-supply: phandle to the regulator device tree node
> +Required "supply-name" examples are:
> +       "v1p8" : 1.8v supply for SS-PHY
> +       "vddcx" : vdd supply for SS-PHY digital circuit operation
> +
> +Example device nodes:
> +
> +       dwc3_usb2: phy@f92f8800 {
> +               compatible = "qcom,dwc3-usb2";
> +               reg = <0xf92f8800 0x30>;
> +
> +               clocks = <&cxo>, <&usb2a_phy_sleep_cxc>;
> +               clock-names = "xo", "sleep_a_clk";
> +
> +               vbus-supply = <&supply>;
> +               vddcx-supply = <&supply>;
> +               v1p8-supply = <&supply>;
> +               v3p3-supply = <&supply>;
> +       };
> +
> +       dwc3_usb3: phy@f92f8830 {
> +               compatible = "qcom,dwc3-usb3";
> +               reg = <0xf92f8830 0x30>;
> +
> +               clocks = <&cxo>, <&usb30_mock_utmi_cxc>;
> +               clock-names = "xo", "ref_clk";
> +
> +               vddcx-supply = <&supply>;
> +               v1p8-supply = <&supply>;
> +       };

Note that I had a look at the bindings only - I don't feel competent to
review the drivers/usb part of the patch...

Thanks!

Pawel