From: Mark Langsdorf <mark.langsdorf@calxeda.com>
To: linux-kernel@vger.kernel.org, linux-ide@vger.kernel.org,
tj@kernel.org, devicetree@vger.kernel.org, pawel.moll@arm.com,
mark.rutland@arm.com, swarren@wwwdotorg.org,
ian.campbell@citrix.com, rob.herring@calxeda.com,
sergei.shtylyov@cogentembedded.com
Cc: Mark Langsdorf <mark.langsdorf@calxeda.com>
Subject: [PATCH v4 1/3] devicetree: create a separate binding description for sata_highbank
Date: Wed, 14 Aug 2013 13:23:30 -0500 [thread overview]
Message-ID: <1376504612-17340-1-git-send-email-mark.langsdorf@calxeda.com> (raw)
In-Reply-To: <1374851518-4802-1-git-send-email-mark.langsdorf@calxeda.com>
The Calxeda sata_highbank driver has been adding its descriptions to the
ahci driver. Separate them properly. This patch only affects
documentation and has no functional component.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
---
Changes from v3
Added all optional properties to the example.
Expanded the description.
Renumbered the patch series since the first two got accepted.
Changes from v2
Fixed some indenting.
Changes from v1
None.
Documentation/devicetree/bindings/ata/sata_highbank.txt | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/ata/sata_highbank.txt b/Documentation/devicetree/bindings/ata/sata_highbank.txt
index 1ac6d3d..e7a6f28 100644
--- a/Documentation/devicetree/bindings/ata/sata_highbank.txt
+++ b/Documentation/devicetree/bindings/ata/sata_highbank.txt
@@ -12,7 +12,7 @@ Required properties:
Optional properties:
- dma-coherent : Present if dma operations are coherent
-- calxeda,port-phys: phandle-combophy and lane assignment, which maps each
+- calxeda,port-phys : phandle-combophy and lane assignment, which maps each
SATA port to a combophy and a lane within that
combophy
- calxeda,sgpio-gpio: phandle-gpio bank, bit offset, and default on or off,
@@ -26,7 +26,9 @@ Example:
compatible = "calxeda,hb-ahci";
reg = <0xffe08000 0x1000>;
interrupts = <115>;
+ dma-coherent;
calxeda,port-phys = <&combophy5 0 &combophy0 0 &combophy0 1
&combophy0 2 &combophy0 3>;
-
+ calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
+ calxeda,led-order = <4 0 1 2 3>;
};
--
1.8.1.2
next prev parent reply other threads:[~2013-08-14 18:23 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-07-26 15:11 [PATCH 1/5] sata, highbank: fix ordering of SGPIO signals Mark Langsdorf
2013-07-26 15:11 ` [PATCH 2/5] sata highbank: enable 64-bit DMA mask when using LPAE Mark Langsdorf
2013-07-26 15:11 ` [PATCH 3/5] devicetree: create a separate binding description for sata_highbank Mark Langsdorf
2013-07-26 15:45 ` Rob Herring
2013-07-26 15:11 ` [PATCH 4/5] sata, highbank: set tx_atten override bits Mark Langsdorf
2013-07-26 16:22 ` Mark Rutland
2013-07-26 18:38 ` Rob Herring
2013-07-30 16:42 ` Mark Rutland
2013-08-02 15:24 ` Mark Langsdorf
2013-07-26 15:11 ` [PATCH 5/5] sata, highbank: send extra clock cycles in SGPIO patterns Mark Langsdorf
2013-07-26 15:48 ` Rob Herring
2013-07-26 16:26 ` Mark Rutland
2013-07-26 18:34 ` Rob Herring
2013-07-29 16:55 ` [PATCH 1/5] sata, highbank: fix ordering of SGPIO signals Tejun Heo
2013-08-02 15:23 ` Mark Langsdorf
2013-08-02 19:29 ` Tejun Heo
2013-08-14 18:23 ` Mark Langsdorf [this message]
2013-08-14 18:23 ` [PATCH v4 2/3] sata, highbank: set tx_atten override bits Mark Langsdorf
2013-08-14 18:23 ` [PATCH v4 3/3] sata, highbank: send extra clock cycles in SGPIO patterns Mark Langsdorf
2013-08-14 20:27 ` [PATCH v4 1/3] devicetree: create a separate binding description for sata_highbank Tejun Heo
2013-08-14 20:36 ` Mark Langsdorf
2013-08-14 20:37 ` Tejun Heo
2013-08-14 20:40 ` Mark Langsdorf
2013-08-14 20:44 ` Tejun Heo
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