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From: Huang Shijie <b32955@freescale.com>
To: broonie@kernel.org
Cc: dwmw2@infradead.org, dedekind1@gmail.com,
	computersforpeace@gmail.com, shawn.guo@linaro.org,
	kernel@pengutronix.de, b18965@freescale.com,
	b44548@freescale.com, B20596@freescale.com,
	linux-mtd@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org,
	devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
	Huang Shijie <b32955@freescale.com>
Subject: [PATCH v2 6/8] Documentation: add the binding file for Quadspi driver
Date: Mon, 26 Aug 2013 12:41:40 +0800	[thread overview]
Message-ID: <1377492102-23543-7-git-send-email-b32955@freescale.com> (raw)
In-Reply-To: <1377492102-23543-1-git-send-email-b32955@freescale.com>

This patch adds the binding file for Freescale Quadspi driver.

Signed-off-by: Huang Shijie <b32955@freescale.com>
---
 .../devicetree/bindings/spi/fsl-quadspi.txt        |   32 ++++++++++++++++++++
 1 files changed, 32 insertions(+), 0 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/spi/fsl-quadspi.txt

diff --git a/Documentation/devicetree/bindings/spi/fsl-quadspi.txt b/Documentation/devicetree/bindings/spi/fsl-quadspi.txt
new file mode 100644
index 0000000..ea834e3
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/fsl-quadspi.txt
@@ -0,0 +1,32 @@
+* Freescale Quad Serial Peripheral Interface(QuadSPI)
+
+Required properties:
+- compatible : Should be "fsl,vf610-qspi"
+- reg : Offset and length of the register set for the device
+- interrupts : Should contain the interrupt for the device
+- clocks : The clocks needed by the QuadSPI controller
+- clock-names : the name of the clocks
+- fsl,spi-num-chipselects : Contains the number of the chipselect
+
+Optional properties:
+- fsl,nor-size : If You set this property, it means that you connect the NOR
+                 flash to QuadSPI. This property is mainly used by the QuadSPI
+                 to map an AHB bus accessible address.
+
+Example:
+
+qspi0: quadspi@40044000 {
+	compatible = "fsl,vf610-qspi";
+	reg = <0x40044000 0x1000>;
+	interrupts = <0 24 0x04>;
+	clocks = <&clks VF610_CLK_QSPI0_EN>,
+		<&clks VF610_CLK_QSPI0>;
+	clock-names = "qspi_en", "qspi";
+	fsl,nor-size = <0x1000000>;
+	fsl,spi-num-chipselects = <1>;
+	status = "disabled";
+
+	flash0: s25fl128s@0 {
+		....
+	};
+};
-- 
1.7.1



  parent reply	other threads:[~2013-08-26  4:41 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2013-08-26  4:41 [PATCH v2 0/8] Add the Quadspi driver for vf610-twr Huang Shijie
2013-08-26  4:41 ` [PATCH v2 1/8] mtd: m25p80: move the spi-nor commands to a header Huang Shijie
2013-08-26  4:41 ` [PATCH v2 2/8] mtd: m25p80: add support for Spansion s25fl128s chip Huang Shijie
2013-08-26  4:41 ` [PATCH v2 3/8] mtd: m25p80: add the quad-read support Huang Shijie
2013-08-26  4:41 ` [PATCH v2 4/8] mtd: m25p80: add the DDR " Huang Shijie
2013-08-26  6:22   ` Sourav Poddar
2013-08-26 10:35     ` Huang Shijie
2013-08-26  4:41 ` [PATCH v2 5/8] spi: Add Freescale QuadSpi driver Huang Shijie
2013-08-26  6:10   ` Sourav Poddar
2013-08-26  6:21     ` Huang Shijie
2013-08-27 15:37     ` Mark Brown
2013-08-26  4:41 ` Huang Shijie [this message]
2013-08-26  4:41 ` [PATCH v2 7/8] ARM: dts: vf610: change the PAD values for Quadspi Huang Shijie
2013-08-26  4:41 ` [PATCH v2 8/8] ARM: dts: vf610-twr: Add SPI NOR support Huang Shijie

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