From: Sean Cross <xobs@kosagi.com>
To: devicetree@vger.kernel.org, linux-pci@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: Sascha Hauer <s.hauer@pengutronix.de>,
Zhu Richard-R65037 <r65037@freescale.com>,
Shawn Guo <shawn.guo@linaro.org>,
tharvey@gateworks.com, bhelgaas@google.com,
Sean Cross <xobs@kosagi.com>
Subject: [PATCH v5 2/3] ARM: imx6q: Add PCIe bits to GPR syscon definition
Date: Mon, 16 Sep 2013 05:48:16 +0000 [thread overview]
Message-ID: <1379310497-12362-3-git-send-email-xobs@kosagi.com> (raw)
In-Reply-To: <1379310497-12362-1-git-send-email-xobs@kosagi.com>
PCIe requires additional bits be defined for GPR8 and GPR12.
Signed-off-by: Sean Cross <xobs@kosagi.com>
---
include/linux/mfd/syscon/imx6q-iomuxc-gpr.h | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index b6bdcd6..e00e9f3 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -241,6 +241,12 @@
#define IMX6Q_GPR5_L2_CLK_STOP BIT(8)
+#define IMX6Q_GPR8_TX_SWING_LOW (0x7f << 25)
+#define IMX6Q_GPR8_TX_SWING_FULL (0x7f << 18)
+#define IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB (0x3f << 12)
+#define IMX6Q_GPR8_TX_DEEMPH_GEN2_3P5DB (0x3f << 6)
+#define IMX6Q_GPR8_TX_DEEMPH_GEN1 (0x3f << 0)
+
#define IMX6Q_GPR9_TZASC2_BYP BIT(1)
#define IMX6Q_GPR9_TZASC1_BYP BIT(0)
@@ -273,7 +279,9 @@
#define IMX6Q_GPR12_ARMP_AHB_CLK_EN BIT(26)
#define IMX6Q_GPR12_ARMP_ATB_CLK_EN BIT(25)
#define IMX6Q_GPR12_ARMP_APB_CLK_EN BIT(24)
+#define IMX6Q_GPR12_DEVICE_TYPE (0xf << 12)
#define IMX6Q_GPR12_PCIE_CTL_2 BIT(10)
+#define IMX6Q_GPR12_LOS_LEVEL (0x1f << 4)
#define IMX6Q_GPR13_SDMA_STOP_REQ BIT(30)
#define IMX6Q_GPR13_CAN2_STOP_REQ BIT(29)
--
1.7.9.5
next prev parent reply other threads:[~2013-09-16 5:48 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-09-16 5:48 [PATCH v5 0/3] Add PCIe support for i.MX6q Sean Cross
2013-09-16 5:48 ` Sean Cross [this message]
[not found] ` <1379310497-12362-1-git-send-email-xobs-nXMMniAx+RbQT0dZR+AlfA@public.gmane.org>
2013-09-16 5:48 ` [PATCH v5 1/3] ARM: imx: Add LVDS general-purpose clocks to i.MX6Q Sean Cross
[not found] ` <1379310497-12362-2-git-send-email-xobs-nXMMniAx+RbQT0dZR+AlfA@public.gmane.org>
2013-09-16 6:23 ` Shawn Guo
2013-09-16 5:48 ` [PATCH v5 3/3] PCI: imx6: Add support for i.MX6 PCIe controller Sean Cross
[not found] ` <1379310497-12362-4-git-send-email-xobs-nXMMniAx+RbQT0dZR+AlfA@public.gmane.org>
2013-09-16 6:14 ` Shawn Guo
2013-09-16 7:40 ` Sascha Hauer
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