From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dinh Nguyen Subject: Re: [PATCH 1/2] arm: dts: socfpga: Change some types of gate-clk type to periph-clk type Date: Tue, 1 Oct 2013 14:15:16 -0500 Message-ID: <1380654916.13502.1.camel@linux-builds1> References: <1379435486-25981-1-git-send-email-dinguyen@altera.com> Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1379435486-25981-1-git-send-email-dinguyen-EIB2kfCEclfQT0dZR+AlfA@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: dinh.linux-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org Cc: Rob Herring , Pawel Moll , Mark Rutland , Stephen Warren , Ian Campbell , Mike Turquette , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: devicetree@vger.kernel.org Hi, Just wondering if I can get any comments on this patch set? Thanks, Dinh On Tue, 2013-09-17 at 11:31 -0500, Dinh Nguyen wrote: > From: Dinh Nguyen > > Some of the clocks that were designated gate-clk did not have a gate, so > change those clocks to be of periph-clk type. > > Signed-off-by: Dinh Nguyen > Cc: Rob Herring > Cc: Pawel Moll > Cc: Mark Rutland > Cc: Stephen Warren > Cc: Ian Campbell > Cc: Mike Turquette > Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org > CC: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org > --- > arch/arm/boot/dts/socfpga.dtsi | 7 ++++--- > 1 file changed, 4 insertions(+), 3 deletions(-) > > diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi > index 1ee6079..acd6c3a 100644 > --- a/arch/arm/boot/dts/socfpga.dtsi > +++ b/arch/arm/boot/dts/socfpga.dtsi > @@ -245,14 +245,14 @@ > > mpu_periph_clk: mpu_periph_clk { > #clock-cells = <0>; > - compatible = "altr,socfpga-gate-clk"; > + compatible = "altr,socfpga-perip-clk"; > clocks = <&mpuclk>; > fixed-divider = <4>; > }; > > mpu_l2_ram_clk: mpu_l2_ram_clk { > #clock-cells = <0>; > - compatible = "altr,socfpga-gate-clk"; > + compatible = "altr,socfpga-perip-clk"; > clocks = <&mpuclk>; > fixed-divider = <2>; > }; > @@ -266,8 +266,9 @@ > > l3_main_clk: l3_main_clk { > #clock-cells = <0>; > - compatible = "altr,socfpga-gate-clk"; > + compatible = "altr,socfpga-perip-clk"; > clocks = <&mainclk>; > + fixed-divider = <1>; > }; > > l3_mp_clk: l3_mp_clk { -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html