[PATCH v3 0/4] mmc: omap_hsmmc: SDIO irq

[PATCH v3 0/4] mmc: omap_hsmmc: SDIO irq

[Andreas Fenkart]

Changes:
- split the subject patch into normal handling and
  workaround for am335x
- rebase

Andreas Fenkart (3):
  mmc: omap_hsmmc: Enable SDIO IRQ.
  mmc: omap_hsmmc: Remux pins to support SDIO interrupt on AM335x
  mmc: omap_hsmmc: debugfs for SDIO IRQ and GPIO remux

Tony Lindgren (1):
  mmc: omap_hsmmc: Fix context save and restore for DT

 .../devicetree/bindings/mmc/ti-omap-hsmmc.txt      |   42 +++
 drivers/mmc/host/omap_hsmmc.c                      |  363 +++++++++++++++++---
 include/linux/platform_data/mmc-omap.h             |    4 +
 3 files changed, 357 insertions(+), 52 deletions(-)

-- 
1.7.10.4

[PATCH v3 1/4] mmc: omap_hsmmc: Fix context save and restore for DT

[Andreas Fenkart]

From: Tony Lindgren <tony@atomide.com>

We want to get rid of the omap specific platform init code
callbacks as they don't play nice with device tree.

Let's convert the context loss check to be based on a
register state detection instead.

Cc: Andreas Fenkart <afenkart@gmail.com>
Cc: Balaji T K <balajitk@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 260cdb4..94d6dc8 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -198,19 +198,19 @@ struct omap_hsmmc_host {
 	unsigned char		bus_mode;
 	unsigned char		power_mode;
 	int			suspended;
+	u32			hctl;
+	u32			capa;
 	int			irq;
 	int			use_dma, dma_ch;
 	struct dma_chan		*tx_chan;
 	struct dma_chan		*rx_chan;
 	int			slot_id;
 	int			response_busy;
-	int			context_loss;
 	int			protect_card;
 	int			reqs_blocked;
 	int			use_reg;
 	int			req_in_progress;
 	struct omap_hsmmc_next	next_data;
-
 	struct	omap_mmc_platform_data	*pdata;
 };
 
@@ -624,25 +624,16 @@ static void omap_hsmmc_set_bus_mode(struct omap_hsmmc_host *host)
 static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host)
 {
 	struct mmc_ios *ios = &host->mmc->ios;
-	struct omap_mmc_platform_data *pdata = host->pdata;
-	int context_loss = 0;
 	u32 hctl, capa;
 	unsigned long timeout;
 
-	if (pdata->get_context_loss_count) {
-		context_loss = pdata->get_context_loss_count(host->dev);
-		if (context_loss < 0)
-			return 1;
-	}
-
-	dev_dbg(mmc_dev(host->mmc), "context was %slost\n",
-		context_loss == host->context_loss ? "not " : "");
-	if (host->context_loss == context_loss)
-		return 1;
-
 	if (!OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE)
 		return 1;
 
+	if (host->hctl == OMAP_HSMMC_READ(host->base, HCTL) &&
+	    host->capa == OMAP_HSMMC_READ(host->base, CAPA))
+		return 0;
+
 	if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) {
 		if (host->power_mode != MMC_POWER_OFF &&
 		    (1 << ios->vdd) <= MMC_VDD_23_24)
@@ -682,8 +673,6 @@ static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host)
 	omap_hsmmc_set_bus_mode(host);
 
 out:
-	host->context_loss = context_loss;
-
 	dev_dbg(mmc_dev(host->mmc), "context is restored\n");
 	return 0;
 }
@@ -693,15 +682,8 @@ out:
  */
 static void omap_hsmmc_context_save(struct omap_hsmmc_host *host)
 {
-	struct omap_mmc_platform_data *pdata = host->pdata;
-	int context_loss;
-
-	if (pdata->get_context_loss_count) {
-		context_loss = pdata->get_context_loss_count(host->dev);
-		if (context_loss < 0)
-			return;
-		host->context_loss = context_loss;
-	}
+	host->hctl = OMAP_HSMMC_READ(host->base, HCTL);
+	host->capa = OMAP_HSMMC_READ(host->base, CAPA);
 }
 
 #else
@@ -1662,13 +1644,6 @@ static int omap_hsmmc_regs_show(struct seq_file *s, void *data)
 {
 	struct mmc_host *mmc = s->private;
 	struct omap_hsmmc_host *host = mmc_priv(mmc);
-	int context_loss = 0;
-
-	if (host->pdata->get_context_loss_count)
-		context_loss = host->pdata->get_context_loss_count(host->dev);
-
-	seq_printf(s, "mmc%d:\n ctx_loss:\t%d:%d\n\nregs:\n",
-			mmc->index, host->context_loss, context_loss);
 
 	if (host->suspended) {
 		seq_printf(s, "host suspended, can't read registers\n");
-- 
1.7.10.4

[PATCH v3 2/4] mmc: omap_hsmmc: Enable SDIO IRQ.

[Andreas Fenkart]

For now, only support SDIO interrupt if we are booted with
DT. This is because some platforms need special quirks. And
we don't want to add new legacy mux platform init code
callbacks any longer as we are moving to DT based booting
anyways.

Broken hardware, missing the swakueup line, should fallback
to polling, by setting 'ti,quirk-swakup-missing' in the
device tree. Otherwise pending SDIO IRQ are not detected
while in suspend. This affects am33xx processors.

Signed-off-by: Andreas Fenkart <afenkart@gmail.com>

diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index ed271fc..1136e6b 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -20,6 +20,24 @@ ti,dual-volt: boolean, supports dual voltage cards
 ti,non-removable: non-removable slot (like eMMC)
 ti,needs-special-reset: Requires a special softreset sequence
 ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
+ti,quirk-swakup-missing: SOC missing the swakeup line, will not detect
+SDIO irq while in suspend. Fallback to polling. Affected chips are
+am335x,
+
+                            ------
+                            | PRCM |
+                             ------
+                              ^ |
+                      swakeup | | fclk
+                              | v
+      ------                -------               -----
+     | card | -- CIRQ -->  | hsmmc | -- IRQ -->  | CPU |
+      ------                -------               -----
+
+In suspend the fclk is off and the module is disfunctional. Even
+register reads will fail. A small logic in the host will request fclk
+restore, when an external event is detected. Once the clock is
+restored, the host detects the event normally.
 
 Example:
 	mmc1: mmc@0x4809c000 {
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 94d6dc8..53beac4 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -130,6 +130,7 @@ static void apply_clk_hack(struct device *dev)
 #define TC_EN			(1 << 1)
 #define BWR_EN			(1 << 4)
 #define BRR_EN			(1 << 5)
+#define CIRQ_EN			(1 << 8)
 #define ERR_EN			(1 << 15)
 #define CTO_EN			(1 << 16)
 #define CCRC_EN			(1 << 17)
@@ -210,6 +211,10 @@ struct omap_hsmmc_host {
 	int			reqs_blocked;
 	int			use_reg;
 	int			req_in_progress;
+	int                     flags;
+#define HSMMC_RUNTIME_SUSPENDED	(1 << 0)        /* Runtime suspended */
+#define HSMMC_SDIO_IRQ_ENABLED	(1 << 1)        /* SDIO irq enabled */
+
 	struct omap_hsmmc_next	next_data;
 	struct	omap_mmc_platform_data	*pdata;
 };
@@ -490,27 +495,40 @@ static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host)
 static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host,
 				  struct mmc_command *cmd)
 {
-	unsigned int irq_mask;
+	u32 irq_mask = INT_EN_MASK;
+	unsigned long flags;
 
 	if (host->use_dma)
-		irq_mask = INT_EN_MASK & ~(BRR_EN | BWR_EN);
-	else
-		irq_mask = INT_EN_MASK;
+		irq_mask &= ~(BRR_EN | BWR_EN);
 
 	/* Disable timeout for erases */
 	if (cmd->opcode == MMC_ERASE)
 		irq_mask &= ~DTO_EN;
 
+	spin_lock_irqsave(&host->irq_lock, flags);
 	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
 	OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
+
+	/* latch pending CIRQ, but don't signal */
+	if (host->flags & HSMMC_SDIO_IRQ_ENABLED)
+		irq_mask |= CIRQ_EN;
 	OMAP_HSMMC_WRITE(host->base, IE, irq_mask);
+	spin_unlock_irqrestore(&host->irq_lock, flags);
 }
 
 static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host)
 {
-	OMAP_HSMMC_WRITE(host->base, ISE, 0);
-	OMAP_HSMMC_WRITE(host->base, IE, 0);
+	u32 irq_mask = 0;
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->irq_lock, flags);
+	/* no transfer running, need to signal cirq if */
+	if (host->flags & HSMMC_SDIO_IRQ_ENABLED)
+		irq_mask |= CIRQ_EN;
+	OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
+	OMAP_HSMMC_WRITE(host->base, IE, irq_mask);
 	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
+	spin_unlock_irqrestore(&host->irq_lock, flags);
 }
 
 /* Calculate divisor for the given clock frequency */
@@ -1067,8 +1085,12 @@ static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id)
 	int status;
 
 	status = OMAP_HSMMC_READ(host->base, STAT);
-	while (status & INT_EN_MASK && host->req_in_progress) {
-		omap_hsmmc_do_irq(host, status);
+	while (status & (INT_EN_MASK | CIRQ_EN)) {
+		if (host->req_in_progress)
+			omap_hsmmc_do_irq(host, status);
+
+		if (status & CIRQ_EN)
+			mmc_signal_sdio_irq(host->mmc);
 
 		/* Flush posted write */
 		status = OMAP_HSMMC_READ(host->base, STAT);
@@ -1583,6 +1605,42 @@ static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
 		mmc_slot(host).init_card(card);
 }
 
+static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
+{
+	struct omap_hsmmc_host *host = mmc_priv(mmc);
+	u32 irq_mask;
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->irq_lock, flags);
+
+	if (enable)
+		host->flags |= HSMMC_SDIO_IRQ_ENABLED;
+	else
+		host->flags &= ~HSMMC_SDIO_IRQ_ENABLED;
+
+	/* if statement here with followup patch */
+	{
+		irq_mask = OMAP_HSMMC_READ(host->base, ISE);
+		if (enable)
+			irq_mask |= CIRQ_EN;
+		else
+			irq_mask &= ~CIRQ_EN;
+		OMAP_HSMMC_WRITE(host->base, IE, irq_mask);
+
+		/*
+		 * if enable, piggy back on current request
+		 * but always disable
+		 */
+		if (!host->req_in_progress || !enable)
+			OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
+
+		/* flush posted write */
+		OMAP_HSMMC_READ(host->base, IE);
+	}
+
+	spin_unlock_irqrestore(&host->irq_lock, flags);
+}
+
 static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host)
 {
 	u32 hctl, capa, value;
@@ -1635,7 +1693,7 @@ static const struct mmc_host_ops omap_hsmmc_ops = {
 	.get_cd = omap_hsmmc_get_cd,
 	.get_ro = omap_hsmmc_get_ro,
 	.init_card = omap_hsmmc_init_card,
-	/* NYET -- enable_sdio_irq */
+	.enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
 };
 
 #ifdef CONFIG_DEBUG_FS
@@ -1833,6 +1891,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
 	host->dma_ch	= -1;
 	host->irq	= irq;
 	host->slot_id	= 0;
+	host->flags	= 0;
 	host->mapbase	= res->start + pdata->reg_offset;
 	host->base	= ioremap(host->mapbase, SZ_4K);
 	host->power_mode = MMC_POWER_OFF;
@@ -2023,6 +2082,22 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
 		dev_warn(&pdev->dev,
 			"pins are not configured from the driver\n");
 
+	/*
+	 * For now, only support SDIO interrupt if we are booted with
+	 * DT. This is because some platforms need special quirks. And
+	 * we don't want to add new legacy mux platform init code
+	 * callbacks any longer as we are moving to DT based booting
+	 * anyways.
+	 */
+	if (match) {
+		mmc->caps |= MMC_CAP_SDIO_IRQ;
+		if (of_find_property(host->dev->of_node,
+				     "ti,quirk-swakeup-missing", NULL)) {
+			/* no wakeup from deeper power states, use polling */
+			mmc->caps &= ~MMC_CAP_SDIO_IRQ;
+		}
+	}
+
 	omap_hsmmc_protect_card(host);
 
 	mmc_add_host(mmc);
-- 
1.7.10.4

Re: [PATCH v3 2/4] mmc: omap_hsmmc: Enable SDIO IRQ.

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 6549 bytes --]

Hi,

On Sat, Oct 05, 2013 at 01:17:08PM +0200, Andreas Fenkart wrote:
> For now, only support SDIO interrupt if we are booted with
> DT. This is because some platforms need special quirks. And
> we don't want to add new legacy mux platform init code
> callbacks any longer as we are moving to DT based booting
> anyways.
> 
> Broken hardware, missing the swakueup line, should fallback
> to polling, by setting 'ti,quirk-swakup-missing' in the
> device tree. Otherwise pending SDIO IRQ are not detected
> while in suspend. This affects am33xx processors.
> 
> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>

I still think this patch needs to be splitted, see below.

> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> index 94d6dc8..53beac4 100644
> --- a/drivers/mmc/host/omap_hsmmc.c
> +++ b/drivers/mmc/host/omap_hsmmc.c
> @@ -130,6 +130,7 @@ static void apply_clk_hack(struct device *dev)
>  #define TC_EN			(1 << 1)
>  #define BWR_EN			(1 << 4)
>  #define BRR_EN			(1 << 5)
> +#define CIRQ_EN			(1 << 8)
>  #define ERR_EN			(1 << 15)
>  #define CTO_EN			(1 << 16)
>  #define CCRC_EN			(1 << 17)
> @@ -210,6 +211,10 @@ struct omap_hsmmc_host {
>  	int			reqs_blocked;
>  	int			use_reg;
>  	int			req_in_progress;
> +	int                     flags;
> +#define HSMMC_RUNTIME_SUSPENDED	(1 << 0)        /* Runtime suspended */
> +#define HSMMC_SDIO_IRQ_ENABLED	(1 << 1)        /* SDIO irq enabled */
> +
>  	struct omap_hsmmc_next	next_data;
>  	struct	omap_mmc_platform_data	*pdata;
>  };
> @@ -490,27 +495,40 @@ static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host)
>  static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host,
>  				  struct mmc_command *cmd)
>  {
> -	unsigned int irq_mask;
> +	u32 irq_mask = INT_EN_MASK;
> +	unsigned long flags;
>  
>  	if (host->use_dma)
> -		irq_mask = INT_EN_MASK & ~(BRR_EN | BWR_EN);
> -	else
> -		irq_mask = INT_EN_MASK;
> +		irq_mask &= ~(BRR_EN | BWR_EN);

is this a bugfix ? should it be sent as a separate patch ?

>  
>  	/* Disable timeout for erases */
>  	if (cmd->opcode == MMC_ERASE)
>  		irq_mask &= ~DTO_EN;
>  
> +	spin_lock_irqsave(&host->irq_lock, flags);

why do you need this new locking here ? register acesses are atomic,
right ? If you really do need the locking, should it be a separate patch
as well ?

>  	OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
>  	OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
> +
> +	/* latch pending CIRQ, but don't signal */
> +	if (host->flags & HSMMC_SDIO_IRQ_ENABLED)
> +		irq_mask |= CIRQ_EN;

why do you need this ? Looks like it should be yet another patch.
>  
>  static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host)
>  {
> -	OMAP_HSMMC_WRITE(host->base, ISE, 0);
> -	OMAP_HSMMC_WRITE(host->base, IE, 0);
> +	u32 irq_mask = 0;
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&host->irq_lock, flags);
> +	/* no transfer running, need to signal cirq if */

if... ?

> +	if (host->flags & HSMMC_SDIO_IRQ_ENABLED)
> +		irq_mask |= CIRQ_EN;
> +	OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);

the whole fiddling with STAT and ISE registers look very bogus to me
(even on current state before this patch). We shouldn't be clearing
pending IRQ events here, right ? We could miss IRQs due to that.

> @@ -1067,8 +1085,12 @@ static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id)
>  	int status;
>  
>  	status = OMAP_HSMMC_READ(host->base, STAT);
> -	while (status & INT_EN_MASK && host->req_in_progress) {
> -		omap_hsmmc_do_irq(host, status);
> +	while (status & (INT_EN_MASK | CIRQ_EN)) {

why don't enable CIRQ_EN in INT_EN_MASK directly ?

> +		if (host->req_in_progress)
> +			omap_hsmmc_do_irq(host, status);
> +
> +		if (status & CIRQ_EN)
> +			mmc_signal_sdio_irq(host->mmc);
>  
>  		/* Flush posted write */
>  		status = OMAP_HSMMC_READ(host->base, STAT);
> @@ -1583,6 +1605,42 @@ static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
>  		mmc_slot(host).init_card(card);
>  }
>  
> +static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
> +{
> +	struct omap_hsmmc_host *host = mmc_priv(mmc);
> +	u32 irq_mask;
> +	unsigned long flags;
> +
> +	spin_lock_irqsave(&host->irq_lock, flags);
> +
> +	if (enable)
> +		host->flags |= HSMMC_SDIO_IRQ_ENABLED;
> +	else
> +		host->flags &= ~HSMMC_SDIO_IRQ_ENABLED;
> +
> +	/* if statement here with followup patch */
> +	{
> +		irq_mask = OMAP_HSMMC_READ(host->base, ISE);
> +		if (enable)
> +			irq_mask |= CIRQ_EN;
> +		else
> +			irq_mask &= ~CIRQ_EN;

perhaps combine this branch with previous one ?

> +		OMAP_HSMMC_WRITE(host->base, IE, irq_mask);
> +
> +		/*
> +		 * if enable, piggy back on current request
> +		 * but always disable
> +		 */
> +		if (!host->req_in_progress || !enable)
> +			OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
> +
> +		/* flush posted write */
> +		OMAP_HSMMC_READ(host->base, IE);
> +	}
> +
> +	spin_unlock_irqrestore(&host->irq_lock, flags);
> +}
> +
>  static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host)
>  {
>  	u32 hctl, capa, value;
> @@ -1635,7 +1693,7 @@ static const struct mmc_host_ops omap_hsmmc_ops = {
>  	.get_cd = omap_hsmmc_get_cd,
>  	.get_ro = omap_hsmmc_get_ro,
>  	.init_card = omap_hsmmc_init_card,
> -	/* NYET -- enable_sdio_irq */
> +	.enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
>  };
>  
>  #ifdef CONFIG_DEBUG_FS
> @@ -1833,6 +1891,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
>  	host->dma_ch	= -1;
>  	host->irq	= irq;
>  	host->slot_id	= 0;
> +	host->flags	= 0;

why do you need to zero-initialize flags here ? another bug ?

> @@ -2023,6 +2082,22 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
>  		dev_warn(&pdev->dev,
>  			"pins are not configured from the driver\n");
>  
> +	/*
> +	 * For now, only support SDIO interrupt if we are booted with
> +	 * DT. This is because some platforms need special quirks. And
> +	 * we don't want to add new legacy mux platform init code
> +	 * callbacks any longer as we are moving to DT based booting
> +	 * anyways.
> +	 */
> +	if (match) {

isn't if (dev->of.node) a better check here ?

> +		mmc->caps |= MMC_CAP_SDIO_IRQ;
> +		if (of_find_property(host->dev->of_node,
> +				     "ti,quirk-swakeup-missing", NULL)) {

looks like a SW configuration to me. Can't you figure this out by
reading the revision register ?

-- 
balbi

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Re: [PATCH v3 2/4] mmc: omap_hsmmc: Enable SDIO IRQ.

[Andreas Fenkart]

Hi

2013/10/8 Felipe Balbi <balbi@ti.com>:
> Hi,
>
> On Sat, Oct 05, 2013 at 01:17:08PM +0200, Andreas Fenkart wrote:
>> For now, only support SDIO interrupt if we are booted with
>> DT. This is because some platforms need special quirks. And
>> we don't want to add new legacy mux platform init code
>> callbacks any longer as we are moving to DT based booting
>> anyways.
>>
>> Broken hardware, missing the swakueup line, should fallback
>> to polling, by setting 'ti,quirk-swakup-missing' in the
>> device tree. Otherwise pending SDIO IRQ are not detected
>> while in suspend. This affects am33xx processors.
>>
>> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
>
> I still think this patch needs to be splitted, see below.
>
>> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
>> index 94d6dc8..53beac4 100644
>> --- a/drivers/mmc/host/omap_hsmmc.c
>> +++ b/drivers/mmc/host/omap_hsmmc.c
>> @@ -130,6 +130,7 @@ static void apply_clk_hack(struct device *dev)
>>  #define TC_EN                        (1 << 1)
>>  #define BWR_EN                       (1 << 4)
>>  #define BRR_EN                       (1 << 5)
>> +#define CIRQ_EN                      (1 << 8)
>>  #define ERR_EN                       (1 << 15)
>>  #define CTO_EN                       (1 << 16)
>>  #define CCRC_EN                      (1 << 17)
>> @@ -210,6 +211,10 @@ struct omap_hsmmc_host {
>>       int                     reqs_blocked;
>>       int                     use_reg;
>>       int                     req_in_progress;
>> +     int                     flags;
>> +#define HSMMC_RUNTIME_SUSPENDED      (1 << 0)        /* Runtime suspended */
>> +#define HSMMC_SDIO_IRQ_ENABLED       (1 << 1)        /* SDIO irq enabled */
>> +
>>       struct omap_hsmmc_next  next_data;
>>       struct  omap_mmc_platform_data  *pdata;
>>  };
>> @@ -490,27 +495,40 @@ static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host)
>>  static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host,
>>                                 struct mmc_command *cmd)
>>  {
>> -     unsigned int irq_mask;
>> +     u32 irq_mask = INT_EN_MASK;
>> +     unsigned long flags;
>>
>>       if (host->use_dma)
>> -             irq_mask = INT_EN_MASK & ~(BRR_EN | BWR_EN);
>> -     else
>> -             irq_mask = INT_EN_MASK;
>> +             irq_mask &= ~(BRR_EN | BWR_EN);
>
> is this a bugfix ? should it be sent as a separate patch ?

maybe the u32, but otherwise it's just shorter... shall I drop it.

>>
>>       /* Disable timeout for erases */
>>       if (cmd->opcode == MMC_ERASE)
>>               irq_mask &= ~DTO_EN;
>>
>> +     spin_lock_irqsave(&host->irq_lock, flags);
>
> why do you need this new locking here ? register acesses are atomic,
> right ? If you really do need the locking, should it be a separate patch
> as well ?

because host->flags can be accessed from irq context as well

>>       OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
>>       OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
>> +
>> +     /* latch pending CIRQ, but don't signal */
>> +     if (host->flags & HSMMC_SDIO_IRQ_ENABLED)
>> +             irq_mask |= CIRQ_EN;

<- imagine sdio irq here ->
with the next write we would reenable sdio irq, despite the irq handler
having them disabled

>
> why do you need this ? Looks like it should be yet another patch.

>>
>>  static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host)
>>  {
>> -     OMAP_HSMMC_WRITE(host->base, ISE, 0);
>> -     OMAP_HSMMC_WRITE(host->base, IE, 0);
>> +     u32 irq_mask = 0;
>> +     unsigned long flags;
>> +
>> +     spin_lock_irqsave(&host->irq_lock, flags);
>> +     /* no transfer running, need to signal cirq if */
>
> if... ?
>
>> +     if (host->flags & HSMMC_SDIO_IRQ_ENABLED)
>> +             irq_mask |= CIRQ_EN;
>> +     OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
>
> the whole fiddling with STAT and ISE registers look very bogus to me
> (even on current state before this patch). We shouldn't be clearing
> pending IRQ events here, right ? We could miss IRQs due to that.

sdio_claim_host excludes multiple users and  typical users are using synchronous
communication, issue a transfer, wait till it's done, then release the host.
Hence when we come here, the content of ISE/STAT is a leftover from
the previous transfer.
Probably the intent here is to reset the registers in defined state,
maybe it wasn't needed
but it doesn't hurt either.

It's conservative... I don't like to change it, along the side of my
sdio irq patches.
If I did lots of such changes, surely I would create a regression.

On the other side If I was up to optimize the driver, then I would do this.


>
>> @@ -1067,8 +1085,12 @@ static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id)
>>       int status;
>>
>>       status = OMAP_HSMMC_READ(host->base, STAT);
>> -     while (status & INT_EN_MASK && host->req_in_progress) {
>> -             omap_hsmmc_do_irq(host, status);
>> +     while (status & (INT_EN_MASK | CIRQ_EN)) {
>
> why don't enable CIRQ_EN in INT_EN_MASK directly ?

INT_EN_MASK is also used when bootstrapping the card in
send_init_stream, but there
you don't want to enable sdio irqs. So I would have to mask it there,
so this is the smaller
change.

>
>> +             if (host->req_in_progress)
>> +                     omap_hsmmc_do_irq(host, status);
>> +
>> +             if (status & CIRQ_EN)
>> +                     mmc_signal_sdio_irq(host->mmc);
>>
>>               /* Flush posted write */
>>               status = OMAP_HSMMC_READ(host->base, STAT);
>> @@ -1583,6 +1605,42 @@ static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card)
>>               mmc_slot(host).init_card(card);
>>  }
>>
>> +static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
>> +{
>> +     struct omap_hsmmc_host *host = mmc_priv(mmc);
>> +     u32 irq_mask;
>> +     unsigned long flags;
>> +
>> +     spin_lock_irqsave(&host->irq_lock, flags);
>> +
>> +     if (enable)
>> +             host->flags |= HSMMC_SDIO_IRQ_ENABLED;
>> +     else
>> +             host->flags &= ~HSMMC_SDIO_IRQ_ENABLED;
>> +
>> +     /* if statement here with followup patch */
>> +     {
>> +             irq_mask = OMAP_HSMMC_READ(host->base, ISE);
>> +             if (enable)
>> +                     irq_mask |= CIRQ_EN;
>> +             else
>> +                     irq_mask &= ~CIRQ_EN;
>
> perhaps combine this branch with previous one ?
>
>> +             OMAP_HSMMC_WRITE(host->base, IE, irq_mask);
>> +
>> +             /*
>> +              * if enable, piggy back on current request
>> +              * but always disable
>> +              */
>> +             if (!host->req_in_progress || !enable)
>> +                     OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
>> +
>> +             /* flush posted write */
>> +             OMAP_HSMMC_READ(host->base, IE);
>> +     }
>> +
>> +     spin_unlock_irqrestore(&host->irq_lock, flags);
>> +}
>> +
>>  static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host)
>>  {
>>       u32 hctl, capa, value;
>> @@ -1635,7 +1693,7 @@ static const struct mmc_host_ops omap_hsmmc_ops = {
>>       .get_cd = omap_hsmmc_get_cd,
>>       .get_ro = omap_hsmmc_get_ro,
>>       .init_card = omap_hsmmc_init_card,
>> -     /* NYET -- enable_sdio_irq */
>> +     .enable_sdio_irq = omap_hsmmc_enable_sdio_irq,
>>  };
>>
>>  #ifdef CONFIG_DEBUG_FS
>> @@ -1833,6 +1891,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
>>       host->dma_ch    = -1;
>>       host->irq       = irq;
>>       host->slot_id   = 0;
>> +     host->flags     = 0;
>
> why do you need to zero-initialize flags here ? another bug ?
>
>> @@ -2023,6 +2082,22 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
>>               dev_warn(&pdev->dev,
>>                       "pins are not configured from the driver\n");
>>
>> +     /*
>> +      * For now, only support SDIO interrupt if we are booted with
>> +      * DT. This is because some platforms need special quirks. And
>> +      * we don't want to add new legacy mux platform init code
>> +      * callbacks any longer as we are moving to DT based booting
>> +      * anyways.
>> +      */
>> +     if (match) {
>
> isn't if (dev->of.node) a better check here ?
>
>> +             mmc->caps |= MMC_CAP_SDIO_IRQ;
>> +             if (of_find_property(host->dev->of_node,
>> +                                  "ti,quirk-swakeup-missing", NULL)) {
>
> looks like a SW configuration to me. Can't you figure this out by
> reading the revision register ?

It's not about the IP block, but about the SOC, so I guess that would
be brittle.
There could be an SOC using the same IP block revision but having the
wakeup line.

I was thinking about triggering on the device trees compatible section.

 compatible = "ti,am33xx"  -> use some fallback
 otherwise    -> enable irq.



Thanks for the review, appreciate it
Andreas

>
> --
> balbi

Re: [PATCH v3 2/4] mmc: omap_hsmmc: Enable SDIO IRQ.

[Felipe Balbi]

[-- Attachment #1: Type: text/plain, Size: 4600 bytes --]

Hi,

On Tue, Oct 29, 2013 at 04:06:58PM +0100, Andreas Fenkart wrote:
> >> diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
> >> index 94d6dc8..53beac4 100644
> >> --- a/drivers/mmc/host/omap_hsmmc.c
> >> +++ b/drivers/mmc/host/omap_hsmmc.c
> >> @@ -130,6 +130,7 @@ static void apply_clk_hack(struct device *dev)
> >>  #define TC_EN                        (1 << 1)
> >>  #define BWR_EN                       (1 << 4)
> >>  #define BRR_EN                       (1 << 5)
> >> +#define CIRQ_EN                      (1 << 8)
> >>  #define ERR_EN                       (1 << 15)
> >>  #define CTO_EN                       (1 << 16)
> >>  #define CCRC_EN                      (1 << 17)
> >> @@ -210,6 +211,10 @@ struct omap_hsmmc_host {
> >>       int                     reqs_blocked;
> >>       int                     use_reg;
> >>       int                     req_in_progress;
> >> +     int                     flags;
> >> +#define HSMMC_RUNTIME_SUSPENDED      (1 << 0)        /* Runtime suspended */
> >> +#define HSMMC_SDIO_IRQ_ENABLED       (1 << 1)        /* SDIO irq enabled */
> >> +
> >>       struct omap_hsmmc_next  next_data;
> >>       struct  omap_mmc_platform_data  *pdata;
> >>  };
> >> @@ -490,27 +495,40 @@ static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host)
> >>  static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host,
> >>                                 struct mmc_command *cmd)
> >>  {
> >> -     unsigned int irq_mask;
> >> +     u32 irq_mask = INT_EN_MASK;
> >> +     unsigned long flags;
> >>
> >>       if (host->use_dma)
> >> -             irq_mask = INT_EN_MASK & ~(BRR_EN | BWR_EN);
> >> -     else
> >> -             irq_mask = INT_EN_MASK;
> >> +             irq_mask &= ~(BRR_EN | BWR_EN);
> >
> > is this a bugfix ? should it be sent as a separate patch ?
> 
> maybe the u32, but otherwise it's just shorter... shall I drop it.

no, now I saw what you did ;-)

> >>
> >>       /* Disable timeout for erases */
> >>       if (cmd->opcode == MMC_ERASE)
> >>               irq_mask &= ~DTO_EN;
> >>
> >> +     spin_lock_irqsave(&host->irq_lock, flags);
> >
> > why do you need this new locking here ? register acesses are atomic,
> > right ? If you really do need the locking, should it be a separate patch
> > as well ?
> 
> because host->flags can be accessed from irq context as well

fair point :-)

> >>  static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host)
> >>  {
> >> -     OMAP_HSMMC_WRITE(host->base, ISE, 0);
> >> -     OMAP_HSMMC_WRITE(host->base, IE, 0);
> >> +     u32 irq_mask = 0;
> >> +     unsigned long flags;
> >> +
> >> +     spin_lock_irqsave(&host->irq_lock, flags);
> >> +     /* no transfer running, need to signal cirq if */
> >
> > if... ?
> >
> >> +     if (host->flags & HSMMC_SDIO_IRQ_ENABLED)
> >> +             irq_mask |= CIRQ_EN;
> >> +     OMAP_HSMMC_WRITE(host->base, ISE, irq_mask);
> >
> > the whole fiddling with STAT and ISE registers look very bogus to me
> > (even on current state before this patch). We shouldn't be clearing
> > pending IRQ events here, right ? We could miss IRQs due to that.
> 
> sdio_claim_host excludes multiple users and  typical users are using synchronous
> communication, issue a transfer, wait till it's done, then release the host.
> Hence when we come here, the content of ISE/STAT is a leftover from
> the previous transfer.
> Probably the intent here is to reset the registers in defined state,
> maybe it wasn't needed
> but it doesn't hurt either.
> 
> It's conservative... I don't like to change it, along the side of my
> sdio irq patches.
> If I did lots of such changes, surely I would create a regression.
> 
> On the other side If I was up to optimize the driver, then I would do this.

sure, that was an unrelated comment, just exposing some possible problem
with that approach :-)

> >> @@ -1067,8 +1085,12 @@ static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id)
> >>       int status;
> >>
> >>       status = OMAP_HSMMC_READ(host->base, STAT);
> >> -     while (status & INT_EN_MASK && host->req_in_progress) {
> >> -             omap_hsmmc_do_irq(host, status);
> >> +     while (status & (INT_EN_MASK | CIRQ_EN)) {
> >
> > why don't enable CIRQ_EN in INT_EN_MASK directly ?
> 
> INT_EN_MASK is also used when bootstrapping the card in
> send_init_stream, but there
> you don't want to enable sdio irqs. So I would have to mask it there,
> so this is the smaller
> change.

true, fair enough.

-- 
balbi

[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 836 bytes --]

Re: [PATCH v3 2/4] mmc: omap_hsmmc: Enable SDIO IRQ.

[Kumar Gala]

On Oct 5, 2013, at 6:17 AM, Andreas Fenkart wrote:

> For now, only support SDIO interrupt if we are booted with
> DT. This is because some platforms need special quirks. And
> we don't want to add new legacy mux platform init code
> callbacks any longer as we are moving to DT based booting
> anyways.
> 
> Broken hardware, missing the swakueup line, should fallback
> to polling, by setting 'ti,quirk-swakup-missing' in the
> device tree. Otherwise pending SDIO IRQ are not detected
> while in suspend. This affects am33xx processors.
> 
> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
> 
> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> index ed271fc..1136e6b 100644
> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> @@ -20,6 +20,24 @@ ti,dual-volt: boolean, supports dual voltage cards
> ti,non-removable: non-removable slot (like eMMC)
> ti,needs-special-reset: Requires a special softreset sequence
> ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
> +ti,quirk-swakup-missing: SOC missing the swakeup line, will not detect
> +SDIO irq while in suspend. Fallback to polling. Affected chips are
> +am335x,
> +
> +                            ------
> +                            | PRCM |
> +                             ------
> +                              ^ |
> +                      swakeup | | fclk
> +                              | v
> +      ------                -------               -----
> +     | card | -- CIRQ -->  | hsmmc | -- IRQ -->  | CPU |
> +      ------                -------               -----
> +
> +In suspend the fclk is off and the module is disfunctional. Even
> +register reads will fail. A small logic in the host will request fclk
> +restore, when an external event is detected. Once the clock is
> +restored, the host detects the event normally.
> 
> Example:
> 	mmc1: mmc@0x4809c000 {

For the DT-Binding portion:

Acked-by: Kumar Gala <galak@codeaurora.org>

- k

-- 
Employee of Qualcomm Innovation Center, Inc.
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

[PATCH v3 3/4] mmc: omap_hsmmc: Remux pins to support SDIO interrupt on AM335x

[Andreas Fenkart]

The am335x can't detect pending cirq in PM runtime suspend.
This patch reconfigures dat1 as a GPIO before going to suspend.
SDIO interrupts are detected with the GPIO, while in runtime
suspend, standard detection of the module block otherwise.

Signed-off-by: Andreas Fenkart <afenkart@gmail.com>

diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
index 1136e6b..146f3ad 100644
--- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
+++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
@@ -21,8 +21,11 @@ ti,non-removable: non-removable slot (like eMMC)
 ti,needs-special-reset: Requires a special softreset sequence
 ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
 ti,quirk-swakup-missing: SOC missing the swakeup line, will not detect
-SDIO irq while in suspend. Fallback to polling. Affected chips are
-am335x,
+SDIO irq while in suspend. The workaround is to reconfigure the dat1 line as a
+GPIO upon suspend. Beyond this option and the GPIO config, you also need to set
+named pinctrl states "default", "active" and "idle ", see example below.  The
+MMC driver will then then toggle between default and idle during the runtime
+Affected chips are am335x,
 
                             ------
                             | PRCM |
@@ -49,3 +52,24 @@ Example:
 		vmmc-supply = <&vmmc>; /* phandle to regulator node */
 		ti,non-removable;
 	};
+
+[am335x with with gpio for sdio irq]
+
+	mmc1_cirq_pin: pinmux_cirq_pin {
+		pinctrl-single,pins = <
+			0x0f8 0x3f	/* MMC0_DAT1 as GPIO2_28 */
+		>;
+	};
+
+	mmc1: mmc@48060000 {
+		ti,non-removable;
+		bus-width = <4>;
+		vmmc-supply = <&ldo2_reg>;
+		vmmc_aux-supply = <&vmmc>;
+	        ti,quirk-swakeup-missing;
+		pinctrl-names = "default", "active", "idle";
+		pinctrl-0 = <&mmc1_pins>;
+		pinctrl-1 = <&mmc1_pins>;
+		pinctrl-2 = <&mmc1_cirq_pin>;
+		ti,cirq-gpio = <&gpio3 28 0>;
+	};
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 53beac4..a8894ee 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -36,6 +36,7 @@
 #include <linux/mmc/core.h>
 #include <linux/mmc/mmc.h>
 #include <linux/io.h>
+#include <linux/irq.h>
 #include <linux/gpio.h>
 #include <linux/regulator/consumer.h>
 #include <linux/pinctrl/consumer.h>
@@ -214,11 +215,22 @@ struct omap_hsmmc_host {
 	int                     flags;
 #define HSMMC_RUNTIME_SUSPENDED	(1 << 0)        /* Runtime suspended */
 #define HSMMC_SDIO_IRQ_ENABLED	(1 << 1)        /* SDIO irq enabled */
+#define HSMMC_SWAKEUP_QUIRK	(1 << 2)        /* SDIO irq enabled */
 
 	struct omap_hsmmc_next	next_data;
+	struct pinctrl		*pinctrl;
+	struct pinctrl_state	*fixed, *active, *idle;
 	struct	omap_mmc_platform_data	*pdata;
 };
 
+static irqreturn_t omap_hsmmc_cirq(int irq, void *dev_id)
+{
+	struct omap_hsmmc_host *host = dev_id;
+
+	mmc_signal_sdio_irq(host->mmc);
+	return IRQ_HANDLED;
+}
+
 static int omap_hsmmc_card_detect(struct device *dev, int slot)
 {
 	struct omap_hsmmc_host *host = dev_get_drvdata(dev);
@@ -453,10 +465,31 @@ static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata)
 	} else
 		pdata->slots[0].gpio_wp = -EINVAL;
 
+	if (pdata->slots[0].gpio_cirq > 0 &&
+	    gpio_is_valid(pdata->slots[0].gpio_cirq)) {
+		pdata->slots[0].sdio_irq =
+				gpio_to_irq(pdata->slots[0].gpio_cirq);
+
+		ret = gpio_request(pdata->slots[0].gpio_cirq, "sdio_cirq");
+		if (ret)
+			goto err_free_ro;
+		ret = gpio_direction_input(pdata->slots[0].gpio_cirq);
+		if (ret)
+			goto err_free_cirq;
+
+	} else {
+		pdata->slots[0].gpio_cirq = -EINVAL;
+	}
+
+
 	return 0;
 
+err_free_cirq:
+	gpio_free(pdata->slots[0].gpio_cirq);
+err_free_ro:
+	if (gpio_is_valid(pdata->slots[0].gpio_wp))
 err_free_wp:
-	gpio_free(pdata->slots[0].gpio_wp);
+		gpio_free(pdata->slots[0].gpio_wp);
 err_free_cd:
 	if (gpio_is_valid(pdata->slots[0].switch_pin))
 err_free_sp:
@@ -470,6 +503,68 @@ static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata)
 		gpio_free(pdata->slots[0].gpio_wp);
 	if (gpio_is_valid(pdata->slots[0].switch_pin))
 		gpio_free(pdata->slots[0].switch_pin);
+	if (gpio_is_valid(pdata->slots[0].gpio_cirq))
+		gpio_free(pdata->slots[0].gpio_cirq);
+}
+
+static int omap_hsmmc_pin_init(struct omap_hsmmc_host *host)
+{
+	int ret;
+
+	host->pinctrl = devm_pinctrl_get(host->dev);
+	if (IS_ERR(host->pinctrl)) {
+		dev_dbg(host->dev, "no pinctrl handle\n");
+		ret = 0;
+		goto out;
+	}
+
+	host->fixed = pinctrl_lookup_state(host->pinctrl,
+					   PINCTRL_STATE_DEFAULT);
+	if (IS_ERR(host->fixed)) {
+		dev_dbg(host->dev, "pins are not configured from the driver\n");
+		host->fixed = NULL;
+		ret = 0;
+		goto out;
+	}
+
+	ret = pinctrl_select_state(host->pinctrl, host->fixed);
+	if (ret < 0)
+		goto err;
+
+	/* For most cases we don't have wake-ups, and exit after this */
+	host->active = pinctrl_lookup_state(host->pinctrl, "active");
+	if (IS_ERR(host->active)) {
+		ret = PTR_ERR(host->active);
+		host->active = NULL;
+		return 0;
+	}
+
+	host->idle = pinctrl_lookup_state(host->pinctrl,
+					  PINCTRL_STATE_IDLE);
+	if (IS_ERR(host->idle)) {
+		ret = PTR_ERR(host->idle);
+		host->idle = NULL;
+		goto err;
+	}
+
+	/* Let's make sure the active and idle states work */
+	ret = pinctrl_select_state(host->pinctrl, host->idle);
+	if (ret < 0)
+		goto err;
+
+	ret = pinctrl_select_state(host->pinctrl, host->active);
+	if (ret < 0)
+		goto err;
+
+	dev_info(mmc_dev(host->mmc), "pins configured for wake-up events\n");
+
+	return 0;
+
+err:
+	dev_err(mmc_dev(host->mmc), "pins configuration error: %i\n", ret);
+
+out:
+	return ret;
 }
 
 /*
@@ -1613,13 +1708,18 @@ static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 
 	spin_lock_irqsave(&host->irq_lock, flags);
 
+	if (!enable == !(host->flags & HSMMC_SDIO_IRQ_ENABLED)) {
+		/* sdio_irq is refcounted, keep in sync */
+		goto out;
+	}
+
 	if (enable)
 		host->flags |= HSMMC_SDIO_IRQ_ENABLED;
 	else
 		host->flags &= ~HSMMC_SDIO_IRQ_ENABLED;
 
-	/* if statement here with followup patch */
-	{
+	if (!(host->flags & HSMMC_RUNTIME_SUSPENDED)) {
+		/* SIGBUS without without fclk */
 		irq_mask = OMAP_HSMMC_READ(host->base, ISE);
 		if (enable)
 			irq_mask |= CIRQ_EN;
@@ -1638,6 +1738,16 @@ static void omap_hsmmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 		OMAP_HSMMC_READ(host->base, IE);
 	}
 
+	if (host->flags & HSMMC_SWAKEUP_QUIRK) {
+		if (enable) {
+			enable_irq(mmc_slot(host).sdio_irq);
+		} else {
+			/* _nosync, see mmc_signal_sdio_irq */
+			disable_irq_nosync(mmc_slot(host).sdio_irq);
+		}
+	}
+
+out:
 	spin_unlock_irqrestore(&host->irq_lock, flags);
 }
 
@@ -1797,6 +1907,7 @@ static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev)
 	pdata->nr_slots = 1;
 	pdata->slots[0].switch_pin = cd_gpio;
 	pdata->slots[0].gpio_wp = wp_gpio;
+	pdata->slots[0].gpio_cirq = of_get_named_gpio(np, "ti,cirq-gpio", 0);
 
 	if (of_find_property(np, "ti,non-removable", NULL)) {
 		pdata->slots[0].nonremovable = true;
@@ -1837,7 +1948,6 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
 	const struct of_device_id *match;
 	dma_cap_mask_t mask;
 	unsigned tx_req, rx_req;
-	struct pinctrl *pinctrl;
 
 	match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev);
 	if (match) {
@@ -2075,12 +2185,35 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
 		pdata->resume = omap_hsmmc_resume_cdirq;
 	}
 
-	omap_hsmmc_disable_irq(host);
+	if ((mmc_slot(host).sdio_irq)) {
+		/* prevent auto-enabling of IRQ */
+		irq_set_status_flags(mmc_slot(host).sdio_irq, IRQ_NOAUTOEN);
+		ret = request_irq(mmc_slot(host).sdio_irq, omap_hsmmc_cirq,
+				  IRQF_TRIGGER_LOW | IRQF_ONESHOT,
+				  mmc_hostname(mmc), host);
+		if (ret) {
+			dev_dbg(mmc_dev(host->mmc),
+				"Unable to grab MMC SDIO IRQ\n");
+			goto err_irq_sdio;
+		}
 
-	pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
-	if (IS_ERR(pinctrl))
-		dev_warn(&pdev->dev,
-			"pins are not configured from the driver\n");
+		/*
+		 * sdio_irq is managed with ref count
+		 * - start with initial value of 2
+		 * - omap_hsmmc_enable_sdio_irq enable/disable will -1/+1
+		 * - pm_suspend/pm_resume will -1/+1
+		 *
+		 * if sdio irq are enabled AND runtime suspend on, only then
+		 * the ref count drops to zero and the gpio irq is armed
+		 */
+		disable_irq(mmc_slot(host).sdio_irq); /* -> ref cnt == 2 */
+	}
+
+	ret = omap_hsmmc_pin_init(host);
+	if (ret)
+		goto err_pinctrl_state;
+
+	omap_hsmmc_disable_irq(host);
 
 	/*
 	 * For now, only support SDIO interrupt if we are booted with
@@ -2093,8 +2226,14 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
 		mmc->caps |= MMC_CAP_SDIO_IRQ;
 		if (of_find_property(host->dev->of_node,
 				     "ti,quirk-swakeup-missing", NULL)) {
-			/* no wakeup from deeper power states, use polling */
-			mmc->caps &= ~MMC_CAP_SDIO_IRQ;
+			/* no wakeup from deeper power states, use GPIO */
+			if (!host->idle || !mmc_slot(host).sdio_irq) {
+				dev_err(mmc_dev(host->mmc),
+					"Missing GPIO config or pinctrl idle state\n");
+				goto err_pinctrl_state;
+			}
+
+			host->flags |= HSMMC_SWAKEUP_QUIRK;
 		}
 	}
 
@@ -2122,7 +2261,13 @@ static int omap_hsmmc_probe(struct platform_device *pdev)
 
 err_slot_name:
 	mmc_remove_host(mmc);
-	free_irq(mmc_slot(host).card_detect_irq, host);
+err_pinctrl_state:
+	devm_pinctrl_put(host->pinctrl);
+	if ((mmc_slot(host).sdio_irq))
+		free_irq(mmc_slot(host).sdio_irq, host);
+err_irq_sdio:
+	if ((mmc_slot(host).card_detect_irq))
+		free_irq(mmc_slot(host).card_detect_irq, host);
 err_irq_cd:
 	if (host->use_reg)
 		omap_hsmmc_reg_put(host);
@@ -2167,13 +2312,15 @@ static int omap_hsmmc_remove(struct platform_device *pdev)
 	if (host->pdata->cleanup)
 		host->pdata->cleanup(&pdev->dev);
 	free_irq(host->irq, host);
+	if ((mmc_slot(host).sdio_irq))
+		free_irq(mmc_slot(host).sdio_irq, host);
 	if (mmc_slot(host).card_detect_irq)
 		free_irq(mmc_slot(host).card_detect_irq, host);
-
 	if (host->tx_chan)
 		dma_release_channel(host->tx_chan);
 	if (host->rx_chan)
 		dma_release_channel(host->rx_chan);
+	devm_pinctrl_put(host->pinctrl);
 
 	pm_runtime_put_sync(host->dev);
 	pm_runtime_disable(host->dev);
@@ -2293,23 +2440,66 @@ static int omap_hsmmc_resume(struct device *dev)
 static int omap_hsmmc_runtime_suspend(struct device *dev)
 {
 	struct omap_hsmmc_host *host;
+	unsigned long flags;
+	int ret = 0;
 
 	host = platform_get_drvdata(to_platform_device(dev));
 	omap_hsmmc_context_save(host);
 	dev_dbg(dev, "disabled\n");
 
-	return 0;
+	if (host->flags & HSMMC_SWAKEUP_QUIRK) {
+		spin_lock_irqsave(&host->irq_lock, flags);
+		OMAP_HSMMC_WRITE(host->base, ISE, 0);
+		OMAP_HSMMC_WRITE(host->base, IE, 0);
+		OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
+		spin_unlock_irqrestore(&host->irq_lock, flags);
+
+		ret = pinctrl_select_state(host->pinctrl, host->idle);
+		if (ret < 0)
+			dev_warn(mmc_dev(host->mmc), "Unable to select idle pinmux\n");
+
+		enable_irq(mmc_slot(host).sdio_irq);
+	}
+
+	spin_lock_irqsave(&host->irq_lock, flags);
+	/* infinite loop, if irq not cleared in omap_hsmmc_enable_sdio_irq */
+	host->flags |= HSMMC_RUNTIME_SUSPENDED;
+	spin_unlock_irqrestore(&host->irq_lock, flags);
+
+	return ret;
 }
 
 static int omap_hsmmc_runtime_resume(struct device *dev)
 {
 	struct omap_hsmmc_host *host;
+	unsigned long flags;
+	int ret = 0;
 
 	host = platform_get_drvdata(to_platform_device(dev));
 	omap_hsmmc_context_restore(host);
 	dev_dbg(dev, "enabled\n");
 
-	return 0;
+	spin_lock_irqsave(&host->irq_lock, flags);
+	/* infinite loop, if irq not cleared in omap_hsmmc_enable_sdio_irq */
+	host->flags &= ~HSMMC_RUNTIME_SUSPENDED;
+	spin_unlock_irqrestore(&host->irq_lock, flags);
+
+	if (host->flags & HSMMC_SWAKEUP_QUIRK) {
+		disable_irq(mmc_slot(host).sdio_irq);
+
+		ret = pinctrl_select_state(host->pinctrl, host->active);
+		if (ret < 0)
+			dev_warn(mmc_dev(host->mmc), "Unable to select active pinmux\n");
+
+		spin_lock_irqsave(&host->irq_lock, flags);
+		if (host->flags & HSMMC_SDIO_IRQ_ENABLED) {
+			OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
+			OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN);
+			OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN);
+		}
+		spin_unlock_irqrestore(&host->irq_lock, flags);
+	}
+	return ret;
 }
 
 static struct dev_pm_ops omap_hsmmc_dev_pm_ops = {
diff --git a/include/linux/platform_data/mmc-omap.h b/include/linux/platform_data/mmc-omap.h
index 2bf1b30..fd5fff5 100644
--- a/include/linux/platform_data/mmc-omap.h
+++ b/include/linux/platform_data/mmc-omap.h
@@ -115,6 +115,7 @@ struct omap_mmc_platform_data {
 
 		int switch_pin;			/* gpio (card detect) */
 		int gpio_wp;			/* gpio (write protect) */
+		int gpio_cirq;			/* gpio (card irq) */
 
 		int (*set_bus_mode)(struct device *dev, int slot, int bus_mode);
 		int (*set_power)(struct device *dev, int slot,
@@ -145,6 +146,9 @@ struct omap_mmc_platform_data {
 		int card_detect_irq;
 		int (*card_detect)(struct device *dev, int slot);
 
+		/* SDIO IRQs */
+		int sdio_irq;
+
 		unsigned int ban_openended:1;
 
 	} slots[OMAP_MMC_MAX_SLOTS];
-- 
1.7.10.4

Re: [PATCH v3 3/4] mmc: omap_hsmmc: Remux pins to support SDIO interrupt on AM335x

[Balaji T K]

Thanks Andreas for the patch,

On Saturday 05 October 2013 04:47 PM, Andreas Fenkart wrote:
> The am335x can't detect pending cirq in PM runtime suspend.
> This patch reconfigures dat1 as a GPIO before going to suspend.
> SDIO interrupts are detected with the GPIO, while in runtime
> suspend, standard detection of the module block otherwise.
>
> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
>
> @@ -2293,23 +2440,66 @@ static int omap_hsmmc_resume(struct device *dev)
>   static int omap_hsmmc_runtime_suspend(struct device *dev)
>   {
>   	struct omap_hsmmc_host *host;
> +	unsigned long flags;
> +	int ret = 0;
>
>   	host = platform_get_drvdata(to_platform_device(dev));
>   	omap_hsmmc_context_save(host);
>   	dev_dbg(dev, "disabled\n");
>
> -	return 0;
> +	if (host->flags & HSMMC_SWAKEUP_QUIRK) {
> +		spin_lock_irqsave(&host->irq_lock, flags);
> +		OMAP_HSMMC_WRITE(host->base, ISE, 0);
> +		OMAP_HSMMC_WRITE(host->base, IE, 0);
> +		OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
> +		spin_unlock_irqrestore(&host->irq_lock, flags);
> +
> +		ret = pinctrl_select_state(host->pinctrl, host->idle);
> +		if (ret < 0)
> +			dev_warn(mmc_dev(host->mmc), "Unable to select idle pinmux\n");
> +
> +		enable_irq(mmc_slot(host).sdio_irq);
> +	}
> +
> +	spin_lock_irqsave(&host->irq_lock, flags);
> +	/* infinite loop, if irq not cleared in omap_hsmmc_enable_sdio_irq */
> +	host->flags |= HSMMC_RUNTIME_SUSPENDED;

Can you provide more details about the infinite loop and how it will get recovered.

> +	spin_unlock_irqrestore(&host->irq_lock, flags);
> +
> +	return ret;
>   }
>
>   static int omap_hsmmc_runtime_resume(struct device *dev)
>   {
>   	struct omap_hsmmc_host *host;
> +	unsigned long flags;
> +	int ret = 0;
>
>   	host = platform_get_drvdata(to_platform_device(dev));
>   	omap_hsmmc_context_restore(host);
>   	dev_dbg(dev, "enabled\n");
>
> -	return 0;
> +	spin_lock_irqsave(&host->irq_lock, flags);
> +	/* infinite loop, if irq not cleared in omap_hsmmc_enable_sdio_irq */
> +	host->flags &= ~HSMMC_RUNTIME_SUSPENDED;
> +	spin_unlock_irqrestore(&host->irq_lock, flags);
> +
> +	if (host->flags & HSMMC_SWAKEUP_QUIRK) {
> +		disable_irq(mmc_slot(host).sdio_irq);
> +
> +		ret = pinctrl_select_state(host->pinctrl, host->active);
> +		if (ret < 0)
> +			dev_warn(mmc_dev(host->mmc), "Unable to select active pinmux\n");
> +
> +		spin_lock_irqsave(&host->irq_lock, flags);
> +		if (host->flags & HSMMC_SDIO_IRQ_ENABLED) {
> +			OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR);
> +			OMAP_HSMMC_WRITE(host->base, ISE, CIRQ_EN);
> +			OMAP_HSMMC_WRITE(host->base, IE, CIRQ_EN);
> +		}
> +		spin_unlock_irqrestore(&host->irq_lock, flags);
> +	}
> +	return ret;
>   }
>
>   static struct dev_pm_ops omap_hsmmc_dev_pm_ops = {
> diff --git a/include/linux/platform_data/mmc-omap.h b/include/linux/platform_data/mmc-omap.h
> index 2bf1b30..fd5fff5 100644
> --- a/include/linux/platform_data/mmc-omap.h
> +++ b/include/linux/platform_data/mmc-omap.h
> @@ -115,6 +115,7 @@ struct omap_mmc_platform_data {
>
>   		int switch_pin;			/* gpio (card detect) */
>   		int gpio_wp;			/* gpio (write protect) */
> +		int gpio_cirq;			/* gpio (card irq) */
>
>   		int (*set_bus_mode)(struct device *dev, int slot, int bus_mode);
>   		int (*set_power)(struct device *dev, int slot,
> @@ -145,6 +146,9 @@ struct omap_mmc_platform_data {
>   		int card_detect_irq;
>   		int (*card_detect)(struct device *dev, int slot);
>
> +		/* SDIO IRQs */
> +		int sdio_irq;
> +
>   		unsigned int ban_openended:1;
>
>   	} slots[OMAP_MMC_MAX_SLOTS];
>

Re: [PATCH v3 3/4] mmc: omap_hsmmc: Remux pins to support SDIO interrupt on AM335x

[NeilBrown]

[-- Attachment #1: Type: text/plain, Size: 3555 bytes --]

On Sat,  5 Oct 2013 13:17:09 +0200 Andreas Fenkart <afenkart@gmail.com> wrote:

> The am335x can't detect pending cirq in PM runtime suspend.
> This patch reconfigures dat1 as a GPIO before going to suspend.
> SDIO interrupts are detected with the GPIO, while in runtime
> suspend, standard detection of the module block otherwise.
> 
> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
> 
> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> index 1136e6b..146f3ad 100644
> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> @@ -21,8 +21,11 @@ ti,non-removable: non-removable slot (like eMMC)
>  ti,needs-special-reset: Requires a special softreset sequence
>  ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
>  ti,quirk-swakup-missing: SOC missing the swakeup line, will not detect
> -SDIO irq while in suspend. Fallback to polling. Affected chips are
> -am335x,
> +SDIO irq while in suspend. The workaround is to reconfigure the dat1 line as a
> +GPIO upon suspend. Beyond this option and the GPIO config, you also need to set
> +named pinctrl states "default", "active" and "idle ", see example below.  The
> +MMC driver will then then toggle between default and idle during the runtime
> +Affected chips are am335x,
>  
>                              ------
>                              | PRCM |
> @@ -49,3 +52,24 @@ Example:
>  		vmmc-supply = <&vmmc>; /* phandle to regulator node */
>  		ti,non-removable;
>  	};
> +
> +[am335x with with gpio for sdio irq]
> +
> +	mmc1_cirq_pin: pinmux_cirq_pin {
> +		pinctrl-single,pins = <
> +			0x0f8 0x3f	/* MMC0_DAT1 as GPIO2_28 */
> +		>;
> +	};
> +
> +	mmc1: mmc@48060000 {
> +		ti,non-removable;
> +		bus-width = <4>;
> +		vmmc-supply = <&ldo2_reg>;
> +		vmmc_aux-supply = <&vmmc>;
> +	        ti,quirk-swakeup-missing;
> +		pinctrl-names = "default", "active", "idle";
> +		pinctrl-0 = <&mmc1_pins>;
> +		pinctrl-1 = <&mmc1_pins>;
> +		pinctrl-2 = <&mmc1_cirq_pin>;
> +		ti,cirq-gpio = <&gpio3 28 0>;
> +	};


hi,
 I've been trying to get SD irq to work on my  OMAP3 DM3730.
I seems to need the magic to catch interrupts while FCLK is off, as
the only way I can get it to work at the moment is to keep FCLK on.

I discovered your patch and tried it out, but it doesn't seem to work for me.

I have a Libertas WIFI chip attached to the second mmc (which is sometimes
called mmc1, and sometimes mmc2 - very confusing!).
I added:
	mmc2_cirq_pin: pinmux_cirq_pin {
		pinctrl-single,pins = <
			0x012e (PIN_INPUT_PULLUP | MUX_MODE4)	/* MMC2_DAT1 as GPIO5_5 */
		>;
	};

and

&mmc2 {
	ti,quirk-swakeup-missing;
	pinctrl-names = "default", "active", "idle";
	pinctrl-0 = <&mmc2_pins>;
	pinctrl-1 = <&mmc2_pins>;
	pinctrl-2 = <&mmc2_cirq_pin>;
	ti,cirq-gpio = <&gpio5 5 0>; /* GPIO133 = 128+5 */
};

to my dts file but it doesn't make any apparent difference.

Any idea what I might be doing wrong?
(the base kernel I am applying patches to is from 8th Oct,
 commit 0e7a3ed04f0cd4311096d691888f88569310ee6c)

BTW,
 - with the default polling, I get about 1Mb/sec with iperf
 - with sd-irq enabled and FCLK kept on the whole time, I get 4Mb/sec
 - with sd-irq enable, FCLK kept on, and the 5ms polling also
   running, I get over 5Mb/sec!
Still much less than the 40Mb/sec that I would like to get...

Thanks,
NeilBrown

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 828 bytes --]

Re: [PATCH v3 3/4] mmc: omap_hsmmc: Remux pins to support SDIO interrupt on AM335x

[Balaji T K]

On Friday 18 October 2013 11:50 AM, NeilBrown wrote:
> On Sat,  5 Oct 2013 13:17:09 +0200 Andreas Fenkart <afenkart@gmail.com> wrote:
>
>> The am335x can't detect pending cirq in PM runtime suspend.
>> This patch reconfigures dat1 as a GPIO before going to suspend.
>> SDIO interrupts are detected with the GPIO, while in runtime
>> suspend, standard detection of the module block otherwise.
>>
>> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> index 1136e6b..146f3ad 100644
>> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> @@ -21,8 +21,11 @@ ti,non-removable: non-removable slot (like eMMC)
>>   ti,needs-special-reset: Requires a special softreset sequence
>>   ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
>>   ti,quirk-swakup-missing: SOC missing the swakeup line, will not detect
>> -SDIO irq while in suspend. Fallback to polling. Affected chips are
>> -am335x,
>> +SDIO irq while in suspend. The workaround is to reconfigure the dat1 line as a
>> +GPIO upon suspend. Beyond this option and the GPIO config, you also need to set
>> +named pinctrl states "default", "active" and "idle ", see example below.  The
>> +MMC driver will then then toggle between default and idle during the runtime
>> +Affected chips are am335x,
>>
>>                               ------
>>                               | PRCM |
>> @@ -49,3 +52,24 @@ Example:
>>   		vmmc-supply = <&vmmc>; /* phandle to regulator node */
>>   		ti,non-removable;
>>   	};
>> +
>> +[am335x with with gpio for sdio irq]
>> +
>> +	mmc1_cirq_pin: pinmux_cirq_pin {
>> +		pinctrl-single,pins = <
>> +			0x0f8 0x3f	/* MMC0_DAT1 as GPIO2_28 */
>> +		>;
>> +	};
>> +
>> +	mmc1: mmc@48060000 {
>> +		ti,non-removable;
>> +		bus-width = <4>;
>> +		vmmc-supply = <&ldo2_reg>;
>> +		vmmc_aux-supply = <&vmmc>;
>> +	        ti,quirk-swakeup-missing;
>> +		pinctrl-names = "default", "active", "idle";
>> +		pinctrl-0 = <&mmc1_pins>;
>> +		pinctrl-1 = <&mmc1_pins>;
>> +		pinctrl-2 = <&mmc1_cirq_pin>;
>> +		ti,cirq-gpio = <&gpio3 28 0>;
>> +	};
>
>
> hi,
>   I've been trying to get SD irq to work on my  OMAP3 DM3730.
> I seems to need the magic to catch interrupts while FCLK is off, as
> the only way I can get it to work at the moment is to keep FCLK on.
>
> I discovered your patch and tried it out, but it doesn't seem to work for me.
>
> I have a Libertas WIFI chip attached to the second mmc (which is sometimes
> called mmc1, and sometimes mmc2 - very confusing!).
> I added:
> 	mmc2_cirq_pin: pinmux_cirq_pin {
> 		pinctrl-single,pins = <
> 			0x012e (PIN_INPUT_PULLUP | MUX_MODE4)	/* MMC2_DAT1 as GPIO5_5 */
> 		>;
> 	};
>
> and
>
> &mmc2 {
> 	ti,quirk-swakeup-missing;
> 	pinctrl-names = "default", "active", "idle";
> 	pinctrl-0 = <&mmc2_pins>;
> 	pinctrl-1 = <&mmc2_pins>;
> 	pinctrl-2 = <&mmc2_cirq_pin>;
> 	ti,cirq-gpio = <&gpio5 5 0>; /* GPIO133 = 128+5 */
> };
>
> to my dts file but it doesn't make any apparent difference.
>
> Any idea what I might be doing wrong?
> (the base kernel I am applying patches to is from 8th Oct,
>   commit 0e7a3ed04f0cd4311096d691888f88569310ee6c)
>
> BTW,
>   - with the default polling, I get about 1Mb/sec with iperf
>   - with sd-irq enabled and FCLK kept on the whole time, I get 4Mb/sec
>   - with sd-irq enable, FCLK kept on, and the 5ms polling also
>     running, I get over 5Mb/sec!
> Still much less than the 40Mb/sec that I would like to get...
>
(removing svenkatr@ti.com)

Hi,

Can you check if you have bus-width property set ?
	bus-width = <4>;

Thanks and Regards,
Balaji T K

> Thanks,
> NeilBrown
>

Re: [PATCH v3 3/4] mmc: omap_hsmmc: Remux pins to support SDIO interrupt on AM335x

[NeilBrown]

[-- Attachment #1: Type: text/plain, Size: 4431 bytes --]

On Fri, 18 Oct 2013 12:59:56 +0530 Balaji T K <balajitk@ti.com> wrote:

> On Friday 18 October 2013 11:50 AM, NeilBrown wrote:
> > On Sat,  5 Oct 2013 13:17:09 +0200 Andreas Fenkart <afenkart@gmail.com> wrote:
> >
> >> The am335x can't detect pending cirq in PM runtime suspend.
> >> This patch reconfigures dat1 as a GPIO before going to suspend.
> >> SDIO interrupts are detected with the GPIO, while in runtime
> >> suspend, standard detection of the module block otherwise.
> >>
> >> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
> >>
> >> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> >> index 1136e6b..146f3ad 100644
> >> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> >> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> >> @@ -21,8 +21,11 @@ ti,non-removable: non-removable slot (like eMMC)
> >>   ti,needs-special-reset: Requires a special softreset sequence
> >>   ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
> >>   ti,quirk-swakup-missing: SOC missing the swakeup line, will not detect
> >> -SDIO irq while in suspend. Fallback to polling. Affected chips are
> >> -am335x,
> >> +SDIO irq while in suspend. The workaround is to reconfigure the dat1 line as a
> >> +GPIO upon suspend. Beyond this option and the GPIO config, you also need to set
> >> +named pinctrl states "default", "active" and "idle ", see example below.  The
> >> +MMC driver will then then toggle between default and idle during the runtime
> >> +Affected chips are am335x,
> >>
> >>                               ------
> >>                               | PRCM |
> >> @@ -49,3 +52,24 @@ Example:
> >>   		vmmc-supply = <&vmmc>; /* phandle to regulator node */
> >>   		ti,non-removable;
> >>   	};
> >> +
> >> +[am335x with with gpio for sdio irq]
> >> +
> >> +	mmc1_cirq_pin: pinmux_cirq_pin {
> >> +		pinctrl-single,pins = <
> >> +			0x0f8 0x3f	/* MMC0_DAT1 as GPIO2_28 */
> >> +		>;
> >> +	};
> >> +
> >> +	mmc1: mmc@48060000 {
> >> +		ti,non-removable;
> >> +		bus-width = <4>;
> >> +		vmmc-supply = <&ldo2_reg>;
> >> +		vmmc_aux-supply = <&vmmc>;
> >> +	        ti,quirk-swakeup-missing;
> >> +		pinctrl-names = "default", "active", "idle";
> >> +		pinctrl-0 = <&mmc1_pins>;
> >> +		pinctrl-1 = <&mmc1_pins>;
> >> +		pinctrl-2 = <&mmc1_cirq_pin>;
> >> +		ti,cirq-gpio = <&gpio3 28 0>;
> >> +	};
> >
> >
> > hi,
> >   I've been trying to get SD irq to work on my  OMAP3 DM3730.
> > I seems to need the magic to catch interrupts while FCLK is off, as
> > the only way I can get it to work at the moment is to keep FCLK on.
> >
> > I discovered your patch and tried it out, but it doesn't seem to work for me.
> >
> > I have a Libertas WIFI chip attached to the second mmc (which is sometimes
> > called mmc1, and sometimes mmc2 - very confusing!).
> > I added:
> > 	mmc2_cirq_pin: pinmux_cirq_pin {
> > 		pinctrl-single,pins = <
> > 			0x012e (PIN_INPUT_PULLUP | MUX_MODE4)	/* MMC2_DAT1 as GPIO5_5 */
> > 		>;
> > 	};
> >
> > and
> >
> > &mmc2 {
> > 	ti,quirk-swakeup-missing;
> > 	pinctrl-names = "default", "active", "idle";
> > 	pinctrl-0 = <&mmc2_pins>;
> > 	pinctrl-1 = <&mmc2_pins>;
> > 	pinctrl-2 = <&mmc2_cirq_pin>;
> > 	ti,cirq-gpio = <&gpio5 5 0>; /* GPIO133 = 128+5 */
> > };
> >
> > to my dts file but it doesn't make any apparent difference.
> >
> > Any idea what I might be doing wrong?
> > (the base kernel I am applying patches to is from 8th Oct,
> >   commit 0e7a3ed04f0cd4311096d691888f88569310ee6c)
> >
> > BTW,
> >   - with the default polling, I get about 1Mb/sec with iperf
> >   - with sd-irq enabled and FCLK kept on the whole time, I get 4Mb/sec
> >   - with sd-irq enable, FCLK kept on, and the 5ms polling also
> >     running, I get over 5Mb/sec!
> > Still much less than the 40Mb/sec that I would like to get...
> >
> (removing svenkatr@ti.com)
> 
> Hi,
> 
> Can you check if you have bus-width property set ?
> 	bus-width = <4>;
> 
>
Yes I do.
as well as the settings above I have:

	vmmc-supply = <&vaux4>;
	bus-width = <4>;
	ti,non-removable;
	cap-power-off-card;


vaux4 is from a twl4030 and powers the wifi chip.
'cap-power-off-card' I added support for myself to so the card would power
off when not in use.

Thanks,
NeilBrown

[-- Attachment #2: signature.asc --]
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Re: [PATCH v3 3/4] mmc: omap_hsmmc: Remux pins to support SDIO interrupt on AM335x

[Javier Martinez Canillas]

On Fri, Oct 18, 2013 at 8:20 AM, NeilBrown <neilb@suse.de> wrote:
> On Sat,  5 Oct 2013 13:17:09 +0200 Andreas Fenkart <afenkart@gmail.com> wrote:
>
>> The am335x can't detect pending cirq in PM runtime suspend.
>> This patch reconfigures dat1 as a GPIO before going to suspend.
>> SDIO interrupts are detected with the GPIO, while in runtime
>> suspend, standard detection of the module block otherwise.
>>
>> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
>>
>> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> index 1136e6b..146f3ad 100644
>> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> @@ -21,8 +21,11 @@ ti,non-removable: non-removable slot (like eMMC)
>>  ti,needs-special-reset: Requires a special softreset sequence
>>  ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
>>  ti,quirk-swakup-missing: SOC missing the swakeup line, will not detect
>> -SDIO irq while in suspend. Fallback to polling. Affected chips are
>> -am335x,
>> +SDIO irq while in suspend. The workaround is to reconfigure the dat1 line as a
>> +GPIO upon suspend. Beyond this option and the GPIO config, you also need to set
>> +named pinctrl states "default", "active" and "idle ", see example below.  The
>> +MMC driver will then then toggle between default and idle during the runtime
>> +Affected chips are am335x,
>>
>>                              ------
>>                              | PRCM |
>> @@ -49,3 +52,24 @@ Example:
>>               vmmc-supply = <&vmmc>; /* phandle to regulator node */
>>               ti,non-removable;
>>       };
>> +
>> +[am335x with with gpio for sdio irq]
>> +
>> +     mmc1_cirq_pin: pinmux_cirq_pin {
>> +             pinctrl-single,pins = <
>> +                     0x0f8 0x3f      /* MMC0_DAT1 as GPIO2_28 */
>> +             >;
>> +     };
>> +
>> +     mmc1: mmc@48060000 {
>> +             ti,non-removable;
>> +             bus-width = <4>;
>> +             vmmc-supply = <&ldo2_reg>;
>> +             vmmc_aux-supply = <&vmmc>;
>> +             ti,quirk-swakeup-missing;
>> +             pinctrl-names = "default", "active", "idle";
>> +             pinctrl-0 = <&mmc1_pins>;
>> +             pinctrl-1 = <&mmc1_pins>;
>> +             pinctrl-2 = <&mmc1_cirq_pin>;
>> +             ti,cirq-gpio = <&gpio3 28 0>;
>> +     };
>
>
> hi,
>  I've been trying to get SD irq to work on my  OMAP3 DM3730.
> I seems to need the magic to catch interrupts while FCLK is off, as
> the only way I can get it to work at the moment is to keep FCLK on.
>
> I discovered your patch and tried it out, but it doesn't seem to work for me.
>
> I have a Libertas WIFI chip attached to the second mmc (which is sometimes
> called mmc1, and sometimes mmc2 - very confusing!).

Hi Neil,

I have a DM3730 board with the same setup, Libertas (Marvell SD8686)
wifi + bt chip attached to mmc2.

I was going to try to add support for this to the DTS but it would be
great if I can use your as a reference.

Would you be so kind to share your DTS?

Thanks a lot and best regards,
Javier

> I added:
>         mmc2_cirq_pin: pinmux_cirq_pin {
>                 pinctrl-single,pins = <
>                         0x012e (PIN_INPUT_PULLUP | MUX_MODE4)   /* MMC2_DAT1 as GPIO5_5 */
>                 >;
>         };
>
> and
>
> &mmc2 {
>         ti,quirk-swakeup-missing;
>         pinctrl-names = "default", "active", "idle";
>         pinctrl-0 = <&mmc2_pins>;
>         pinctrl-1 = <&mmc2_pins>;
>         pinctrl-2 = <&mmc2_cirq_pin>;
>         ti,cirq-gpio = <&gpio5 5 0>; /* GPIO133 = 128+5 */
> };
>
> to my dts file but it doesn't make any apparent difference.
>
> Any idea what I might be doing wrong?
> (the base kernel I am applying patches to is from 8th Oct,
>  commit 0e7a3ed04f0cd4311096d691888f88569310ee6c)
>
> BTW,
>  - with the default polling, I get about 1Mb/sec with iperf
>  - with sd-irq enabled and FCLK kept on the whole time, I get 4Mb/sec
>  - with sd-irq enable, FCLK kept on, and the 5ms polling also
>    running, I get over 5Mb/sec!
> Still much less than the 40Mb/sec that I would like to get...
>
> Thanks,
> NeilBrown

Re: [PATCH v3 3/4] mmc: omap_hsmmc: Remux pins to support SDIO interrupt on AM335x

[NeilBrown]

[-- Attachment #1: Type: text/plain, Size: 11381 bytes --]

On Fri, 18 Oct 2013 12:12:48 +0200 Javier Martinez Canillas
<martinez.javier@gmail.com> wrote:

> On Fri, Oct 18, 2013 at 8:20 AM, NeilBrown <neilb@suse.de> wrote:
> > On Sat,  5 Oct 2013 13:17:09 +0200 Andreas Fenkart <afenkart@gmail.com> wrote:
> >
> >> The am335x can't detect pending cirq in PM runtime suspend.
> >> This patch reconfigures dat1 as a GPIO before going to suspend.
> >> SDIO interrupts are detected with the GPIO, while in runtime
> >> suspend, standard detection of the module block otherwise.
> >>
> >> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
> >>
> >> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> >> index 1136e6b..146f3ad 100644
> >> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> >> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
> >> @@ -21,8 +21,11 @@ ti,non-removable: non-removable slot (like eMMC)
> >>  ti,needs-special-reset: Requires a special softreset sequence
> >>  ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
> >>  ti,quirk-swakup-missing: SOC missing the swakeup line, will not detect
> >> -SDIO irq while in suspend. Fallback to polling. Affected chips are
> >> -am335x,
> >> +SDIO irq while in suspend. The workaround is to reconfigure the dat1 line as a
> >> +GPIO upon suspend. Beyond this option and the GPIO config, you also need to set
> >> +named pinctrl states "default", "active" and "idle ", see example below.  The
> >> +MMC driver will then then toggle between default and idle during the runtime
> >> +Affected chips are am335x,
> >>
> >>                              ------
> >>                              | PRCM |
> >> @@ -49,3 +52,24 @@ Example:
> >>               vmmc-supply = <&vmmc>; /* phandle to regulator node */
> >>               ti,non-removable;
> >>       };
> >> +
> >> +[am335x with with gpio for sdio irq]
> >> +
> >> +     mmc1_cirq_pin: pinmux_cirq_pin {
> >> +             pinctrl-single,pins = <
> >> +                     0x0f8 0x3f      /* MMC0_DAT1 as GPIO2_28 */
> >> +             >;
> >> +     };
> >> +
> >> +     mmc1: mmc@48060000 {
> >> +             ti,non-removable;
> >> +             bus-width = <4>;
> >> +             vmmc-supply = <&ldo2_reg>;
> >> +             vmmc_aux-supply = <&vmmc>;
> >> +             ti,quirk-swakeup-missing;
> >> +             pinctrl-names = "default", "active", "idle";
> >> +             pinctrl-0 = <&mmc1_pins>;
> >> +             pinctrl-1 = <&mmc1_pins>;
> >> +             pinctrl-2 = <&mmc1_cirq_pin>;
> >> +             ti,cirq-gpio = <&gpio3 28 0>;
> >> +     };
> >
> >
> > hi,
> >  I've been trying to get SD irq to work on my  OMAP3 DM3730.
> > I seems to need the magic to catch interrupts while FCLK is off, as
> > the only way I can get it to work at the moment is to keep FCLK on.
> >
> > I discovered your patch and tried it out, but it doesn't seem to work for me.
> >
> > I have a Libertas WIFI chip attached to the second mmc (which is sometimes
> > called mmc1, and sometimes mmc2 - very confusing!).
> 
> Hi Neil,
> 
> I have a DM3730 board with the same setup, Libertas (Marvell SD8686)
> wifi + bt chip attached to mmc2.
> 
> I was going to try to add support for this to the DTS but it would be
> great if I can use your as a reference.
> 
> Would you be so kind to share your DTS?
> 

My DTS is below.  It contains an number of things that are not supported in
mainline yet.  Details can be found in
   git://neil.brown.name/gta04 mainline
and
   http://git.neil.brown.name/?p=gta04.git;a=shortlog;h=refs/heads/mainline
(this is my working tree and gets rebased and messed up regularly).

NeilBrown

/*
 * Copyright (C) 2013 Marek Belisko <marek@goldelico.com>
 *
 * Based on omap3-beagle-xm.dts
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;
#define RFKILL_TYPE_GPS 6
#include "omap36xx.dtsi"

/ {
	model = "OMAP3 GTA04";
	compatible = "ti,omap3-gta04", "ti,omap3";
	chosen {
		bootargs = "console=ttyO2,115200n8 vram=12M omapfb.rotate_type=0 omapdss.def_disp=lcd root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait twl4030_charger.allow_usb=1 musb_hdrc.preserve_vbus=1 log_buf_len=8M ignore_loglevel no_console_suspend";
	};

	cpus {
		cpu@0 {
			cpu0-supply = <&vcc>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	aux-keys {
		compatible = "gpio-keys";

		aux-button {
			label = "aux";
			linux,code = <169>;
			gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
			gpio-key,wakeup;
		};
	};

	incoming-keys {
		compatible = "gpio-keys";

		incoming-button {
			label = "Option";
			linux,code = <240>;
			/* 176 for A3, 10 for A4 */
			gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
			gpio-key,wakeup;
		};
	};

	sound {
		compatible = "ti,omap-twl4030";
		ti,model = "gta04";

		ti,mcbsp = <&mcbsp2>;
		ti,codec = <&twl_audio>;
	};

	panel {
		compatible = "tpo,td028ttec1";
		display-name = "lcd";
		source     = "dpi.0";
		data-lines = <24>;
		cs-gpio    = <&gpio1 19 0>;
		scl-gpio   = <&gpio1 12 0>;
		din-gpio   = <&gpio1 18 0>;
		dout-gpio  = <&gpio1 20 0>;
	};

	backlight {
		compatible = "pwm-backlight";
		label = "pwm-backlight";
		pwms = <&pwm 0 2000000>;
		brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>;
		default-brightness-level = <10>;
	};

	pwm: omap-pwm {
		compatible = "ti,omap-pwm";
		timers = <&timer11>;
		#pwm-cells = <2>;
	};

	/* need to connect uart1 DTR line to vaux4 */
	btdtr: gpio-reg.bt {
		compatible = "gpio_regulator";
		vgpio-supply = <&vaux4>;
		microvolt = <3150000>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	gps-rfkill {
		compatible = "rfkill-regulator";
		label = "GPS";
		type = <RFKILL_TYPE_GPS>;
		vrfkill-supply = <&vsim>;
	};

	gpsdtr: gps-onoff {
		compatible = "gpio-w2sg0004";
		gpios = <&gpio5 17 0>, <&gpio5 19 0>;
		/* MODE0 PULL_ENA(8) INPUT_EN(256) PULL_UP(16) */
		state-on = <280>;
		/* MODE4 PULL_ENA(8) INPUT_EN(256) PULL_UP(16) */
		state-off = <284>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&omap3_pmx_core {
	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			0x152 (PIN_INPUT | MUX_MODE0)		/* uart1_rx.uart1_rx */
			0x14c (PIN_OUTPUT |MUX_MODE0)		/* uart1_tx.uart1_tx */
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			0x14a (PIN_INPUT | MUX_MODE0)		/* uart2_rx.uart2_rx */
			0x148 (PIN_OUTPUT | MUX_MODE0)		/* uart2_tx.uart2_tx */
		>;
	};

	uart3_pins: pinmux_uart3_pins {
		pinctrl-single,pins = <
			0x16e (PIN_INPUT | MUX_MODE0)		/* uart3_rx.uart3_rx */
			0x170 (PIN_OUTPUT | MUX_MODE0)		/* uart3_tx.uart3_tx */
		>;
	};

	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x114 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
			0x116 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
			0x118 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat0.sdmmc1_dat0 */
			0x11a (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
			0x11c (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
			0x11e (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
		>;
	};
	mmc2_pins: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			0x128 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
			0x12a (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
			0x12c (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat0.sdmmc2_dat0 */
			0x12e (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
			0x130 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
			0x132 (PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc1_dat3 */
		>;
	};
	mmc2_cirq_pin: pinmux_cirq_pin {
		pinctrl-single,pins = <
			0x012e (PIN_INPUT_PULLUP | MUX_MODE4)	/* MMC2_DAT1 as GPIO5_5 */
		>;
	};
};

&i2c1 {
	clock-frequency = <2600000>;

	twl: twl@48 {
		reg = <0x48>;
		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
		interrupt-parent = <&intc>;

		twl_audio: audio {
			compatible = "ti,twl4030-audio";
			codec {
			};
		};
		vaux4: regulator-vaux4 {
			compatible = "ti,twl4030-vaux4";
			regulator-min-microvolt = <2800000>;
			regulator-max-microvolt = <3150000>;
			ti,allow_unsupported;
		};
	};
};

#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"

&i2c2 {
	clock-frequency = <400000>;

	/* touch screen */
	tsc2007: tsc2007@48 {
		compatible = "tsc2007";
		reg = <0x48>;
		interrupt-parent = <&gpio6>;
		interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
		model-number = <2007>;
		x-plate-ohms = <600>;
		pen-gpio = <&gpio6 0 GPIO_ACTIVE_LOW>;
	};

	/* pressure sensor */
	bmp085@77 {
		compatible = "bosch,bmp085";
		reg = <0x77>;
	};

	/* accelerometer */
	bma180@41 {
		compatible = "bosch,bma180";
		reg = <0x41>;
		interrupt-parent = <&gpio3>;
		interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
	};

	/* leds */
	tca: tca6507@45 {
		compatible = "ti,tca6507";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x45>;

		gpio-controller;
		#gpio-cells = <2>;

		gta04_led0: red_aux@0 {
			label = "gta04:red:aux";
			reg = <0x0>;
		};

		gta04_led1: green_aux@1 {
			label = "gta04:green:aux";
			reg = <0x1>;
		};

		gta04_led3: red_power@3 {
			label = "gta04:red:power";
			reg = <0x3>;
			linux,default-trigger = "default-on";
		};

		gta04_led4: green_power@4 {
			label = "gta04:green:power";
			reg = <0x4>;
		};

		wifi_reset@6 {
			label = "gta04:wlan:reset";
			reg = <0x6>;
			make-gpio;
		};
	};

	/* gyroscope */
	itg3200@68 {
		compatible = "invensense,itg3200";
		reg = <0x68>;
	};

	/* compass aka magnetometer */
	hmc5843@1e {
		compatible = "honeywell,hmc5843";
		reg = <0x1e>;
	};
};

&i2c3 {
	clock-frequency = <100000>;
};

&usb_otg_hs {
	interface-type = <0>;
	usb-phy = <&usb2_phy>;
	mode = <3>;
	power = <50>;
};

&mmc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&mmc1_pins>;
	vmmc-supply = <&vmmc1>;
	bus-width = <4>;
	ti,non-removable;
	cap-power-off-card;
};

&mmc2 {
	vmmc-supply = <&vaux4>;
	bus-width = <4>;
	ti,non-removable;
	cap-power-off-card;
	reset-gpios = <&tca 0 GPIO_ACTIVE_HIGH>;

	ti,quirk-swakeup-missing;
	pinctrl-names = "default", "active", "idle";
	pinctrl-0 = <&mmc2_pins>;
	pinctrl-1 = <&mmc2_pins>;
	pinctrl-2 = <&mmc2_cirq_pin>;
	ti,cirq-gpio = <&gpio5 5 0>; /* GPIO133 = 128+5 */
};

&mmc3 {
	status = "disabled";
};

&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
};

&uart2 {
       pinctrl-names = "default";
       pinctrl-0 = <&uart2_pins>;
};

&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&uart3_pins>;
};

&charger {
	bb_uvolt = <3200000>;
	bb_uamp = <150>;
};

&twl_power {
	ti,use_poweroff;
};

&vpll2 {
	supply-dev = "omapdss_dpi.0";
	supply = "vdds_dsi";
};

/* uart1 is bluetooth - need to connect DTR */
&uart1 {
	dtr = <&btdtr 0 GPIO_ACTIVE_HIGH>;
};
&uart2 {
	dtr = <&gpsdtr 0 GPIO_ACTIVE_HIGH>;
};

&vsim {
	regulator-min-microvolt = <2800000>;
	regulator-max-microvolt = <2800000>;
};

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Re: [PATCH v3 3/4] mmc: omap_hsmmc: Remux pins to support SDIO interrupt on AM335x

[Javier Martinez Canillas]

On Sat, Oct 19, 2013 at 1:14 AM, NeilBrown <neilb@suse.de> wrote:
> On Fri, 18 Oct 2013 12:12:48 +0200 Javier Martinez Canillas
> <martinez.javier@gmail.com> wrote:
>
>> On Fri, Oct 18, 2013 at 8:20 AM, NeilBrown <neilb@suse.de> wrote:
>> > On Sat,  5 Oct 2013 13:17:09 +0200 Andreas Fenkart <afenkart@gmail.com> wrote:
>> >
>> >> The am335x can't detect pending cirq in PM runtime suspend.
>> >> This patch reconfigures dat1 as a GPIO before going to suspend.
>> >> SDIO interrupts are detected with the GPIO, while in runtime
>> >> suspend, standard detection of the module block otherwise.
>> >>
>> >> Signed-off-by: Andreas Fenkart <afenkart@gmail.com>
>> >>
>> >> diff --git a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> >> index 1136e6b..146f3ad 100644
>> >> --- a/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> >> +++ b/Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt
>> >> @@ -21,8 +21,11 @@ ti,non-removable: non-removable slot (like eMMC)
>> >>  ti,needs-special-reset: Requires a special softreset sequence
>> >>  ti,needs-special-hs-handling: HSMMC IP needs special setting for handling High Speed
>> >>  ti,quirk-swakup-missing: SOC missing the swakeup line, will not detect
>> >> -SDIO irq while in suspend. Fallback to polling. Affected chips are
>> >> -am335x,
>> >> +SDIO irq while in suspend. The workaround is to reconfigure the dat1 line as a
>> >> +GPIO upon suspend. Beyond this option and the GPIO config, you also need to set
>> >> +named pinctrl states "default", "active" and "idle ", see example below.  The
>> >> +MMC driver will then then toggle between default and idle during the runtime
>> >> +Affected chips are am335x,
>> >>
>> >>                              ------
>> >>                              | PRCM |
>> >> @@ -49,3 +52,24 @@ Example:
>> >>               vmmc-supply = <&vmmc>; /* phandle to regulator node */
>> >>               ti,non-removable;
>> >>       };
>> >> +
>> >> +[am335x with with gpio for sdio irq]
>> >> +
>> >> +     mmc1_cirq_pin: pinmux_cirq_pin {
>> >> +             pinctrl-single,pins = <
>> >> +                     0x0f8 0x3f      /* MMC0_DAT1 as GPIO2_28 */
>> >> +             >;
>> >> +     };
>> >> +
>> >> +     mmc1: mmc@48060000 {
>> >> +             ti,non-removable;
>> >> +             bus-width = <4>;
>> >> +             vmmc-supply = <&ldo2_reg>;
>> >> +             vmmc_aux-supply = <&vmmc>;
>> >> +             ti,quirk-swakeup-missing;
>> >> +             pinctrl-names = "default", "active", "idle";
>> >> +             pinctrl-0 = <&mmc1_pins>;
>> >> +             pinctrl-1 = <&mmc1_pins>;
>> >> +             pinctrl-2 = <&mmc1_cirq_pin>;
>> >> +             ti,cirq-gpio = <&gpio3 28 0>;
>> >> +     };
>> >
>> >
>> > hi,
>> >  I've been trying to get SD irq to work on my  OMAP3 DM3730.
>> > I seems to need the magic to catch interrupts while FCLK is off, as
>> > the only way I can get it to work at the moment is to keep FCLK on.
>> >
>> > I discovered your patch and tried it out, but it doesn't seem to work for me.
>> >
>> > I have a Libertas WIFI chip attached to the second mmc (which is sometimes
>> > called mmc1, and sometimes mmc2 - very confusing!).
>>
>> Hi Neil,
>>
>> I have a DM3730 board with the same setup, Libertas (Marvell SD8686)
>> wifi + bt chip attached to mmc2.
>>
>> I was going to try to add support for this to the DTS but it would be
>> great if I can use your as a reference.
>>
>> Would you be so kind to share your DTS?
>>
>
> My DTS is below.  It contains an number of things that are not supported in
> mainline yet.  Details can be found in
>    git://neil.brown.name/gta04 mainline
> and
>    http://git.neil.brown.name/?p=gta04.git;a=shortlog;h=refs/heads/mainline
> (this is my working tree and gets rebased and messed up regularly).
>
> NeilBrown
>

Hello Neil,

Thanks a lot for your DTS and the pointers to your trees.

Best regards,
Javier

> /*
>  * Copyright (C) 2013 Marek Belisko <marek@goldelico.com>
>  *
>  * Based on omap3-beagle-xm.dts
>  *
>  * This program is free software; you can redistribute it and/or modify
>  * it under the terms of the GNU General Public License version 2 as
>  * published by the Free Software Foundation.
>  */
> /dts-v1/;
> #define RFKILL_TYPE_GPS 6
> #include "omap36xx.dtsi"
>
> / {
>         model = "OMAP3 GTA04";
>         compatible = "ti,omap3-gta04", "ti,omap3";
>         chosen {
>                 bootargs = "console=ttyO2,115200n8 vram=12M omapfb.rotate_type=0 omapdss.def_disp=lcd root=/dev/mmcblk0p2 rw rootfstype=ext3 rootwait twl4030_charger.allow_usb=1 musb_hdrc.preserve_vbus=1 log_buf_len=8M ignore_loglevel no_console_suspend";
>         };
>
>         cpus {
>                 cpu@0 {
>                         cpu0-supply = <&vcc>;
>                 };
>         };
>
>         memory {
>                 device_type = "memory";
>                 reg = <0x80000000 0x20000000>; /* 512 MB */
>         };
>
>         aux-keys {
>                 compatible = "gpio-keys";
>
>                 aux-button {
>                         label = "aux";
>                         linux,code = <169>;
>                         gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
>                         gpio-key,wakeup;
>                 };
>         };
>
>         incoming-keys {
>                 compatible = "gpio-keys";
>
>                 incoming-button {
>                         label = "Option";
>                         linux,code = <240>;
>                         /* 176 for A3, 10 for A4 */
>                         gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
>                         gpio-key,wakeup;
>                 };
>         };
>
>         sound {
>                 compatible = "ti,omap-twl4030";
>                 ti,model = "gta04";
>
>                 ti,mcbsp = <&mcbsp2>;
>                 ti,codec = <&twl_audio>;
>         };
>
>         panel {
>                 compatible = "tpo,td028ttec1";
>                 display-name = "lcd";
>                 source     = "dpi.0";
>                 data-lines = <24>;
>                 cs-gpio    = <&gpio1 19 0>;
>                 scl-gpio   = <&gpio1 12 0>;
>                 din-gpio   = <&gpio1 18 0>;
>                 dout-gpio  = <&gpio1 20 0>;
>         };
>
>         backlight {
>                 compatible = "pwm-backlight";
>                 label = "pwm-backlight";
>                 pwms = <&pwm 0 2000000>;
>                 brightness-levels = <0 11 20 30 40 50 60 70 80 90 100>;
>                 default-brightness-level = <10>;
>         };
>
>         pwm: omap-pwm {
>                 compatible = "ti,omap-pwm";
>                 timers = <&timer11>;
>                 #pwm-cells = <2>;
>         };
>
>         /* need to connect uart1 DTR line to vaux4 */
>         btdtr: gpio-reg.bt {
>                 compatible = "gpio_regulator";
>                 vgpio-supply = <&vaux4>;
>                 microvolt = <3150000>;
>                 gpio-controller;
>                 #gpio-cells = <2>;
>         };
>
>         gps-rfkill {
>                 compatible = "rfkill-regulator";
>                 label = "GPS";
>                 type = <RFKILL_TYPE_GPS>;
>                 vrfkill-supply = <&vsim>;
>         };
>
>         gpsdtr: gps-onoff {
>                 compatible = "gpio-w2sg0004";
>                 gpios = <&gpio5 17 0>, <&gpio5 19 0>;
>                 /* MODE0 PULL_ENA(8) INPUT_EN(256) PULL_UP(16) */
>                 state-on = <280>;
>                 /* MODE4 PULL_ENA(8) INPUT_EN(256) PULL_UP(16) */
>                 state-off = <284>;
>                 gpio-controller;
>                 #gpio-cells = <2>;
>         };
> };
>
> &omap3_pmx_core {
>         uart1_pins: pinmux_uart1_pins {
>                 pinctrl-single,pins = <
>                         0x152 (PIN_INPUT | MUX_MODE0)           /* uart1_rx.uart1_rx */
>                         0x14c (PIN_OUTPUT |MUX_MODE0)           /* uart1_tx.uart1_tx */
>                 >;
>         };
>
>         uart2_pins: pinmux_uart2_pins {
>                 pinctrl-single,pins = <
>                         0x14a (PIN_INPUT | MUX_MODE0)           /* uart2_rx.uart2_rx */
>                         0x148 (PIN_OUTPUT | MUX_MODE0)          /* uart2_tx.uart2_tx */
>                 >;
>         };
>
>         uart3_pins: pinmux_uart3_pins {
>                 pinctrl-single,pins = <
>                         0x16e (PIN_INPUT | MUX_MODE0)           /* uart3_rx.uart3_rx */
>                         0x170 (PIN_OUTPUT | MUX_MODE0)          /* uart3_tx.uart3_tx */
>                 >;
>         };
>
>         mmc1_pins: pinmux_mmc1_pins {
>                 pinctrl-single,pins = <
>                         0x114 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_clk.sdmmc1_clk */
>                         0x116 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_cmd.sdmmc1_cmd */
>                         0x118 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat0.sdmmc1_dat0 */
>                         0x11a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat1.sdmmc1_dat1 */
>                         0x11c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat2.sdmmc1_dat2 */
>                         0x11e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc1_dat3.sdmmc1_dat3 */
>                 >;
>         };
>         mmc2_pins: pinmux_mmc2_pins {
>                 pinctrl-single,pins = <
>                         0x128 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_clk.sdmmc2_clk */
>                         0x12a (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_cmd.sdmmc2_cmd */
>                         0x12c (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat0.sdmmc2_dat0 */
>                         0x12e (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat1.sdmmc2_dat1 */
>                         0x130 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat2.sdmmc2_dat2 */
>                         0x132 (PIN_INPUT_PULLUP | MUX_MODE0)    /* sdmmc2_dat3.sdmmc1_dat3 */
>                 >;
>         };
>         mmc2_cirq_pin: pinmux_cirq_pin {
>                 pinctrl-single,pins = <
>                         0x012e (PIN_INPUT_PULLUP | MUX_MODE4)   /* MMC2_DAT1 as GPIO5_5 */
>                 >;
>         };
> };
>
> &i2c1 {
>         clock-frequency = <2600000>;
>
>         twl: twl@48 {
>                 reg = <0x48>;
>                 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
>                 interrupt-parent = <&intc>;
>
>                 twl_audio: audio {
>                         compatible = "ti,twl4030-audio";
>                         codec {
>                         };
>                 };
>                 vaux4: regulator-vaux4 {
>                         compatible = "ti,twl4030-vaux4";
>                         regulator-min-microvolt = <2800000>;
>                         regulator-max-microvolt = <3150000>;
>                         ti,allow_unsupported;
>                 };
>         };
> };
>
> #include "twl4030.dtsi"
> #include "twl4030_omap3.dtsi"
>
> &i2c2 {
>         clock-frequency = <400000>;
>
>         /* touch screen */
>         tsc2007: tsc2007@48 {
>                 compatible = "tsc2007";
>                 reg = <0x48>;
>                 interrupt-parent = <&gpio6>;
>                 interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
>                 model-number = <2007>;
>                 x-plate-ohms = <600>;
>                 pen-gpio = <&gpio6 0 GPIO_ACTIVE_LOW>;
>         };
>
>         /* pressure sensor */
>         bmp085@77 {
>                 compatible = "bosch,bmp085";
>                 reg = <0x77>;
>         };
>
>         /* accelerometer */
>         bma180@41 {
>                 compatible = "bosch,bma180";
>                 reg = <0x41>;
>                 interrupt-parent = <&gpio3>;
>                 interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
>         };
>
>         /* leds */
>         tca: tca6507@45 {
>                 compatible = "ti,tca6507";
>                 #address-cells = <1>;
>                 #size-cells = <0>;
>                 reg = <0x45>;
>
>                 gpio-controller;
>                 #gpio-cells = <2>;
>
>                 gta04_led0: red_aux@0 {
>                         label = "gta04:red:aux";
>                         reg = <0x0>;
>                 };
>
>                 gta04_led1: green_aux@1 {
>                         label = "gta04:green:aux";
>                         reg = <0x1>;
>                 };
>
>                 gta04_led3: red_power@3 {
>                         label = "gta04:red:power";
>                         reg = <0x3>;
>                         linux,default-trigger = "default-on";
>                 };
>
>                 gta04_led4: green_power@4 {
>                         label = "gta04:green:power";
>                         reg = <0x4>;
>                 };
>
>                 wifi_reset@6 {
>                         label = "gta04:wlan:reset";
>                         reg = <0x6>;
>                         make-gpio;
>                 };
>         };
>
>         /* gyroscope */
>         itg3200@68 {
>                 compatible = "invensense,itg3200";
>                 reg = <0x68>;
>         };
>
>         /* compass aka magnetometer */
>         hmc5843@1e {
>                 compatible = "honeywell,hmc5843";
>                 reg = <0x1e>;
>         };
> };
>
> &i2c3 {
>         clock-frequency = <100000>;
> };
>
> &usb_otg_hs {
>         interface-type = <0>;
>         usb-phy = <&usb2_phy>;
>         mode = <3>;
>         power = <50>;
> };
>
> &mmc1 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&mmc1_pins>;
>         vmmc-supply = <&vmmc1>;
>         bus-width = <4>;
>         ti,non-removable;
>         cap-power-off-card;
> };
>
> &mmc2 {
>         vmmc-supply = <&vaux4>;
>         bus-width = <4>;
>         ti,non-removable;
>         cap-power-off-card;
>         reset-gpios = <&tca 0 GPIO_ACTIVE_HIGH>;
>
>         ti,quirk-swakeup-missing;
>         pinctrl-names = "default", "active", "idle";
>         pinctrl-0 = <&mmc2_pins>;
>         pinctrl-1 = <&mmc2_pins>;
>         pinctrl-2 = <&mmc2_cirq_pin>;
>         ti,cirq-gpio = <&gpio5 5 0>; /* GPIO133 = 128+5 */
> };
>
> &mmc3 {
>         status = "disabled";
> };
>
> &uart1 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&uart1_pins>;
> };
>
> &uart2 {
>        pinctrl-names = "default";
>        pinctrl-0 = <&uart2_pins>;
> };
>
> &uart3 {
>         pinctrl-names = "default";
>         pinctrl-0 = <&uart3_pins>;
> };
>
> &charger {
>         bb_uvolt = <3200000>;
>         bb_uamp = <150>;
> };
>
> &twl_power {
>         ti,use_poweroff;
> };
>
> &vpll2 {
>         supply-dev = "omapdss_dpi.0";
>         supply = "vdds_dsi";
> };
>
> /* uart1 is bluetooth - need to connect DTR */
> &uart1 {
>         dtr = <&btdtr 0 GPIO_ACTIVE_HIGH>;
> };
> &uart2 {
>         dtr = <&gpsdtr 0 GPIO_ACTIVE_HIGH>;
> };
>
> &vsim {
>         regulator-min-microvolt = <2800000>;
>         regulator-max-microvolt = <2800000>;
> };

[PATCH v3 4/4] mmc: omap_hsmmc: debugfs entries for SDIO IRQ detection and GPIO remuxing.

[Andreas Fenkart]

Update the debugfs related code for the SDIO IRQ support.
Note that PSTATE shows current state of data lines, incl.
SDIO IRQ pending

Signed-off-by: Andreas Fenkart <afenkart-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>

diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index a8894ee..f7fe06f 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -81,6 +81,7 @@ static void apply_clk_hack(struct device *dev)
 #define OMAP_HSMMC_RSP54	0x0118
 #define OMAP_HSMMC_RSP76	0x011C
 #define OMAP_HSMMC_DATA		0x0120
+#define OMAP_HSMMC_PSTATE	0x0124
 #define OMAP_HSMMC_HCTL		0x0128
 #define OMAP_HSMMC_SYSCTL	0x012C
 #define OMAP_HSMMC_STAT		0x0130
@@ -1812,6 +1813,22 @@ static int omap_hsmmc_regs_show(struct seq_file *s, void *data)
 {
 	struct mmc_host *mmc = s->private;
 	struct omap_hsmmc_host *host = mmc_priv(mmc);
+	unsigned long flags;
+
+	spin_lock_irqsave(&host->irq_lock, flags);
+	seq_puts(s, "\n");
+	seq_printf(s, "sdio irq\t%s\n", ((host->flags & HSMMC_SDIO_IRQ_ENABLED)
+					 ? "enabled" : "disabled"));
+	if (host->flags & HSMMC_SWAKEUP_QUIRK) {
+		seq_printf(s, "pinmux config\t%s\n", ((host->flags &
+						       HSMMC_RUNTIME_SUSPENDED)
+						      ?  "gpio" : "sdio"));
+		if (host->flags & HSMMC_RUNTIME_SUSPENDED)
+			seq_printf(s, "sdio irq pin\t%s\n",
+				   gpio_get_value(mmc_slot(host).gpio_cirq) ?
+				   "high" : "low");
+	}
+	spin_unlock_irqrestore(&host->irq_lock, flags);
 
 	if (host->suspended) {
 		seq_printf(s, "host suspended, can't read registers\n");
@@ -1819,9 +1836,11 @@ static int omap_hsmmc_regs_show(struct seq_file *s, void *data)
 	}
 
 	pm_runtime_get_sync(host->dev);
-
+	seq_puts(s, "\nregs:\n");
 	seq_printf(s, "CON:\t\t0x%08x\n",
 			OMAP_HSMMC_READ(host->base, CON));
+	seq_printf(s, "PSTATE:\t\t0x%08x\n",
+		   OMAP_HSMMC_READ(host->base, PSTATE));
 	seq_printf(s, "HCTL:\t\t0x%08x\n",
 			OMAP_HSMMC_READ(host->base, HCTL));
 	seq_printf(s, "SYSCTL:\t\t0x%08x\n",
-- 
1.7.10.4

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