From mboxrd@z Thu Jan 1 00:00:00 1970 From: Leela Krishna Amudala Subject: [PATCH 1/2] ARM: dts: Exynos5420: add clock entries to gsc power domain Date: Tue, 15 Oct 2013 16:50:53 +0530 Message-ID: <1381836054-6590-2-git-send-email-l.krishna@samsung.com> References: <1381836054-6590-1-git-send-email-l.krishna@samsung.com> Return-path: In-reply-to: <1381836054-6590-1-git-send-email-l.krishna@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org To: linux-samsung-soc@vger.kernel.org Cc: kgene.kim@samsung.com, devicetree@vger.kernel.org, khw0178.kim@samsung.com, prathyush.k@samsung.com, cpgs@samsung.com List-Id: devicetree@vger.kernel.org Add clock nodes for oscillator clock, input clocks and parents of input clocks to gsc power domain so that we can set/restore the input clocks while powering on and powering off a domain. Signed-off-by: Prathyush K Signed-off-by: Leela Krishna Amudala --- arch/arm/boot/dts/exynos5420.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 09aa06c..7f0296c 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -116,6 +116,9 @@ gsc_pd: power-domain@10044000 { compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; + clocks = <&clock 1>, <&clock 1032>, <&clock 1033>, + <&clock 1034>, <&clock 1035>; + clock-names = "oscclk", "pclk0", "clk0", "pclk1", "clk1"; }; isp_pd: power-domain@10044020 { -- 1.7.9.5