From mboxrd@z Thu Jan 1 00:00:00 1970 From: Linus Walleij Subject: [PATCH 4/5 v2] ARM: ux500: fix I2C4 clock bit Date: Fri, 18 Oct 2013 13:43:50 +0200 Message-ID: <1382096630-23640-1-git-send-email-linus.walleij@linaro.org> Return-path: Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Lee Jones Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Linus Walleij List-Id: devicetree@vger.kernel.org The PCLK for I2C4 is controlled by bit 10 in the PCKEN registers while the KCLK is controlled by bit 9 on the KCKEN, it's one of these odd assymetric things. Correct the PCLK bit to 10. Cc: Lee Jones Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - Actually do what the commit says and update the PCLK to bit 10 instead of screwing with the KCLK. The KCLK was right all the time. --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 705bd0d..7da99fe 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -694,7 +694,7 @@ clock-frequency = <400000>; - clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>; + clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>; clock-names = "i2cclk", "apb_pclk"; }; -- 1.8.3.1 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html