[PATCH v2 0/7] drm/exynos: move hdmiphy related code to hdmiphy driver

[PATCH v2 0/7] drm/exynos: move hdmiphy related code to hdmiphy driver

[Rahul Sharma]

Currently, exynos hdmiphy operations and configs are kept
inside the hdmi driver. Hdmiphy related code is very tightly
coupled with hdmi IP driver. With these patches, hdmiphy
related stuff is moved to hdmiphy i2c driver for exynos4 and
exynos5250 socs. hdmi driver, being the phy controller, calls
exynos hdmiphy interfaces.

This series also removes hdmiphy dummy clock for hdmiphy
and replace it with Phy PMU Control from the hdmiphy driver.

At the end, support for exynos5420 hdmiphy is added to the
hdmiphy platform driver.

Drm related paches are based on exynos-drm-next branch at
git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git

Arch related paches are based on for-next branch at
http://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git

Rahul Sharma (7):
  drm/exynos: move hdmiphy code to hdmiphy i2c driver
  drm/exynos: remove dummy hdmiphy clock
  drm/exynos: add hdmiphy platform driver for exynos5420
  drm/exynos: add hdmiphy pmu bit control in hdmiphy drivers
  exynos/drm: fix ddc i2c device probe failure
  ARM: dts: update hdmiphy dt node for exynos5250
  ARM: dts: update hdmiphy dt node for exynos5420

 .../devicetree/bindings/video/exynos_hdmi.txt      |    2 +
 .../devicetree/bindings/video/exynos_hdmiphy.txt   |    8 +-
 arch/arm/boot/dts/exynos5250-smdk5250.dts          |    9 +-
 arch/arm/boot/dts/exynos5420.dtsi                  |   14 +-
 drivers/gpu/drm/exynos/Makefile                    |    3 +-
 drivers/gpu/drm/exynos/exynos_ddc.c                |    5 +
 drivers/gpu/drm/exynos/exynos_hdmi.c               |  407 +++++-----------
 drivers/gpu/drm/exynos/exynos_hdmiphy.c            |   65 ---
 drivers/gpu/drm/exynos/exynos_hdmiphy.h            |   46 ++
 drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c        |  484 ++++++++++++++++++++
 drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c   |  418 +++++++++++++++++
 drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h       |   36 ++
 drivers/gpu/drm/exynos/regs-hdmiphy.h              |   37 ++
 13 files changed, 1174 insertions(+), 360 deletions(-)
 delete mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy.c
 create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy.h
 create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c
 create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c
 create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
 create mode 100644 drivers/gpu/drm/exynos/regs-hdmiphy.h

-- 
1.7.10.4

[PATCH v2 1/7] drm/exynos: move hdmiphy code to hdmiphy i2c driver

[Rahul Sharma]

Exynos hdmiphy operations and configs are kept inside
the hdmi driver. Hdmiphy related code is very tightly
coupled with hdmi IP driver.

This patch moves hdmiphy related code to hdmiphy I2C driver
which  supports hdmiphys which are accessible through i2c
control bus for example in exynos4210, exynos4212 and
exynos5250.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
---
 .../devicetree/bindings/video/exynos_hdmi.txt      |    2 +
 drivers/gpu/drm/exynos/Makefile                    |    2 +-
 drivers/gpu/drm/exynos/exynos_hdmi.c               |  362 ++++-------------
 drivers/gpu/drm/exynos/exynos_hdmiphy.c            |   65 ---
 drivers/gpu/drm/exynos/exynos_hdmiphy.h            |   46 +++
 drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c        |  429 ++++++++++++++++++++
 drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h       |   34 ++
 drivers/gpu/drm/exynos/regs-hdmiphy.h              |   37 ++
 8 files changed, 629 insertions(+), 348 deletions(-)
 delete mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy.c
 create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy.h
 create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c
 create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
 create mode 100644 drivers/gpu/drm/exynos/regs-hdmiphy.h

diff --git a/Documentation/devicetree/bindings/video/exynos_hdmi.txt b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
index 50decf8..240eca5 100644
--- a/Documentation/devicetree/bindings/video/exynos_hdmi.txt
+++ b/Documentation/devicetree/bindings/video/exynos_hdmi.txt
@@ -25,6 +25,7 @@ Required properties:
 		sclk_pixel.
 - clock-names: aliases as per driver requirements for above clock IDs:
 	"hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi".
+- phy: it points to hdmiphy dt node.
 Example:
 
 	hdmi {
@@ -32,4 +33,5 @@ Example:
 		reg = <0x14530000 0x100000>;
 		interrupts = <0 95 0>;
 		hpd-gpio = <&gpx3 7 1>;
+		phy = <&hdmiphy>;
 	};
diff --git a/drivers/gpu/drm/exynos/Makefile b/drivers/gpu/drm/exynos/Makefile
index 639b49e..463239b 100644
--- a/drivers/gpu/drm/exynos/Makefile
+++ b/drivers/gpu/drm/exynos/Makefile
@@ -12,7 +12,7 @@ exynosdrm-$(CONFIG_DRM_EXYNOS_IOMMU) += exynos_drm_iommu.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_DMABUF) += exynos_drm_dmabuf.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_FIMD)	+= exynos_drm_fimd.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_HDMI)	+= exynos_hdmi.o exynos_mixer.o \
-					   exynos_ddc.o exynos_hdmiphy.o \
+					   exynos_ddc.o exynos_hdmiphy_i2c.o \
 					   exynos_drm_hdmi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_VIDI)	+= exynos_drm_vidi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_G2D)	+= exynos_drm_g2d.o
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index f67ffca..bbb9fbf 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -34,6 +34,7 @@
 #include <linux/io.h>
 #include <linux/of.h>
 #include <linux/of_gpio.h>
+#include <linux/of_i2c.h>
 
 #include <drm/exynos_drm.h>
 
@@ -41,6 +42,7 @@
 #include "exynos_drm_hdmi.h"
 
 #include "exynos_hdmi.h"
+#include "exynos_hdmiphy.h"
 
 #include <linux/gpio.h>
 #include <media/s5p_hdmi.h>
@@ -193,9 +195,10 @@ struct hdmi_context {
 	int				irq;
 
 	struct i2c_client		*ddc_port;
-	struct i2c_client		*hdmiphy_port;
+	struct device			*phy_dev;
+	struct exynos_hdmiphy_ops		*phy_ops;
 
-	/* current hdmiphy conf regs */
+	/* current hdmi ip configuration registers. */
 	struct hdmi_conf_regs		mode_conf;
 
 	struct hdmi_resources		res;
@@ -205,186 +208,17 @@ struct hdmi_context {
 	enum hdmi_type			type;
 };
 
-struct hdmiphy_config {
-	int pixel_clock;
-	u8 conf[32];
-};
-
-/* list of phy config settings */
-static const struct hdmiphy_config hdmiphy_v13_configs[] = {
-	{
-		.pixel_clock = 27000000,
-		.conf = {
-			0x01, 0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40,
-			0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,
-			0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
-			0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00,
-		},
-	},
-	{
-		.pixel_clock = 27027000,
-		.conf = {
-			0x01, 0x05, 0x00, 0xD4, 0x10, 0x9C, 0x09, 0x64,
-			0x6B, 0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87,
-			0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
-			0x22, 0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00,
-		},
-	},
-	{
-		.pixel_clock = 74176000,
-		.conf = {
-			0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xef, 0x5B,
-			0x6D, 0x10, 0x01, 0x51, 0xef, 0xF3, 0x54, 0xb9,
-			0x84, 0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0,
-			0x22, 0x40, 0xa5, 0x26, 0x01, 0x00, 0x00, 0x00,
-		},
-	},
-	{
-		.pixel_clock = 74250000,
-		.conf = {
-			0x01, 0x05, 0x00, 0xd8, 0x10, 0x9c, 0xf8, 0x40,
-			0x6a, 0x10, 0x01, 0x51, 0xff, 0xf1, 0x54, 0xba,
-			0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xe0,
-			0x22, 0x40, 0xa4, 0x26, 0x01, 0x00, 0x00, 0x00,
-		},
-	},
-	{
-		.pixel_clock = 148500000,
-		.conf = {
-			0x01, 0x05, 0x00, 0xD8, 0x10, 0x9C, 0xf8, 0x40,
-			0x6A, 0x18, 0x00, 0x51, 0xff, 0xF1, 0x54, 0xba,
-			0x84, 0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0,
-			0x22, 0x40, 0xa4, 0x26, 0x02, 0x00, 0x00, 0x00,
-		},
-	},
-};
-
-static const struct hdmiphy_config hdmiphy_v14_configs[] = {
-	{
-		.pixel_clock = 25200000,
-		.conf = {
-			0x01, 0x51, 0x2A, 0x75, 0x40, 0x01, 0x00, 0x08,
-			0x82, 0x80, 0xfc, 0xd8, 0x45, 0xa0, 0xac, 0x80,
-			0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0xf4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 27000000,
-		.conf = {
-			0x01, 0xd1, 0x22, 0x51, 0x40, 0x08, 0xfc, 0x20,
-			0x98, 0xa0, 0xcb, 0xd8, 0x45, 0xa0, 0xac, 0x80,
-			0x06, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0xe4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 27027000,
-		.conf = {
-			0x01, 0xd1, 0x2d, 0x72, 0x40, 0x64, 0x12, 0x08,
-			0x43, 0xa0, 0x0e, 0xd9, 0x45, 0xa0, 0xac, 0x80,
-			0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0xe3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00,
-		},
-	},
-	{
-		.pixel_clock = 36000000,
-		.conf = {
-			0x01, 0x51, 0x2d, 0x55, 0x40, 0x01, 0x00, 0x08,
-			0x82, 0x80, 0x0e, 0xd9, 0x45, 0xa0, 0xac, 0x80,
-			0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0xab, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 40000000,
-		.conf = {
-			0x01, 0x51, 0x32, 0x55, 0x40, 0x01, 0x00, 0x08,
-			0x82, 0x80, 0x2c, 0xd9, 0x45, 0xa0, 0xac, 0x80,
-			0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0x9a, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 65000000,
-		.conf = {
-			0x01, 0xd1, 0x36, 0x34, 0x40, 0x1e, 0x0a, 0x08,
-			0x82, 0xa0, 0x45, 0xd9, 0x45, 0xa0, 0xac, 0x80,
-			0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0xbd, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 74176000,
-		.conf = {
-			0x01, 0xd1, 0x3e, 0x35, 0x40, 0x5b, 0xde, 0x08,
-			0x82, 0xa0, 0x73, 0xd9, 0x45, 0xa0, 0xac, 0x80,
-			0x56, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0xa6, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 74250000,
-		.conf = {
-			0x01, 0xd1, 0x1f, 0x10, 0x40, 0x40, 0xf8, 0x08,
-			0x81, 0xa0, 0xba, 0xd8, 0x45, 0xa0, 0xac, 0x80,
-			0x3c, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0xa5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00,
-		},
-	},
-	{
-		.pixel_clock = 83500000,
-		.conf = {
-			0x01, 0xd1, 0x23, 0x11, 0x40, 0x0c, 0xfb, 0x08,
-			0x85, 0xa0, 0xd1, 0xd8, 0x45, 0xa0, 0xac, 0x80,
-			0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0x93, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 106500000,
-		.conf = {
-			0x01, 0xd1, 0x2c, 0x12, 0x40, 0x0c, 0x09, 0x08,
-			0x84, 0xa0, 0x0a, 0xd9, 0x45, 0xa0, 0xac, 0x80,
-			0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0x73, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 108000000,
-		.conf = {
-			0x01, 0x51, 0x2d, 0x15, 0x40, 0x01, 0x00, 0x08,
-			0x82, 0x80, 0x0e, 0xd9, 0x45, 0xa0, 0xac, 0x80,
-			0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0xc7, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 146250000,
-		.conf = {
-			0x01, 0xd1, 0x3d, 0x15, 0x40, 0x18, 0xfd, 0x08,
-			0x83, 0xa0, 0x6e, 0xd9, 0x45, 0xa0, 0xac, 0x80,
-			0x08, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0x50, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
-		},
-	},
-	{
-		.pixel_clock = 148500000,
-		.conf = {
-			0x01, 0xd1, 0x1f, 0x00, 0x40, 0x40, 0xf8, 0x08,
-			0x81, 0xa0, 0xba, 0xd8, 0x45, 0xa0, 0xac, 0x80,
-			0x3c, 0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86,
-			0x54, 0x4b, 0x25, 0x03, 0x00, 0x00, 0x01, 0x00,
-		},
-	},
-};
-
 struct hdmi_infoframe {
 	enum HDMI_PACKET_TYPE type;
 	u8 ver;
 	u8 len;
 };
 
+struct hdmi_drv_data {
+	enum hdmi_type	type;
+	bool		i2c_hdmiphy;
+};
+
 static inline u32 hdmi_reg_read(struct hdmi_context *hdata, u32 reg_id)
 {
 	return readl(hdata->regs + reg_id);
@@ -769,28 +603,6 @@ static struct edid *hdmi_get_edid(void *ctx, struct drm_connector *connector)
 	return raw_edid;
 }
 
-static int hdmi_find_phy_conf(struct hdmi_context *hdata, u32 pixel_clock)
-{
-	const struct hdmiphy_config *confs;
-	int count, i;
-
-	if (hdata->type == HDMI_TYPE13) {
-		confs = hdmiphy_v13_configs;
-		count = ARRAY_SIZE(hdmiphy_v13_configs);
-	} else if (hdata->type == HDMI_TYPE14) {
-		confs = hdmiphy_v14_configs;
-		count = ARRAY_SIZE(hdmiphy_v14_configs);
-	} else
-		return -EINVAL;
-
-	for (i = 0; i < count; i++)
-		if (confs[i].pixel_clock == pixel_clock)
-			return i;
-
-	DRM_DEBUG_KMS("Could not find phy config for %d\n", pixel_clock);
-	return -EINVAL;
-}
-
 static int hdmi_check_mode(void *ctx, struct drm_display_mode *mode)
 {
 	struct hdmi_context *hdata = ctx;
@@ -801,7 +613,7 @@ static int hdmi_check_mode(void *ctx, struct drm_display_mode *mode)
 		(mode->flags & DRM_MODE_FLAG_INTERLACE) ? true :
 		false, mode->clock * 1000);
 
-	ret = hdmi_find_phy_conf(hdata, mode->clock * 1000);
+	ret = hdata->phy_ops->check_mode(hdata->phy_dev, mode);
 	if (ret < 0)
 		return ret;
 	return 0;
@@ -1302,19 +1114,13 @@ static void hdmi_mode_apply(struct hdmi_context *hdata)
 
 static void hdmiphy_conf_reset(struct hdmi_context *hdata)
 {
-	u8 buffer[2];
 	u32 reg;
 
 	clk_disable_unprepare(hdata->res.sclk_hdmi);
 	clk_set_parent(hdata->res.mout_hdmi, hdata->res.sclk_pixel);
 	clk_prepare_enable(hdata->res.sclk_hdmi);
 
-	/* operation mode */
-	buffer[0] = 0x1f;
-	buffer[1] = 0x00;
-
-	if (hdata->hdmiphy_port)
-		i2c_master_send(hdata->hdmiphy_port, buffer, 2);
+	hdata->phy_ops->enable(hdata->phy_dev, 0);
 
 	if (hdata->type == HDMI_TYPE13)
 		reg = HDMI_V13_PHY_RSTOUT;
@@ -1333,76 +1139,24 @@ static void hdmiphy_poweron(struct hdmi_context *hdata)
 	if (hdata->type == HDMI_TYPE14)
 		hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, 0,
 			HDMI_PHY_POWER_OFF_EN);
+
+	hdata->phy_ops->poweron(hdata->phy_dev, 1);
 }
 
 static void hdmiphy_poweroff(struct hdmi_context *hdata)
 {
+	hdata->phy_ops->poweron(hdata->phy_dev, 0);
+
 	if (hdata->type == HDMI_TYPE14)
 		hdmi_reg_writemask(hdata, HDMI_PHY_CON_0, ~0,
 			HDMI_PHY_POWER_OFF_EN);
 }
 
-static void hdmiphy_conf_apply(struct hdmi_context *hdata)
-{
-	const u8 *hdmiphy_data;
-	u8 buffer[32];
-	u8 operation[2];
-	u8 read_buffer[32] = {0, };
-	int ret;
-	int i;
-
-	if (!hdata->hdmiphy_port) {
-		DRM_ERROR("hdmiphy is not attached\n");
-		return;
-	}
-
-	/* pixel clock */
-	i = hdmi_find_phy_conf(hdata, hdata->mode_conf.pixel_clock);
-	if (i < 0) {
-		DRM_ERROR("failed to find hdmiphy conf\n");
-		return;
-	}
-
-	if (hdata->type == HDMI_TYPE13)
-		hdmiphy_data = hdmiphy_v13_configs[i].conf;
-	else
-		hdmiphy_data = hdmiphy_v14_configs[i].conf;
-
-	memcpy(buffer, hdmiphy_data, 32);
-	ret = i2c_master_send(hdata->hdmiphy_port, buffer, 32);
-	if (ret != 32) {
-		DRM_ERROR("failed to configure HDMIPHY via I2C\n");
-		return;
-	}
-
-	usleep_range(10000, 12000);
-
-	/* operation mode */
-	operation[0] = 0x1f;
-	operation[1] = 0x80;
-
-	ret = i2c_master_send(hdata->hdmiphy_port, operation, 2);
-	if (ret != 2) {
-		DRM_ERROR("failed to enable hdmiphy\n");
-		return;
-	}
-
-	ret = i2c_master_recv(hdata->hdmiphy_port, read_buffer, 32);
-	if (ret < 0) {
-		DRM_ERROR("failed to read hdmiphy config\n");
-		return;
-	}
-
-	for (i = 0; i < ret; i++)
-		DRM_DEBUG_KMS("hdmiphy[0x%02x] write[0x%02x] - "
-			"recv [0x%02x]\n", i, buffer[i], read_buffer[i]);
-}
-
 static void hdmi_conf_apply(struct hdmi_context *hdata)
 {
 	hdmiphy_conf_reset(hdata);
-	hdmiphy_conf_apply(hdata);
-
+	hdata->phy_ops->commit(hdata->phy_dev);
+	hdata->phy_ops->enable(hdata->phy_dev, 1);
 	mutex_lock(&hdata->hdmi_mutex);
 	hdmi_conf_reset(hdata);
 	hdmi_conf_init(hdata);
@@ -1646,6 +1400,8 @@ static void hdmi_mode_set(void *ctx, struct drm_display_mode *mode)
 		hdmi_v13_mode_set(hdata, mode);
 	else
 		hdmi_v14_mode_set(hdata, mode);
+
+	hdata->phy_ops->mode_set(hdata->phy_dev, mode);
 }
 
 static void hdmi_get_max_resol(void *ctx, unsigned int *width,
@@ -1824,7 +1580,7 @@ fail:
 	return -ENODEV;
 }
 
-static struct i2c_client *hdmi_ddc, *hdmi_hdmiphy;
+static struct i2c_client *hdmi_ddc;
 
 void hdmi_attach_ddc_client(struct i2c_client *ddc)
 {
@@ -1832,12 +1588,6 @@ void hdmi_attach_ddc_client(struct i2c_client *ddc)
 		hdmi_ddc = ddc;
 }
 
-void hdmi_attach_hdmiphy_client(struct i2c_client *hdmiphy)
-{
-	if (hdmiphy)
-		hdmi_hdmiphy = hdmiphy;
-}
-
 static struct s5p_hdmi_platform_data *drm_hdmi_dt_parse_pdata
 					(struct device *dev)
 {
@@ -1862,13 +1612,61 @@ err_data:
 	return NULL;
 }
 
+static int hdmi_register_phy_device(struct hdmi_context *hdata, bool i2c_dev)
+{
+	struct device_node *np;
+	struct i2c_client *client;
+	int ret;
+
+	/* register hdmiphy driver */
+	ret = exynos_hdmiphy_i2c_driver_register();
+	if (ret) {
+		DRM_ERROR("failed to register phy driver. ret %d.\n", ret);
+		goto err;
+	}
+
+	np = of_parse_phandle(hdata->dev->of_node, "phy", 0);
+	if (!np) {
+		DRM_ERROR("Could not find 'phy' property\n");
+		ret = -ENOENT;
+		goto err;
+	}
+
+	/* find hdmi phy on i2c bus */
+	client = of_find_i2c_device_by_node(np);
+	if (!client) {
+		DRM_ERROR("Could not find i2c 'phy' device\n");
+		ret = -ENODEV;
+		goto err;
+	}
+	hdata->phy_dev = &client->dev;
+	hdata->phy_ops = exynos_hdmiphy_i2c_device_get_ops(
+				hdata->phy_dev);
+
+	if (!hdata->phy_ops) {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	of_node_put(np);
+	return 0;
+err:
+	of_node_put(np);
+	return ret;
+}
+
+static struct hdmi_drv_data exynos5250_hdmi_drv_data = {
+	.type = HDMI_TYPE14,
+	.i2c_hdmiphy = 1,
+};
+
 static struct of_device_id hdmi_match_types[] = {
 	{
 		.compatible = "samsung,exynos5-hdmi",
-		.data	= (void	*)HDMI_TYPE14,
+		.data	= &exynos5250_hdmi_drv_data,
 	}, {
 		.compatible = "samsung,exynos4212-hdmi",
-		.data	= (void	*)HDMI_TYPE14,
+		.data	= &exynos5250_hdmi_drv_data,
 	}, {
 		/* end node */
 	}
@@ -1881,6 +1679,7 @@ static int hdmi_probe(struct platform_device *pdev)
 	struct hdmi_context *hdata;
 	struct s5p_hdmi_platform_data *pdata;
 	struct resource *res;
+	struct hdmi_drv_data *drv;
 	const struct of_device_id *match;
 	int ret;
 
@@ -1909,8 +1708,9 @@ static int hdmi_probe(struct platform_device *pdev)
 	match = of_match_node(hdmi_match_types, dev->of_node);
 	if (!match)
 		return -ENODEV;
-	hdata->type = (enum hdmi_type)match->data;
+	drv = (struct hdmi_drv_data *)match->data;
 
+	hdata->type = drv->type;
 	hdata->hpd_gpio = pdata->hpd_gpio;
 	hdata->dev = dev;
 
@@ -1939,15 +1739,13 @@ static int hdmi_probe(struct platform_device *pdev)
 
 	hdata->ddc_port = hdmi_ddc;
 
-	/* hdmiphy i2c driver */
-	if (i2c_add_driver(&hdmiphy_driver)) {
-		DRM_ERROR("failed to register hdmiphy i2c driver\n");
-		ret = -ENOENT;
+	/* hdmiphy driver */
+	ret = hdmi_register_phy_device(hdata, drv->i2c_hdmiphy);
+	if (ret) {
+		DRM_ERROR("failed to get hdmiphy device. ret %d.\n", ret);
 		goto err_ddc;
 	}
 
-	hdata->hdmiphy_port = hdmi_hdmiphy;
-
 	hdata->irq = gpio_to_irq(hdata->hpd_gpio);
 	if (hdata->irq < 0) {
 		DRM_ERROR("failed to get GPIO irq\n");
@@ -1977,7 +1775,7 @@ static int hdmi_probe(struct platform_device *pdev)
 	return 0;
 
 err_hdmiphy:
-	i2c_del_driver(&hdmiphy_driver);
+	exynos_hdmiphy_i2c_driver_unregister();
 err_ddc:
 	i2c_del_driver(&ddc_driver);
 	return ret;
@@ -1990,7 +1788,7 @@ static int hdmi_remove(struct platform_device *pdev)
 	pm_runtime_disable(dev);
 
 	/* hdmiphy i2c driver */
-	i2c_del_driver(&hdmiphy_driver);
+	exynos_hdmiphy_i2c_driver_unregister();
 	/* DDC i2c driver */
 	i2c_del_driver(&ddc_driver);
 
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy.c b/drivers/gpu/drm/exynos/exynos_hdmiphy.c
deleted file mode 100644
index 59abb14..0000000
--- a/drivers/gpu/drm/exynos/exynos_hdmiphy.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * Copyright (C) 2011 Samsung Electronics Co.Ltd
- * Authors:
- *	Seung-Woo Kim <sw0312.kim@samsung.com>
- *	Inki Dae <inki.dae@samsung.com>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- *
- */
-
-#include <drm/drmP.h>
-
-#include <linux/kernel.h>
-#include <linux/i2c.h>
-#include <linux/of.h>
-
-#include "exynos_drm_drv.h"
-#include "exynos_hdmi.h"
-
-
-static int hdmiphy_probe(struct i2c_client *client,
-	const struct i2c_device_id *id)
-{
-	hdmi_attach_hdmiphy_client(client);
-
-	dev_info(&client->adapter->dev, "attached s5p_hdmiphy "
-		"into i2c adapter successfully\n");
-
-	return 0;
-}
-
-static int hdmiphy_remove(struct i2c_client *client)
-{
-	dev_info(&client->adapter->dev, "detached s5p_hdmiphy "
-		"from i2c adapter successfully\n");
-
-	return 0;
-}
-
-static struct of_device_id hdmiphy_match_types[] = {
-	{
-		.compatible = "samsung,exynos5-hdmiphy",
-	}, {
-		.compatible = "samsung,exynos4210-hdmiphy",
-	}, {
-		.compatible = "samsung,exynos4212-hdmiphy",
-	}, {
-		/* end node */
-	}
-};
-
-struct i2c_driver hdmiphy_driver = {
-	.driver = {
-		.name	= "exynos-hdmiphy",
-		.owner	= THIS_MODULE,
-		.of_match_table = hdmiphy_match_types,
-	},
-	.probe		= hdmiphy_probe,
-	.remove		= hdmiphy_remove,
-	.command		= NULL,
-};
-EXPORT_SYMBOL(hdmiphy_driver);
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy.h b/drivers/gpu/drm/exynos/exynos_hdmiphy.h
new file mode 100644
index 0000000..26f279d
--- /dev/null
+++ b/drivers/gpu/drm/exynos/exynos_hdmiphy.h
@@ -0,0 +1,46 @@
+/*
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Authors:
+ *	Rahul Sharma <rahul.sharma@samsung.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef _EXYNOS_HDMIPHY_H_
+#define _EXYNOS_HDMIPHY_H_
+
+/*
+ * Exynos DRM Hdmiphy Structure.
+ *
+ * @check_mode: check if mode is supported.
+ * @mode_set: set the mode if supported.
+ * @commit: apply the mode.
+ * @enable: enable phy operation.
+ * @poweron: phy power on or off.
+ */
+struct exynos_hdmiphy_ops {
+	int (*check_mode)(struct device *dev,
+			struct drm_display_mode *mode);
+	int (*mode_set)(struct device *dev,
+			struct drm_display_mode *mode);
+	int (*commit)(struct device *dev);
+	void (*enable)(struct device *dev, int enable);
+	void (*poweron)(struct device *dev, int mode);
+};
+
+int exynos_hdmiphy_i2c_driver_register(void);
+void exynos_hdmiphy_i2c_driver_unregister(void);
+
+int exynos_hdmiphy_platform_driver_register(void);
+void exynos_hdmiphy_platform_driver_unregister(void);
+
+struct exynos_hdmiphy_ops *exynos_hdmiphy_i2c_device_get_ops
+			(struct device *dev);
+struct exynos_hdmiphy_ops *exynos_hdmiphy_platform_device_get_ops
+			(struct device *dev);
+
+#endif
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c b/drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c
new file mode 100644
index 0000000..76b3a74
--- /dev/null
+++ b/drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c
@@ -0,0 +1,429 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics Co.Ltd
+ * Authors:
+ *	Rahul Sharma <rahul.sharma@samsung.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;	either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include <drm/drmP.h>
+
+#include <linux/kernel.h>
+#include <linux/i2c.h>
+#include <linux/module.h>
+
+#include "regs-hdmiphy.h"
+#include "exynos_hdmiphy.h"
+#include "exynos_hdmiphy_priv.h"
+
+/* list of default phy config settings */
+static struct hdmiphy_config hdmiphy_4212_configs[] = {
+	{
+		.pixel_clock = 25200000,
+		.conf = {
+			0x51, 0x2A, 0x75, 0x40, 0x01, 0x00, 0x08, 0x82,
+			0x80, 0xfc, 0xd8, 0x45, 0xa0, 0xac, 0x80, 0x08,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0xf4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 27000000,
+		.conf = {
+			0xd1, 0x22, 0x51, 0x40, 0x08, 0xfc, 0x20, 0x98,
+			0xa0, 0xcb, 0xd8, 0x45, 0xa0, 0xac, 0x80, 0x06,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0xe4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 27027000,
+		.conf = {
+			0xd1, 0x2d, 0x72, 0x40, 0x64, 0x12, 0x08, 0x43,
+			0xa0, 0x0e, 0xd9, 0x45, 0xa0, 0xac, 0x80, 0x08,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0xe3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x00,
+		},
+	},
+	{
+		.pixel_clock = 36000000,
+		.conf = {
+			0x51, 0x2d, 0x55, 0x40, 0x01, 0x00, 0x08, 0x82,
+			0x80, 0x0e, 0xd9, 0x45, 0xa0, 0xac, 0x80, 0x08,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0xab, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 40000000,
+		.conf = {
+			0x51, 0x32, 0x55, 0x40, 0x01, 0x00, 0x08, 0x82,
+			0x80, 0x2c, 0xd9, 0x45, 0xa0, 0xac, 0x80, 0x08,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0x9a, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 65000000,
+		.conf = {
+			0xd1, 0x36, 0x34, 0x40, 0x1e, 0x0a, 0x08, 0x82,
+			0xa0, 0x45, 0xd9, 0x45, 0xa0, 0xac, 0x80, 0x08,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0xbd, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 74176000,
+		.conf = {
+			0xd1, 0x3e, 0x35, 0x40, 0x5b, 0xde, 0x08, 0x82,
+			0xa0, 0x73, 0xd9, 0x45, 0xa0, 0xac, 0x80, 0x56,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0xa6, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 74250000,
+		.conf = {
+			0xd1, 0x1f, 0x10, 0x40, 0x40, 0xf8, 0x08, 0x81,
+			0xa0, 0xba, 0xd8, 0x45, 0xa0, 0xac, 0x80, 0x3c,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0xa5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x00,
+		},
+	},
+	{
+		.pixel_clock = 83500000,
+		.conf = {
+			0xd1, 0x23, 0x11, 0x40, 0x0c, 0xfb, 0x08, 0x85,
+			0xa0, 0xd1, 0xd8, 0x45, 0xa0, 0xac, 0x80, 0x08,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0x93, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 106500000,
+		.conf = {
+			0xd1, 0x2c, 0x12, 0x40, 0x0c, 0x09, 0x08, 0x84,
+			0xa0, 0x0a, 0xd9, 0x45, 0xa0, 0xac, 0x80, 0x08,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0x73, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 108000000,
+		.conf = {
+			0x51, 0x2d, 0x15, 0x40, 0x01, 0x00, 0x08, 0x82,
+			0x80, 0x0e, 0xd9, 0x45, 0xa0, 0xac, 0x80, 0x08,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0xc7, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 146250000,
+		.conf = {
+			0xd1, 0x3d, 0x15, 0x40, 0x18, 0xfd, 0x08, 0x83,
+			0xa0, 0x6e, 0xd9, 0x45, 0xa0, 0xac, 0x80, 0x08,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0x50, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 148500000,
+		.conf = {
+			0xd1, 0x1f, 0x00, 0x40, 0x40, 0xf8, 0x08, 0x81,
+			0xa0, 0xba, 0xd8, 0x45, 0xa0, 0xac, 0x80, 0x3c,
+			0x80, 0x11, 0x04, 0x02, 0x22, 0x44, 0x86, 0x54,
+			0x4b, 0x25, 0x03, 0x00, 0x00, 0x01, 0x00,
+		},
+	},
+};
+
+static struct hdmiphy_config hdmiphy_4210_configs[] = {
+	{
+		.pixel_clock = 27000000,
+		.conf = {
+			0x05, 0x00, 0xD8, 0x10, 0x1C, 0x30, 0x40, 0x6B,
+			0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87, 0x84,
+			0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0, 0x22,
+			0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00,
+		},
+	},
+	{
+		.pixel_clock = 27027000,
+		.conf = {
+			0x05, 0x00, 0xD4, 0x10, 0x9C, 0x09, 0x64, 0x6B,
+			0x10, 0x02, 0x51, 0xDF, 0xF2, 0x54, 0x87, 0x84,
+			0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0, 0x22,
+			0x40, 0xE3, 0x26, 0x00, 0x00, 0x00, 0x00,
+		},
+	},
+	{
+		.pixel_clock = 74176000,
+		.conf = {
+			0x05, 0x00, 0xD8, 0x10, 0x9C, 0xef, 0x5B, 0x6D,
+			0x10, 0x01, 0x51, 0xef, 0xF3, 0x54, 0xb9, 0x84,
+			0x00, 0x30, 0x38, 0x00, 0x08, 0x10, 0xE0, 0x22,
+			0x40, 0xa5, 0x26, 0x01, 0x00, 0x00, 0x00,
+		},
+	},
+	{
+		.pixel_clock = 74250000,
+		.conf = {
+			0x05, 0x00, 0xd8, 0x10, 0x9c, 0xf8, 0x40, 0x6a,
+			0x10, 0x01, 0x51, 0xff, 0xf1, 0x54, 0xba, 0x84,
+			0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xe0, 0x22,
+			0x40, 0xa4, 0x26, 0x01, 0x00, 0x00, 0x00,
+		},
+	},
+	{
+		.pixel_clock = 148500000,
+		.conf = {
+			0x05, 0x00, 0xD8, 0x10, 0x9C, 0xf8, 0x40, 0x6A,
+			0x18, 0x00, 0x51, 0xff, 0xF1, 0x54, 0xba, 0x84,
+			0x00, 0x10, 0x38, 0x00, 0x08, 0x10, 0xE0, 0x22,
+			0x40, 0xa4, 0x26, 0x02, 0x00, 0x00, 0x00,
+		},
+	},
+};
+
+static struct hdmiphy_config *hdmiphy_find_conf(struct hdmiphy_context *hdata,
+			unsigned int pixel_clk)
+{
+	int i;
+
+	for (i = 0; i < hdata->nr_confs; i++)
+		if (hdata->confs[i].pixel_clock == pixel_clk)
+			return &hdata->confs[i];
+
+	return NULL;
+}
+
+static int hdmiphy_reg_writeb(struct device *dev,
+			u32 reg_offset, u8 value)
+{
+	u8 buffer[2];
+	int ret;
+
+	if (reg_offset >= HDMIPHY_REG_COUNT)
+		return -EINVAL;
+
+	buffer[0] = reg_offset;
+	buffer[1] = value;
+
+	ret = i2c_master_send(to_i2c_client(dev),
+			buffer, 2);
+	if (ret == 2)
+		return 0;
+	return ret;
+}
+
+static int hdmiphy_reg_write_buf(struct device *dev,
+			u32 reg_offset, const u8 *buf, u32 len)
+{
+	int ret;
+	u8 buffer[HDMIPHY_REG_COUNT];
+
+	if ((reg_offset + len) > HDMIPHY_REG_COUNT)
+		return -EINVAL;
+
+	buffer[0] = reg_offset;
+	memcpy(&buffer[1], buf, len);
+
+	ret = i2c_master_send(to_i2c_client(dev),
+			buffer, len);
+	if (ret == len)
+		return 0;
+	return ret;
+}
+
+static int hdmiphy_check_mode(struct device *dev,
+			struct drm_display_mode *mode)
+{
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
+	const struct hdmiphy_config *conf;
+
+	DRM_DEBUG("xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n",
+		mode->hdisplay, mode->vdisplay,
+		mode->vrefresh, (mode->flags & DRM_MODE_FLAG_INTERLACE)
+		? true : false, mode->clock * 1000);
+
+	conf = hdmiphy_find_conf(hdata, (mode->clock * 1000));
+	if (!conf) {
+		DRM_DEBUG("Display Mode is not supported.\n");
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int hdmiphy_mode_set(struct device *dev,
+			struct drm_display_mode *mode)
+{
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	hdata->current_conf = hdmiphy_find_conf(hdata, mode->clock * 1000);
+	if (!hdata->current_conf) {
+		DRM_ERROR("Display Mode is not supported.\n");
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int hdmiphy_commit(struct device *dev)
+{
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
+	int ret;
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	ret = hdmiphy_reg_write_buf(dev, 1, hdata->current_conf->conf,
+			HDMIPHY_REG_COUNT - 1);
+	if (ret) {
+		DRM_ERROR("failed to configure hdmiphy.\n");
+		return ret;
+	}
+
+	/* need this delay before phy can be set to operation. */
+	usleep_range(10000, 12000);
+	return 0;
+}
+
+static void hdmiphy_enable(struct device *dev, int enable)
+{
+	int ret;
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	if (enable)
+		ret = hdmiphy_reg_writeb(dev, HDMIPHY_MODE_SET_DONE,
+				HDMIPHY_MODE_EN);
+	else
+		ret = hdmiphy_reg_writeb(dev, HDMIPHY_MODE_SET_DONE, 0);
+
+	if (ret < 0) {
+		DRM_ERROR("failed to %s hdmiphy. ret %d.\n",
+				enable ? "enable" : "disable", ret);
+		return;
+	}
+}
+
+static void hdmiphy_poweron(struct device *dev, int mode)
+{
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+}
+
+struct exynos_hdmiphy_ops *exynos_hdmiphy_i2c_device_get_ops
+			(struct device *dev)
+{
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	if (hdata)
+		return hdata->ops;
+
+	return NULL;
+}
+
+static struct exynos_hdmiphy_ops phy_ops = {
+	.check_mode = hdmiphy_check_mode,
+	.mode_set = hdmiphy_mode_set,
+	.commit = hdmiphy_commit,
+	.enable = hdmiphy_enable,
+	.poweron = hdmiphy_poweron,
+};
+
+static struct hdmiphy_drv_data exynos4212_hdmiphy_drv_data = {
+	.confs = hdmiphy_4212_configs,
+	.count = ARRAY_SIZE(hdmiphy_4212_configs)
+};
+
+static struct hdmiphy_drv_data exynos4210_hdmiphy_drv_data = {
+	.confs = hdmiphy_4210_configs,
+	.count = ARRAY_SIZE(hdmiphy_4210_configs)
+};
+
+static struct of_device_id hdmiphy_i2c_device_match_types[] = {
+	{
+		.compatible = "samsung,exynos5-hdmiphy",
+		.data	= &exynos4212_hdmiphy_drv_data,
+	}, {
+		.compatible = "samsung,exynos4210-hdmiphy",
+		.data	= &exynos4210_hdmiphy_drv_data,
+	}, {
+		.compatible = "samsung,exynos4212-hdmiphy",
+		.data	= &exynos4212_hdmiphy_drv_data,
+	}, {
+		/* end node */
+	}
+};
+
+static int hdmiphy_i2c_device_probe(struct i2c_client *client,
+	const struct i2c_device_id *id)
+{
+	struct device *dev = &client->dev;
+	struct hdmiphy_context *hdata;
+	struct hdmiphy_drv_data *drv;
+	const struct of_device_id *match;
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	hdata = devm_kzalloc(dev, sizeof(*hdata), GFP_KERNEL);
+	if (!hdata) {
+		DRM_ERROR("failed to allocate hdmiphy context.\n");
+		return -ENOMEM;
+	}
+
+	match = of_match_node(of_match_ptr(
+		hdmiphy_i2c_device_match_types),
+		dev->of_node);
+
+	if (!match)
+		return -ENODEV;
+
+	drv = (struct hdmiphy_drv_data *)match->data;
+
+	hdata->confs = drv->confs;
+	hdata->nr_confs = drv->count;
+	hdata->ops = &phy_ops;
+
+	i2c_set_clientdata(client, hdata);
+	return 0;
+}
+
+static const struct i2c_device_id hdmiphy_id[] = {
+	{ },
+};
+
+struct i2c_driver hdmiphy_i2c_driver = {
+	.driver = {
+		.name	= "exynos-hdmiphy",
+		.owner	= THIS_MODULE,
+		.of_match_table = of_match_ptr(
+				hdmiphy_i2c_device_match_types),
+	},
+	.id_table		= hdmiphy_id,
+	.probe		= hdmiphy_i2c_device_probe,
+	.command		= NULL,
+};
+
+int exynos_hdmiphy_i2c_driver_register(void)
+{
+	int ret;
+
+	ret = i2c_add_driver(&hdmiphy_i2c_driver);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+void exynos_hdmiphy_i2c_driver_unregister(void)
+{
+	i2c_del_driver(&hdmiphy_i2c_driver);
+}
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h b/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
new file mode 100644
index 0000000..4948c81
--- /dev/null
+++ b/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
@@ -0,0 +1,34 @@
+/*
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * Authors:
+ *	Rahul Sharma <rahul.sharma@samsung.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;	either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+#ifndef _EXYNOS_HDMI_PRIV_H_
+#define _EXYNOS_HDMI_PRIV_H_
+
+struct hdmiphy_context {
+	/* hdmiphy resources */
+	struct exynos_hdmiphy_ops	*ops;
+	struct hdmiphy_config	*confs;
+	unsigned int		nr_confs;
+	struct hdmiphy_config	*current_conf;
+};
+
+struct hdmiphy_config {
+	int pixel_clock;
+	u8 conf[HDMIPHY_REG_COUNT];
+};
+
+struct hdmiphy_drv_data {
+	struct hdmiphy_config *confs;
+	unsigned int count;
+};
+
+#endif
diff --git a/drivers/gpu/drm/exynos/regs-hdmiphy.h b/drivers/gpu/drm/exynos/regs-hdmiphy.h
new file mode 100644
index 0000000..97e87ab
--- /dev/null
+++ b/drivers/gpu/drm/exynos/regs-hdmiphy.h
@@ -0,0 +1,37 @@
+/*
+ *
+ *  regs-hdmiphy.h
+ *
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com/
+ *
+ * HDMI-PHY register header file for Samsung HDMI driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef SAMSUNG_REGS_HDMIPHY_H
+#define SAMSUNG_REGS_HDMIPHY_H
+
+#define HDMIPHY_REG_COUNT	32
+
+/*
+ * Register part
+*/
+#define HDMIPHY_MODE_SET_DONE	0x1f
+
+/*
+ * Bit definition part
+ */
+
+/* HDMIPHY_MODE_SET_DONE */
+#define HDMIPHY_MODE_EN		(1 << 7)
+
+/* hdmiphy pmu control bits */
+#define PMU_HDMI_PHY_CONTROL_MASK	1
+#define PMU_HDMI_PHY_ENABLE		1
+#define PMU_HDMI_PHY_DISABLE		0
+
+#endif /* SAMSUNG_REGS_HDMIPHY_H */
-- 
1.7.10.4

[PATCH v2 2/7] drm/exynos: remove dummy hdmiphy clock

[Rahul Sharma]

hdmiphy is a dummy clock which actually controls the PMU bit
to enable/disable hdmiphy (before CCF). This clock is cleaned
from the hdmi driver.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_hdmi.c |    8 --------
 1 file changed, 8 deletions(-)

diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index bbb9fbf..444541d 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -84,7 +84,6 @@ struct hdmi_resources {
 	struct clk			*sclk_hdmi;
 	struct clk			*sclk_pixel;
 	struct clk			*sclk_hdmiphy;
-	struct clk			*hdmiphy;
 	struct clk			*mout_hdmi;
 	struct regulator_bulk_data	*regul_bulk;
 	int				regul_count;
@@ -1442,7 +1441,6 @@ static void hdmi_poweron(struct hdmi_context *hdata)
 	if (regulator_bulk_enable(res->regul_count, res->regul_bulk))
 		DRM_DEBUG_KMS("failed to enable regulator bulk\n");
 
-	clk_prepare_enable(res->hdmiphy);
 	clk_prepare_enable(res->hdmi);
 	clk_prepare_enable(res->sclk_hdmi);
 
@@ -1467,7 +1465,6 @@ static void hdmi_poweroff(struct hdmi_context *hdata)
 
 	clk_disable_unprepare(res->sclk_hdmi);
 	clk_disable_unprepare(res->hdmi);
-	clk_disable_unprepare(res->hdmiphy);
 	regulator_bulk_disable(res->regul_count, res->regul_bulk);
 
 	mutex_lock(&hdata->hdmi_mutex);
@@ -1560,11 +1557,6 @@ static int hdmi_resources_init(struct hdmi_context *hdata)
 		DRM_ERROR("failed to get clock 'sclk_hdmiphy'\n");
 		goto fail;
 	}
-	res->hdmiphy = devm_clk_get(dev, "hdmiphy");
-	if (IS_ERR(res->hdmiphy)) {
-		DRM_ERROR("failed to get clock 'hdmiphy'\n");
-		goto fail;
-	}
 	res->mout_hdmi = devm_clk_get(dev, "mout_hdmi");
 	if (IS_ERR(res->mout_hdmi)) {
 		DRM_ERROR("failed to get clock 'mout_hdmi'\n");
-- 
1.7.10.4

[PATCH v2 3/7] drm/exynos: add hdmiphy platform driver for exynos5420

[Rahul Sharma]

Exynos5420 hdmiphy device is a platform device, unlike
predecessor SoCs where it used to be a I2C device. This
support is added to the hdmiphy platform driver.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
---
 drivers/gpu/drm/exynos/Makefile                  |    1 +
 drivers/gpu/drm/exynos/exynos_hdmi.c             |   61 +++-
 drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c |  363 ++++++++++++++++++++++
 drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h     |    1 +
 4 files changed, 413 insertions(+), 13 deletions(-)
 create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c

diff --git a/drivers/gpu/drm/exynos/Makefile b/drivers/gpu/drm/exynos/Makefile
index 463239b..eedd145 100644
--- a/drivers/gpu/drm/exynos/Makefile
+++ b/drivers/gpu/drm/exynos/Makefile
@@ -13,6 +13,7 @@ exynosdrm-$(CONFIG_DRM_EXYNOS_DMABUF) += exynos_drm_dmabuf.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_FIMD)	+= exynos_drm_fimd.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_HDMI)	+= exynos_hdmi.o exynos_mixer.o \
 					   exynos_ddc.o exynos_hdmiphy_i2c.o \
+					   exynos_hdmiphy_platform.o \
 					   exynos_drm_hdmi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_VIDI)	+= exynos_drm_vidi.o
 exynosdrm-$(CONFIG_DRM_EXYNOS_G2D)	+= exynos_drm_g2d.o
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 444541d..e199d7d 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -35,6 +35,7 @@
 #include <linux/of.h>
 #include <linux/of_gpio.h>
 #include <linux/of_i2c.h>
+#include <linux/of_platform.h>
 
 #include <drm/exynos_drm.h>
 
@@ -1608,10 +1609,14 @@ static int hdmi_register_phy_device(struct hdmi_context *hdata, bool i2c_dev)
 {
 	struct device_node *np;
 	struct i2c_client *client;
+	struct platform_device *pdev;
 	int ret;
 
 	/* register hdmiphy driver */
-	ret = exynos_hdmiphy_i2c_driver_register();
+	if (i2c_dev)
+		ret = exynos_hdmiphy_i2c_driver_register();
+	else
+		ret = exynos_hdmiphy_platform_driver_register();
 	if (ret) {
 		DRM_ERROR("failed to register phy driver. ret %d.\n", ret);
 		goto err;
@@ -1624,16 +1629,29 @@ static int hdmi_register_phy_device(struct hdmi_context *hdata, bool i2c_dev)
 		goto err;
 	}
 
-	/* find hdmi phy on i2c bus */
-	client = of_find_i2c_device_by_node(np);
-	if (!client) {
-		DRM_ERROR("Could not find i2c 'phy' device\n");
-		ret = -ENODEV;
-		goto err;
+	if (i2c_dev) {
+		/* find hdmi phy on i2c bus */
+		client = of_find_i2c_device_by_node(np);
+		if (!client) {
+			DRM_ERROR("Could not find i2c 'phy' device\n");
+			ret = -ENODEV;
+			goto err;
+		}
+		hdata->phy_dev = &client->dev;
+		hdata->phy_ops = exynos_hdmiphy_i2c_device_get_ops(
+					hdata->phy_dev);
+	} else {
+		/* find hdmi phy on platform bus */
+		pdev = of_find_device_by_node(np);
+		if (!pdev) {
+			DRM_ERROR("Could not find platform 'phy' device\n");
+			ret = -ENODEV;
+			goto err;
+		}
+		hdata->phy_dev = &pdev->dev;
+		hdata->phy_ops = exynos_hdmiphy_platform_device_get_ops(
+					hdata->phy_dev);
 	}
-	hdata->phy_dev = &client->dev;
-	hdata->phy_ops = exynos_hdmiphy_i2c_device_get_ops(
-				hdata->phy_dev);
 
 	if (!hdata->phy_ops) {
 		ret = -EINVAL;
@@ -1652,6 +1670,11 @@ static struct hdmi_drv_data exynos5250_hdmi_drv_data = {
 	.i2c_hdmiphy = 1,
 };
 
+static struct hdmi_drv_data exynos5420_hdmi_drv_data = {
+	.type = HDMI_TYPE14,
+	.i2c_hdmiphy = 0,
+};
+
 static struct of_device_id hdmi_match_types[] = {
 	{
 		.compatible = "samsung,exynos5-hdmi",
@@ -1660,6 +1683,9 @@ static struct of_device_id hdmi_match_types[] = {
 		.compatible = "samsung,exynos4212-hdmi",
 		.data	= &exynos5250_hdmi_drv_data,
 	}, {
+		.compatible = "samsung,exynos5420-hdmi",
+		.data	= &exynos5420_hdmi_drv_data,
+	}, {
 		/* end node */
 	}
 };
@@ -1767,7 +1793,10 @@ static int hdmi_probe(struct platform_device *pdev)
 	return 0;
 
 err_hdmiphy:
-	exynos_hdmiphy_i2c_driver_unregister();
+	if (drv->i2c_hdmiphy)
+		exynos_hdmiphy_i2c_driver_unregister();
+	else
+		exynos_hdmiphy_platform_driver_unregister();
 err_ddc:
 	i2c_del_driver(&ddc_driver);
 	return ret;
@@ -1776,11 +1805,17 @@ err_ddc:
 static int hdmi_remove(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
+	struct exynos_drm_hdmi_context *ctx = get_hdmi_context(dev);
+	struct hdmi_context *hdata = ctx->ctx;
 
 	pm_runtime_disable(dev);
 
-	/* hdmiphy i2c driver */
-	exynos_hdmiphy_i2c_driver_unregister();
+	/* hdmiphy driver */
+	if (i2c_verify_client(hdata->phy_dev))
+		exynos_hdmiphy_i2c_driver_unregister();
+	else
+		exynos_hdmiphy_platform_driver_unregister();
+
 	/* DDC i2c driver */
 	i2c_del_driver(&ddc_driver);
 
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c b/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c
new file mode 100644
index 0000000..053d854
--- /dev/null
+++ b/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c
@@ -0,0 +1,363 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics Co.Ltd
+ * Authors:
+ *	Rahul Sharma <rahul.sharma@samsung.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ */
+#include <drm/drmP.h>
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+
+#include "regs-hdmiphy.h"
+#include "exynos_hdmiphy.h"
+#include "exynos_hdmiphy_priv.h"
+
+/* default phy config settings for exynos5420 */
+static struct hdmiphy_config hdmiphy_5420_configs[] = {
+	{
+		.pixel_clock = 25200000,
+		.conf = {
+			0x52, 0x3F, 0x55, 0x40, 0x01, 0x00, 0xC8, 0x82,
+			0xC8, 0xBD, 0xD8, 0x45, 0xA0, 0xAC, 0x80, 0x06,
+			0x80, 0x01, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0xF4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 27000000,
+		.conf = {
+			0xD1, 0x22, 0x51, 0x40, 0x08, 0xFC, 0xE0, 0x98,
+			0xE8, 0xCB, 0xD8, 0x45, 0xA0, 0xAC, 0x80, 0x06,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0xE4, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 27027000,
+		.conf = {
+			0xD1, 0x2D, 0x72, 0x40, 0x64, 0x12, 0xC8, 0x43,
+			0xE8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80, 0x06,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0xE3, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 36000000,
+		.conf = {
+			0x51, 0x2D, 0x55, 0x40, 0x40, 0x00, 0xC8, 0x02,
+			0xC8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80, 0x08,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0xAB, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 40000000,
+		.conf = {
+			0xD1, 0x21, 0x31, 0x40, 0x3C, 0x28, 0xC8, 0x87,
+			0xE8, 0xC8, 0xD8, 0x45, 0xA0, 0xAC, 0x80, 0x08,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0x9A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 65000000,
+		.conf = {
+			0xD1, 0x36, 0x34, 0x40, 0x0C, 0x04, 0xC8, 0x82,
+			0xE8, 0x45, 0xD9, 0x45, 0xA0, 0xAC, 0x80, 0x08,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0xBD, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 71000000,
+		.conf = {
+			0xD1, 0x3B, 0x35, 0x40, 0x0C, 0x04, 0xC8, 0x85,
+			0xE8, 0x63, 0xD9, 0x45, 0xA0, 0xAC, 0x80, 0x08,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0x57, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 74176000,
+		.conf = {
+			0xD1, 0x1F, 0x10, 0x40, 0x5B, 0xEF, 0xC8, 0x81,
+			0xE8, 0xB9, 0xD8, 0x45, 0xA0, 0xAC, 0x80, 0x56,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0xA6, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 74250000,
+		.conf = {
+			0xD1, 0x1F, 0x10, 0x40, 0x40, 0xF8, 0xC8, 0x81,
+			0xE8, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, 0x80, 0x56,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0xA5, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 83500000,
+		.conf = {
+			0xD1, 0x23, 0x11, 0x40, 0x0C, 0xFB, 0xC8, 0x85,
+			0xE8, 0xD1, 0xD8, 0x45, 0xA0, 0xAC, 0x80, 0x08,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0x4A, 0x24, 0x00, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 106500000,
+		.conf = {
+			0xD1, 0x2C, 0x12, 0x40, 0x0C, 0x09, 0xC8, 0x84,
+			0xE8, 0x0A, 0xD9, 0x45, 0xA0, 0xAC, 0x80, 0x08,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0x73, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 108000000,
+		.conf = {
+			0x51, 0x2D, 0x15, 0x40, 0x01, 0x00, 0xC8, 0x82,
+			0xC8, 0x0E, 0xD9, 0x45, 0xA0, 0xAC, 0x80, 0x08,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0xC7, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 146250000,
+		.conf = {
+			0xD1, 0x3D, 0x15, 0x40, 0x18, 0xFD, 0xC8, 0x83,
+			0xE8, 0x6E, 0xD9, 0x45, 0xA0, 0xAC, 0x80, 0x08,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0x54, 0x24, 0x01, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+	{
+		.pixel_clock = 148500000,
+		.conf = {
+			0xD1, 0x1F, 0x00, 0x40, 0x40, 0xF8, 0xC8, 0x81,
+			0xE8, 0xBA, 0xD8, 0x45, 0xA0, 0xAC, 0x80, 0x66,
+			0x80, 0x09, 0x84, 0x05, 0x02, 0x24, 0x66, 0x54,
+			0x4B, 0x25, 0x03, 0x00, 0x00, 0x01, 0x80,
+		},
+	},
+};
+
+static struct hdmiphy_config *hdmiphy_find_conf(struct hdmiphy_context *hdata,
+			unsigned int pixel_clk)
+{
+	int i;
+
+	for (i = 0; i < hdata->nr_confs; i++)
+		if (hdata->confs[i].pixel_clock == pixel_clk)
+			return &hdata->confs[i];
+
+	return NULL;
+}
+
+static int hdmiphy_reg_writeb(struct hdmiphy_context *hdata,
+			u32 reg_offset, u8 value)
+{
+	if (reg_offset >= HDMIPHY_REG_COUNT)
+		return -EINVAL;
+
+	writeb(value, hdata->regs + (reg_offset<<2));
+	return 0;
+}
+
+static int hdmiphy_reg_write_buf(struct hdmiphy_context *hdata,
+			u32 reg_offset, const u8 *buf, u32 len)
+{
+	int i;
+
+	if ((reg_offset + len) > HDMIPHY_REG_COUNT)
+		return -EINVAL;
+
+	for (i = 0; i < len; i++)
+		writeb(buf[i], hdata->regs +
+			((reg_offset + i)<<2));
+	return 0;
+}
+
+static int hdmiphy_check_mode(struct device *dev,
+			struct drm_display_mode *mode)
+{
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
+	const struct hdmiphy_config *conf;
+
+	DRM_DEBUG("%s xres=%d, yres=%d, refresh=%d, intl=%d clock=%d\n",
+		__func__, mode->hdisplay, mode->vdisplay,
+		mode->vrefresh, (mode->flags & DRM_MODE_FLAG_INTERLACE)
+		? true : false, mode->clock * 1000);
+
+	conf = hdmiphy_find_conf(hdata, mode->clock * 1000);
+	if (!conf) {
+		DRM_DEBUG("Display Mode is not supported.\n");
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int hdmiphy_mode_set(struct device *dev,
+			struct drm_display_mode *mode)
+{
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	hdata->current_conf = hdmiphy_find_conf(hdata, mode->clock * 1000);
+	if (!hdata->current_conf) {
+		DRM_ERROR("Display Mode is not supported.\n");
+		return -EINVAL;
+	}
+	return 0;
+}
+
+static int hdmiphy_commit(struct device *dev)
+{
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
+	int ret;
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	ret = hdmiphy_reg_write_buf(hdata, 1, hdata->current_conf->conf,
+			HDMIPHY_REG_COUNT - 1);
+	if (ret) {
+		DRM_ERROR("failed to configure hdmiphy. ret %d.\n", ret);
+		return ret;
+	}
+
+	/* need this delay before phy can be set to operation. */
+	usleep_range(10000, 12000);
+	return 0;
+}
+
+static void hdmiphy_enable(struct device *dev, int enable)
+{
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	if (enable)
+		hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE,
+				HDMIPHY_MODE_EN);
+	else
+		hdmiphy_reg_writeb(hdata, HDMIPHY_MODE_SET_DONE, 0);
+}
+
+static void hdmiphy_poweron(struct device *dev, int mode)
+{
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+}
+
+struct exynos_hdmiphy_ops *exynos_hdmiphy_platform_device_get_ops
+			(struct device *dev)
+{
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	if (hdata)
+		return hdata->ops;
+
+	return NULL;
+}
+
+static struct exynos_hdmiphy_ops phy_ops = {
+	.check_mode = hdmiphy_check_mode,
+	.mode_set = hdmiphy_mode_set,
+	.commit = hdmiphy_commit,
+	.enable = hdmiphy_enable,
+	.poweron = hdmiphy_poweron,
+};
+
+static struct hdmiphy_drv_data exynos5420_hdmiphy_drv_data = {
+	.confs = hdmiphy_5420_configs,
+	.count = ARRAY_SIZE(hdmiphy_5420_configs)
+};
+
+static struct of_device_id hdmiphy_platform_device_match_types[] = {
+	{
+		.compatible = "samsung,exynos5420-hdmiphy",
+		.data	= &exynos5420_hdmiphy_drv_data,
+	}, {
+		/* end node */
+	}
+};
+
+static int hdmiphy_platform_device_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct hdmiphy_context *hdata;
+	struct hdmiphy_drv_data *drv;
+	struct resource *res;
+	const struct of_device_id *match;
+
+	DRM_DEBUG_KMS("[%d]\n", __LINE__);
+
+	hdata = devm_kzalloc(dev, sizeof(*hdata), GFP_KERNEL);
+	if (!hdata) {
+		DRM_ERROR("failed to allocate hdmiphy context.\n");
+		return -ENOMEM;
+	}
+
+	match = of_match_node(of_match_ptr(
+		hdmiphy_platform_device_match_types),
+		dev->of_node);
+
+	if (!match)
+		return -ENODEV;
+
+	drv = (struct hdmiphy_drv_data *)match->data;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		DRM_ERROR("failed to find phy registers\n");
+		return -ENOENT;
+	}
+
+	hdata->regs = devm_request_and_ioremap(&pdev->dev, res);
+	if (!hdata->regs) {
+		DRM_ERROR("failed to map registers\n");
+		return -ENXIO;
+	}
+
+	hdata->confs = drv->confs;
+	hdata->nr_confs = drv->count;
+	hdata->ops = &phy_ops;
+
+	platform_set_drvdata(pdev, hdata);
+	return 0;
+}
+
+struct platform_driver hdmiphy_platform_driver = {
+	.driver = {
+		.name	= "exynos-hdmiphy",
+		.owner	= THIS_MODULE,
+		.of_match_table = of_match_ptr(
+				hdmiphy_platform_device_match_types),
+	},
+	.probe		= hdmiphy_platform_device_probe,
+};
+
+int exynos_hdmiphy_platform_driver_register(void)
+{
+	int ret;
+
+	ret = platform_driver_register(&hdmiphy_platform_driver);
+	if (ret)
+		return ret;
+
+	return 0;
+}
+
+void exynos_hdmiphy_platform_driver_unregister(void)
+{
+	platform_driver_unregister(&hdmiphy_platform_driver);
+}
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h b/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
index 4948c81..9ba46d4 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
+++ b/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
@@ -15,6 +15,7 @@
 
 struct hdmiphy_context {
 	/* hdmiphy resources */
+	void __iomem		*regs;
 	struct exynos_hdmiphy_ops	*ops;
 	struct hdmiphy_config	*confs;
 	unsigned int		nr_confs;
-- 
1.7.10.4

[PATCH v2 4/7] drm/exynos: add hdmiphy pmu bit control in hdmiphy drivers

[Rahul Sharma]

Before hdmiphy operation like config, start etc, hdmiphy
bit in PMU block should be enabled. Earlier this happens
in hdmi driver through a dummy "hdmiphy" clock.

Pmu bit control is added in both i2c and platform driver
for exynos hdmiphy.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
---
 .../devicetree/bindings/video/exynos_hdmiphy.txt   |    8 ++-
 drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c        |   55 ++++++++++++++++++++
 drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c   |   55 ++++++++++++++++++++
 drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h       |    1 +
 4 files changed, 118 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/video/exynos_hdmiphy.txt b/Documentation/devicetree/bindings/video/exynos_hdmiphy.txt
index 162f641..91e6578 100644
--- a/Documentation/devicetree/bindings/video/exynos_hdmiphy.txt
+++ b/Documentation/devicetree/bindings/video/exynos_hdmiphy.txt
@@ -5,11 +5,17 @@ Required properties:
 	1) "samsung,exynos5-hdmiphy" <DEPRECATED>
 	2) "samsung,exynos4210-hdmiphy".
 	3) "samsung,exynos4212-hdmiphy".
-- reg: I2C address of the hdmiphy device.
+- reg: Physical address of the hdmiphy device.
+- phy-power-control: this child node represents phy power control
+	register which is inside the pmu block (power management unit).
 
 Example:
 
 	hdmiphy {
 		compatible = "samsung,exynos4210-hdmiphy";
 		reg = <0x38>;
+
+		phy-power-control {
+			reg = <0x10040700 0x04>;
+		};
 	};
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c b/drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c
index 76b3a74..6b411bd 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c
@@ -201,6 +201,47 @@ static struct hdmiphy_config *hdmiphy_find_conf(struct hdmiphy_context *hdata,
 	return NULL;
 }
 
+static int hdmiphy_dt_parse_power_control(struct i2c_client *client)
+{
+	struct device_node *phy_pow_ctrl_node;
+	struct hdmiphy_context *hdata = i2c_get_clientdata(client);
+	u32 buf[2];
+	int ret = 0;
+
+	phy_pow_ctrl_node = of_get_child_by_name(client->dev.of_node,
+			"phy-power-control");
+	if (!phy_pow_ctrl_node) {
+		DRM_ERROR("Failed to find phy power control node\n");
+		return -ENODEV;
+	}
+
+	/* reg property holds two informations: addr of pmu register, size */
+	if (of_property_read_u32_array(phy_pow_ctrl_node, "reg", buf, 2)) {
+		DRM_ERROR("faild to get phy power control reg\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	hdata->phy_pow_ctrl_reg = devm_ioremap(&client->dev, buf[0], buf[1]);
+	if (!hdata->phy_pow_ctrl_reg) {
+		DRM_ERROR("failed to ioremap phy pmu reg\n");
+		ret = -ENOMEM;
+	}
+
+out:
+	of_node_put(phy_pow_ctrl_node);
+	return ret;
+}
+
+static inline void hdmiphy_pow_ctrl_reg_writemask(
+			struct hdmiphy_context *hdata,
+			u32 value, u32 mask)
+{
+	u32 old = readl(hdata->phy_pow_ctrl_reg);
+	value = (value & mask) | (old & ~mask);
+	writel(value, hdata->phy_pow_ctrl_reg);
+}
+
 static int hdmiphy_reg_writeb(struct device *dev,
 			u32 reg_offset, u8 value)
 {
@@ -313,9 +354,16 @@ static void hdmiphy_enable(struct device *dev, int enable)
 
 static void hdmiphy_poweron(struct device *dev, int mode)
 {
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
 
 	DRM_DEBUG_KMS("[%d]\n", __LINE__);
 
+	if (mode)
+		hdmiphy_pow_ctrl_reg_writemask(hdata, PMU_HDMI_PHY_ENABLE,
+		PMU_HDMI_PHY_CONTROL_MASK);
+	else
+		hdmiphy_pow_ctrl_reg_writemask(hdata, PMU_HDMI_PHY_DISABLE,
+		PMU_HDMI_PHY_CONTROL_MASK);
 }
 
 struct exynos_hdmiphy_ops *exynos_hdmiphy_i2c_device_get_ops
@@ -370,6 +418,7 @@ static int hdmiphy_i2c_device_probe(struct i2c_client *client,
 	struct hdmiphy_context *hdata;
 	struct hdmiphy_drv_data *drv;
 	const struct of_device_id *match;
+	int ret;
 
 	DRM_DEBUG_KMS("[%d]\n", __LINE__);
 
@@ -393,6 +442,12 @@ static int hdmiphy_i2c_device_probe(struct i2c_client *client,
 	hdata->ops = &phy_ops;
 
 	i2c_set_clientdata(client, hdata);
+	ret = hdmiphy_dt_parse_power_control(client);
+	if (ret) {
+		DRM_ERROR("failed to map hdmiphy pow control reg.\n");
+		return ret;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c b/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c
index 053d854..8fe1786 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c
@@ -160,6 +160,47 @@ static struct hdmiphy_config *hdmiphy_find_conf(struct hdmiphy_context *hdata,
 	return NULL;
 }
 
+static int hdmiphy_dt_parse_power_control(struct platform_device *pdev)
+{
+	struct device_node *phy_pow_ctrl_node;
+	struct hdmiphy_context *hdata = platform_get_drvdata(pdev);
+	u32 buf[2];
+	int ret = 0;
+
+	phy_pow_ctrl_node = of_get_child_by_name(pdev->dev.of_node,
+			"phy-power-control");
+	if (!phy_pow_ctrl_node) {
+		DRM_ERROR("Failed to find phy power control node\n");
+		return -ENODEV;
+	}
+
+	/* reg property holds two informations: addr of pmu register, size */
+	if (of_property_read_u32_array(phy_pow_ctrl_node, "reg", buf, 2)) {
+		DRM_ERROR("faild to get phy power control reg\n");
+		ret = -EINVAL;
+		goto out;
+	}
+
+	hdata->phy_pow_ctrl_reg = devm_ioremap(&pdev->dev, buf[0], buf[1]);
+	if (!hdata->phy_pow_ctrl_reg) {
+		DRM_ERROR("failed to ioremap phy pmu reg\n");
+		ret = -ENOMEM;
+	}
+
+out:
+	of_node_put(phy_pow_ctrl_node);
+	return ret;
+}
+
+static void hdmiphy_pow_ctrl_reg_writemask(
+			struct hdmiphy_context *hdata,
+			u32 value, u32 mask)
+{
+	u32 old = readl(hdata->phy_pow_ctrl_reg);
+	value = (value & mask) | (old & ~mask);
+	writel(value, hdata->phy_pow_ctrl_reg);
+}
+
 static int hdmiphy_reg_writeb(struct hdmiphy_context *hdata,
 			u32 reg_offset, u8 value)
 {
@@ -252,9 +293,16 @@ static void hdmiphy_enable(struct device *dev, int enable)
 
 static void hdmiphy_poweron(struct device *dev, int mode)
 {
+	struct hdmiphy_context *hdata = dev_get_drvdata(dev);
 
 	DRM_DEBUG_KMS("[%d]\n", __LINE__);
 
+	if (mode)
+		hdmiphy_pow_ctrl_reg_writemask(hdata, PMU_HDMI_PHY_ENABLE,
+			PMU_HDMI_PHY_CONTROL_MASK);
+	else
+		hdmiphy_pow_ctrl_reg_writemask(hdata, PMU_HDMI_PHY_DISABLE,
+			PMU_HDMI_PHY_CONTROL_MASK);
 }
 
 struct exynos_hdmiphy_ops *exynos_hdmiphy_platform_device_get_ops
@@ -298,6 +346,7 @@ static int hdmiphy_platform_device_probe(struct platform_device *pdev)
 	struct hdmiphy_drv_data *drv;
 	struct resource *res;
 	const struct of_device_id *match;
+	int ret;
 
 	DRM_DEBUG_KMS("[%d]\n", __LINE__);
 
@@ -333,6 +382,12 @@ static int hdmiphy_platform_device_probe(struct platform_device *pdev)
 	hdata->ops = &phy_ops;
 
 	platform_set_drvdata(pdev, hdata);
+	ret = hdmiphy_dt_parse_power_control(pdev);
+	if (ret) {
+		DRM_ERROR("failed to map hdmiphy pow control reg.\n");
+		return ret;
+	}
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h b/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
index 9ba46d4..5987baf 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
+++ b/drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
@@ -15,6 +15,7 @@
 
 struct hdmiphy_context {
 	/* hdmiphy resources */
+	void __iomem		*phy_pow_ctrl_reg;
 	void __iomem		*regs;
 	struct exynos_hdmiphy_ops	*ops;
 	struct hdmiphy_config	*confs;
-- 
1.7.10.4

[PATCH v2 5/7] exynos/drm: fix ddc i2c device probe failure

[Rahul Sharma]

Exynos hdmi ddc is a I2C device and if we register hdmi ddc
driver with id_table as NULL, cause failure in probing.

id_table field should not be NULL for i2c_driver registeration.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
---
 drivers/gpu/drm/exynos/exynos_ddc.c |    5 +++++
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/exynos/exynos_ddc.c b/drivers/gpu/drm/exynos/exynos_ddc.c
index 6a8c84e..54ead55 100644
--- a/drivers/gpu/drm/exynos/exynos_ddc.c
+++ b/drivers/gpu/drm/exynos/exynos_ddc.c
@@ -51,12 +51,17 @@ static struct of_device_id hdmiddc_match_types[] = {
 	}
 };
 
+static struct i2c_device_id ddc_idtable[] = {
+	{ },
+};
+
 struct i2c_driver ddc_driver = {
 	.driver = {
 		.name = "exynos-hdmiddc",
 		.owner = THIS_MODULE,
 		.of_match_table = hdmiddc_match_types,
 	},
+	.id_table	= ddc_idtable,
 	.probe		= s5p_ddc_probe,
 	.remove		= s5p_ddc_remove,
 	.command		= NULL,
-- 
1.7.10.4

[PATCH v2 6/7] ARM: dts: update hdmiphy dt node for exynos5250

[Rahul Sharma]

hdmiphy dt node needs a child node called 'phy-power-control'
which represents the PMU register for power controlling the
hdmiphy.

hdmi driver dt node provides phy property which points to
the hdmiphy dt node.

Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com>
---
 arch/arm/boot/dts/exynos5250-smdk5250.dts |    9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 49f18c2..99a83412 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -134,9 +134,15 @@
 		samsung,i2c-sda-delay = <100>;
 		samsung,i2c-max-bus-freq = <66000>;
 
-		hdmiphy@38 {
+		hdmiphy: hdmiphy@38 {
 			compatible = "samsung,exynos4212-hdmiphy";
 			reg = <0x38>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			phy-power-control {
+				reg = <0x10040700 0x04>;
+			};
 		};
 	};
 
@@ -220,6 +226,7 @@
 
 	hdmi {
 		hpd-gpio = <&gpx3 7 0>;
+		phy = <&hdmiphy>;
 	};
 
 	codec@11000000 {
-- 
1.7.10.4

[PATCH v2 7/7] ARM: dts: update hdmiphy dt node for exynos5420

[Rahul Sharma]

hdmiphy dt node needs a child node called 'phy-power-control'
which represents the PMU register for power controlling the
hdmiphy.

hdmi driver dt node provides phy property which points to
the hdmiphy dt node.

Signed-off-by: Rahul Sharma <rahul.sharma-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org>
---
 arch/arm/boot/dts/exynos5420.dtsi |   14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index ed687ac..f7fb337 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -207,7 +207,7 @@
 	};
 
 	hdmi@14530000 {
-		compatible = "samsung,exynos4212-hdmi";
+		compatible = "samsung,exynos5420-hdmi";
 		reg = <0x14530000 0x70000>;
 		interrupts = <0 95 0>;
 		clocks = <&clock 413>, <&clock 143>, <&clock 768>,
@@ -215,6 +215,18 @@
 		clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
 			"sclk_hdmiphy", "mout_hdmi";
 		status = "disabled";
+		phy = <&hdmiphy>;
+	};
+
+	hdmiphy: hdmiphy@145D0000 {
+		compatible = "samsung,exynos5420-hdmiphy";
+		reg = <0x145D0000 0x20>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		phy-power-control {
+			reg = <0x10040700 0x04>;
+		};
 	};
 
 	mixer@14450000 {
-- 
1.7.10.4

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Re: [PATCH v2 0/7] drm/exynos: move hdmiphy related code to hdmiphy driver

[Inki Dae]

Hi Rahul,

I have merged the re-factoring patch set from Sean Paul to
exynos-drm-next except eDP related patch set that these need more
reviews. Can you re-base at top of exynos-drm-next?

Thanks,
Inki Dae

2013/10/22 Rahul Sharma <rahul.sharma@samsung.com>:
> Currently, exynos hdmiphy operations and configs are kept
> inside the hdmi driver. Hdmiphy related code is very tightly
> coupled with hdmi IP driver. With these patches, hdmiphy
> related stuff is moved to hdmiphy i2c driver for exynos4 and
> exynos5250 socs. hdmi driver, being the phy controller, calls
> exynos hdmiphy interfaces.
>
> This series also removes hdmiphy dummy clock for hdmiphy
> and replace it with Phy PMU Control from the hdmiphy driver.
>
> At the end, support for exynos5420 hdmiphy is added to the
> hdmiphy platform driver.
>
> Drm related paches are based on exynos-drm-next branch at
> git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git
>
> Arch related paches are based on for-next branch at
> http://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git
>
> Rahul Sharma (7):
>   drm/exynos: move hdmiphy code to hdmiphy i2c driver
>   drm/exynos: remove dummy hdmiphy clock
>   drm/exynos: add hdmiphy platform driver for exynos5420
>   drm/exynos: add hdmiphy pmu bit control in hdmiphy drivers
>   exynos/drm: fix ddc i2c device probe failure
>   ARM: dts: update hdmiphy dt node for exynos5250
>   ARM: dts: update hdmiphy dt node for exynos5420
>
>  .../devicetree/bindings/video/exynos_hdmi.txt      |    2 +
>  .../devicetree/bindings/video/exynos_hdmiphy.txt   |    8 +-
>  arch/arm/boot/dts/exynos5250-smdk5250.dts          |    9 +-
>  arch/arm/boot/dts/exynos5420.dtsi                  |   14 +-
>  drivers/gpu/drm/exynos/Makefile                    |    3 +-
>  drivers/gpu/drm/exynos/exynos_ddc.c                |    5 +
>  drivers/gpu/drm/exynos/exynos_hdmi.c               |  407 +++++-----------
>  drivers/gpu/drm/exynos/exynos_hdmiphy.c            |   65 ---
>  drivers/gpu/drm/exynos/exynos_hdmiphy.h            |   46 ++
>  drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c        |  484 ++++++++++++++++++++
>  drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c   |  418 +++++++++++++++++
>  drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h       |   36 ++
>  drivers/gpu/drm/exynos/regs-hdmiphy.h              |   37 ++
>  13 files changed, 1174 insertions(+), 360 deletions(-)
>  delete mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy.c
>  create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy.h
>  create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c
>  create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c
>  create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
>  create mode 100644 drivers/gpu/drm/exynos/regs-hdmiphy.h
>
> --
> 1.7.10.4
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
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Re: [PATCH v2 0/7] drm/exynos: move hdmiphy related code to hdmiphy driver

[Rahul Sharma]

On 28 October 2013 19:10, Inki Dae <inki.dae@samsung.com> wrote:
> Hi Rahul,
>
> I have merged the re-factoring patch set from Sean Paul to
> exynos-drm-next except eDP related patch set that these need more
> reviews. Can you re-base at top of exynos-drm-next?
>

Ok. I will rebase and post it again.

regards,
Rahul Sharma.

> Thanks,
> Inki Dae
>
> 2013/10/22 Rahul Sharma <rahul.sharma@samsung.com>:
>> Currently, exynos hdmiphy operations and configs are kept
>> inside the hdmi driver. Hdmiphy related code is very tightly
>> coupled with hdmi IP driver. With these patches, hdmiphy
>> related stuff is moved to hdmiphy i2c driver for exynos4 and
>> exynos5250 socs. hdmi driver, being the phy controller, calls
>> exynos hdmiphy interfaces.
>>
>> This series also removes hdmiphy dummy clock for hdmiphy
>> and replace it with Phy PMU Control from the hdmiphy driver.
>>
>> At the end, support for exynos5420 hdmiphy is added to the
>> hdmiphy platform driver.
>>
>> Drm related paches are based on exynos-drm-next branch at
>> git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos.git
>>
>> Arch related paches are based on for-next branch at
>> http://git.kernel.org/cgit/linux/kernel/git/kgene/linux-samsung.git
>>
>> Rahul Sharma (7):
>>   drm/exynos: move hdmiphy code to hdmiphy i2c driver
>>   drm/exynos: remove dummy hdmiphy clock
>>   drm/exynos: add hdmiphy platform driver for exynos5420
>>   drm/exynos: add hdmiphy pmu bit control in hdmiphy drivers
>>   exynos/drm: fix ddc i2c device probe failure
>>   ARM: dts: update hdmiphy dt node for exynos5250
>>   ARM: dts: update hdmiphy dt node for exynos5420
>>
>>  .../devicetree/bindings/video/exynos_hdmi.txt      |    2 +
>>  .../devicetree/bindings/video/exynos_hdmiphy.txt   |    8 +-
>>  arch/arm/boot/dts/exynos5250-smdk5250.dts          |    9 +-
>>  arch/arm/boot/dts/exynos5420.dtsi                  |   14 +-
>>  drivers/gpu/drm/exynos/Makefile                    |    3 +-
>>  drivers/gpu/drm/exynos/exynos_ddc.c                |    5 +
>>  drivers/gpu/drm/exynos/exynos_hdmi.c               |  407 +++++-----------
>>  drivers/gpu/drm/exynos/exynos_hdmiphy.c            |   65 ---
>>  drivers/gpu/drm/exynos/exynos_hdmiphy.h            |   46 ++
>>  drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c        |  484 ++++++++++++++++++++
>>  drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c   |  418 +++++++++++++++++
>>  drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h       |   36 ++
>>  drivers/gpu/drm/exynos/regs-hdmiphy.h              |   37 ++
>>  13 files changed, 1174 insertions(+), 360 deletions(-)
>>  delete mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy.c
>>  create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy.h
>>  create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_i2c.c
>>  create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_platform.c
>>  create mode 100644 drivers/gpu/drm/exynos/exynos_hdmiphy_priv.h
>>  create mode 100644 drivers/gpu/drm/exynos/regs-hdmiphy.h
>>
>> --
>> 1.7.10.4
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at  http://vger.kernel.org/majordomo-info.html