[PATCH v8 0/4] pinctrl: imx27: imx27 pincontrol driver

[PATCH v8 0/4] pinctrl: imx27: imx27 pincontrol driver

[Markus Pargmann]

Hi,

This version has some commit message updates. It still depends on the pinctrl driver patch [1].

Regards,

Markus

[1] [PATCH] pinctrl: imx1-core populate subdevices
    <1384193987-20740-1-git-send-email-mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
    http://thread.gmane.org/gmane.linux.drivers.devicetree/51584


Changes in v8:
 - Update commit messages to describe updated patch content

Changes in v7:
 - Added patch for imx27-pingrp.h
 - Pin nodes moved to board dts files
 - gpio nodes in imx27.dtsi moved to iomux node


Markus Pargmann (4):
  ARM: dts: imx27 iomux device node
  ARM: dts: imx27 phyCARD-S pinctrl
  ARM: dts: imx27 phycore move uart1 to rdk
  ARM: dts: imx27 phycore pinctrl

 arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts |  43 ++++++++
 arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts |  16 +++
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts   |  23 +++++
 arch/arm/boot/dts/imx27-phytec-phycore-som.dts   |  20 +++-
 arch/arm/boot/dts/imx27.dtsi                     | 125 ++++++++++++-----------
 5 files changed, 165 insertions(+), 62 deletions(-)

-- 
1.8.4.2

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[PATCH v8 1/4] ARM: dts: imx27 iomux device node

[Markus Pargmann]

This patch adds a iomux node for imx27 pinctrl driver. The gpio
registers are embedded in the iomux memory area. So this patch moves
them into the iomux node for a better hardware description.

Signed-off-by: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
---
 arch/arm/boot/dts/imx27.dtsi | 125 +++++++++++++++++++++++--------------------
 1 file changed, 67 insertions(+), 58 deletions(-)

diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
index b7a1c6d..f119296 100644
--- a/arch/arm/boot/dts/imx27.dtsi
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -10,6 +10,7 @@
  */
 
 #include "skeleton.dtsi"
+#include "imx27-pingrp.h"
 
 / {
 	aliases {
@@ -235,64 +236,72 @@
 				status = "disabled";
 			};
 
-			gpio1: gpio@10015000 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015000 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-			};
-
-			gpio2: gpio@10015100 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015100 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-			};
-
-			gpio3: gpio@10015200 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015200 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-			};
-
-			gpio4: gpio@10015300 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015300 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-			};
-
-			gpio5: gpio@10015400 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015400 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
-			};
-
-			gpio6: gpio@10015500 {
-				compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
-				reg = <0x10015500 0x100>;
-				interrupts = <8>;
-				gpio-controller;
-				#gpio-cells = <2>;
-				interrupt-controller;
-				#interrupt-cells = <2>;
+			iomuxc: iomuxc@10015000 {
+				compatible = "fsl,imx27-iomuxc";
+				reg = <0x10015000 0x600>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges;
+
+				gpio1: gpio@10015000 {
+					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+					reg = <0x10015000 0x100>;
+					interrupts = <8>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+				};
+
+				gpio2: gpio@10015100 {
+					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+					reg = <0x10015100 0x100>;
+					interrupts = <8>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+				};
+
+				gpio3: gpio@10015200 {
+					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+					reg = <0x10015200 0x100>;
+					interrupts = <8>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+				};
+
+				gpio4: gpio@10015300 {
+					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+					reg = <0x10015300 0x100>;
+					interrupts = <8>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+				};
+
+				gpio5: gpio@10015400 {
+					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+					reg = <0x10015400 0x100>;
+					interrupts = <8>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+				};
+
+				gpio6: gpio@10015500 {
+					compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
+					reg = <0x10015500 0x100>;
+					interrupts = <8>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					interrupt-controller;
+					#interrupt-cells = <2>;
+				};
 			};
 
 			audmux: audmux@10016000 {
-- 
1.8.4.2

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[PATCH v8 2/4] ARM: dts: imx27 phyCARD-S pinctrl

[Markus Pargmann]

Add pinctrl nodes and properties for phyCARD-S device nodes.

Signed-off-by: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
---
 arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts | 43 ++++++++++++++++++++++++
 arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts | 16 +++++++++
 2 files changed, 59 insertions(+)

diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
index 5a31c77..5289680 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-rdk.dts
@@ -54,6 +54,8 @@
 };
 
 &i2c1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
 	status = "okay";
 
 	rtc@51 {
@@ -68,7 +70,42 @@
 	};
 };
 
+&iomuxc {
+	imx27-phycard-s-rdk {
+		pinctrl_i2c1: i2c1grp {
+			fsl,pins = <MX27_I2C2_PINGRP1>;
+		};
+
+		pinctrl_owire1: owire1grp {
+			fsl,pins = <MX27_OWIRE1_PINGRP1>;
+		};
+
+		pinctrl_uart1: uart1grp {
+			fsl,pins = <
+				MX27_UART1_PINGRP1
+				MX27_UART1_RTSCTS_PINGRP1
+			>;
+		};
+
+		pinctrl_uart2: uart2grp {
+			fsl,pins = <
+				MX27_UART2_PINGRP1
+				MX27_UART2_RTSCTS_PINGRP1
+			>;
+		};
+
+		pinctrl_uart3: uart3grp {
+			fsl,pins = <
+				MX27_UART3_PINGRP1
+				MX27_UART3_RTSCTS_PINGRP1
+			>;
+		};
+	};
+};
+
 &owire {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_owire1>;
 	status = "okay";
 };
 
@@ -79,15 +116,21 @@
 
 &uart1 {
 	fsl,uart-has-rtscts;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
 	status = "okay";
 };
 
 &uart2 {
 	fsl,uart-has-rtscts;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
 	status = "okay";
 };
 
 &uart3 {
 	fsl,uart-has-rtscts;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3>;
 	status = "okay";
 };
diff --git a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
index c8d57d1..62e7fcb 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycard-s-som.dts
@@ -29,11 +29,27 @@
 	status = "okay";
 };
 
+&iomuxc {
+	imx27-phycard-s-som {
+		pinctrl_fec1: fec1grp {
+			fsl,pins = <MX27_FEC1_PINGRP1>;
+		};
+
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <MX27_I2C2_PINGRP1>;
+		};
+	};
+};
+
 &fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_fec1>;
 	status = "okay";
 };
 
 &i2c2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
 	status = "okay";
 
 	at24@52 {
-- 
1.8.4.2

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[PATCH v8 3/4] ARM: dts: imx27 phycore move uart1 to rdk

[Markus Pargmann]

uart1 is not used on SOM. It is passed directly to the rdk board.

Signed-off-by: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
---
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 1 +
 arch/arm/boot/dts/imx27-phytec-phycore-som.dts | 4 ----
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index 0fc6551..ad76d88 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -29,6 +29,7 @@
 
 &uart1 {
 	fsl,uart-has-rtscts;
+	status = "okay";
 };
 
 &uart2 {
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
index 4ec402c..648541a 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
@@ -165,10 +165,6 @@
 	status = "okay";
 };
 
-&uart1 {
-	status = "okay";
-};
-
 &weim {
 	status = "okay";
 
-- 
1.8.4.2

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[PATCH v8 4/4] ARM: dts: imx27 phycore pinctrl

[Markus Pargmann]

Add pinctrl nodes and properties for phycore device nodes.

Signed-off-by: Markus Pargmann <mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
---
 arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts | 22 ++++++++++++++++++++++
 arch/arm/boot/dts/imx27-phytec-phycore-som.dts | 16 ++++++++++++++++
 2 files changed, 38 insertions(+)

diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index ad76d88..e792469 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -19,6 +19,24 @@
 	cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
 };
 
+&iomuxc {
+	imx27_phycore_rdk {
+		pinctrl_uart1: uart1grp {
+			fsl,pins = <
+				MX27_UART1_PINGRP1
+				MX27_UART1_RTSCTS_PINGRP1
+			>;
+		};
+
+		pinctrl_uart2: uart2grp {
+			fsl,pins = <
+				MX27_UART2_PINGRP1
+				MX27_UART2_RTSCTS_PINGRP1
+			>;
+		};
+	};
+};
+
 &sdhci2 {
 	bus-width = <4>;
 	cd-gpios = <&gpio3 29 0>;
@@ -29,11 +47,15 @@
 
 &uart1 {
 	fsl,uart-has-rtscts;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1>;
 	status = "okay";
 };
 
 &uart2 {
 	fsl,uart-has-rtscts;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2>;
 	status = "okay";
 };
 
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
index 648541a..56960c7 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-som.dts
@@ -135,11 +135,15 @@
 
 &fec {
 	phy-reset-gpios = <&gpio3 30 0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_fec1>;
 	status = "okay";
 };
 
 &i2c2 {
 	clock-frequency = <400000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
 	status = "okay";
 
 	at24@52 {
@@ -159,6 +163,18 @@
 	};
 };
 
+&iomuxc {
+	imx27_phycard_s_som {
+		pinctrl_fec1: fec1grp {
+			fsl,pins = <MX27_FEC1_PINGRP1>;
+		};
+
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <MX27_I2C2_PINGRP1>;
+		};
+	};
+};
+
 &nfc {
 	nand-bus-width = <8>;
 	nand-ecc-mode = "hw";
-- 
1.8.4.2

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Re: [PATCH v8 0/4] pinctrl: imx27: imx27 pincontrol driver

[Shawn Guo]

On Wed, Nov 20, 2013 at 09:45:47AM +0100, Markus Pargmann wrote:
> Hi,
> 
> This version has some commit message updates. It still depends on the pinctrl driver patch [1].

Linus,

I'm about to apply the series.  Is it okay for me to pull in your
'devel' branch at commit 5fab718 (pinctrl: imx1-core populate
subdevices) now?  Or should I at least wait a few days for you to
rebase your branch on 3.13-rc1 after it becomes available?

Actually, you can still rebase your branch before I send my branches to
arm-soc folks around -rc6.  But you need to let me know, so that I can
rebuild my branches.

Shawn

> [1] [PATCH] pinctrl: imx1-core populate subdevices
>     <1384193987-20740-1-git-send-email-mpa-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>     http://thread.gmane.org/gmane.linux.drivers.devicetree/51584

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Re: [PATCH v8 0/4] pinctrl: imx27: imx27 pincontrol driver

[Linus Walleij]

On Wed, Nov 20, 2013 at 1:40 PM, Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:

> I'm about to apply the series.  Is it okay for me to pull in your
> 'devel' branch at commit 5fab718 (pinctrl: imx1-core populate
> subdevices) now?  Or should I at least wait a few days for you to
> rebase your branch on 3.13-rc1 after it becomes available?

I have today rebased it on v3.13-rc1 so now it has a stable
base and you can pull it in. I will not rebase it from this
point.

Yours,
Linus Walleij
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Re: [PATCH v8 0/4] pinctrl: imx27: imx27 pincontrol driver

[Shawn Guo]

On Mon, Nov 25, 2013 at 03:25:59PM +0100, Linus Walleij wrote:
> On Wed, Nov 20, 2013 at 1:40 PM, Shawn Guo <shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> wrote:
> 
> > I'm about to apply the series.  Is it okay for me to pull in your
> > 'devel' branch at commit 5fab718 (pinctrl: imx1-core populate
> > subdevices) now?  Or should I at least wait a few days for you to
> > rebase your branch on 3.13-rc1 after it becomes available?
> 
> I have today rebased it on v3.13-rc1 so now it has a stable
> base and you can pull it in. I will not rebase it from this
> point.

Done.  Thanks, Linus.

Shawn

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Re: [PATCH v8 0/4] pinctrl: imx27: imx27 pincontrol driver

[Shawn Guo]

On Wed, Nov 20, 2013 at 09:45:47AM +0100, Markus Pargmann wrote:
> Markus Pargmann (4):
>   ARM: dts: imx27 iomux device node
>   ARM: dts: imx27 phyCARD-S pinctrl
>   ARM: dts: imx27 phycore move uart1 to rdk
>   ARM: dts: imx27 phycore pinctrl

All applied, thanks.

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