[PATCH v4 00/17] Add power management support for mxs phy

[PATCH v4 00/17] Add power management support for mxs phy

[Peter Chen]

Hi Felipe & Shawn,

The serial adds power management support for MXS PHY, it includes:

- Add three common PHY APIs, .set_wakeup, .notify_suspend, notify_resume.
- Related above API implementation at mxs phy driver
- misc changes and bug fixes for mxs phy to support low power mode and wakeup.

It is based on Greg's usb-next, 3.13-rc1.

Changes for v4:
- Using MXS_PHY_HAS_ANATOP to indicate which platform has anatop module
- Using mxs_phy_data to instead of mxs_phy_platform_flag
- Create is_xxx_phy() MACRO
- Add imx6sl support, and pass the test [5/17]
- Add one additional binding doc for compatible string [1/17]
- Introduce controller id to access un-regulator register region
[14/17] [15/17]
- Add waiting stable time before phy clock switches to AHB clock
(from 32K) [13/17]
- Fix one problem that only using the 1st controller register
at mxs_phy_disconnect_line [16/17]
- Fix one problem for low speed connection at very rare cases [17/17]
- Some typos


Changes for v3:
- Using flag bit to indicate SoC features/bugs, so we can remove
platform_device_id.
- Remove 3 unnecessary dts/doc patches due to above change
- Several comment change

Changes for v2:

- Add missing patches which introduce platform judgement code [1/14,2/14]
- re-order the patch sequence, like doc->dts->source file,
the reviewers can know the meaning of dt properties before review source
- Add description of two IC problems exsiting at mxs PHY; change
"high speed" to "HS" and "non-high speed" to "FS/LS" [5/14]
- Change the dt property disconnect-line-without-vbus
that the separator should be "-" not the "_", meanwhile, related source
code has changed.
- Using one local variable to get the function return val to avoid long
condition statement. [13/14]

Peter Chen (17):
  usb: doc: phy-mxs: Add more compatible strings
  usb: phy-mxs: Add platform judgement code
  usb: phy-mxs: Add auto clock and power setting
  usb: doc: phy-mxs: update binding for adding anatop phandle
  ARM: dts: imx6: add anatop phandle for usbphy
  usb: phy-mxs: Add anatop regmap
  usb: phy: add notify suspend and resume callback
  usb: phy-mxs: Add implementation of nofity_suspend and notify_resume
  usb: phy-mxs: Enable IC fixes for related SoCs
  usb: phy: Add set_wakeup API
  usb: phy-mxs: Add implementation of set_wakeup
  usb: phy-mxs: Add system suspend/resume API
  usb: phy-mxs: Add sync time after controller clear phcd
  ARM: dts: imx: add mxs phy controller id
  usb: phy-mxs: add controller id
  usb: phy-mxs: fix the problem by only using 1st controller's register
  usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection

 Documentation/devicetree/bindings/usb/mxs-phy.txt |    5 +-
 arch/arm/boot/dts/imx23.dtsi                      |    1 +
 arch/arm/boot/dts/imx28.dtsi                      |    2 +
 arch/arm/boot/dts/imx6qdl.dtsi                    |    4 +
 arch/arm/boot/dts/imx6sl.dtsi                     |    4 +
 drivers/usb/phy/phy-mxs-usb.c                     |  398 ++++++++++++++++++++-
 include/linux/usb/phy.h                           |   39 ++
 7 files changed, 437 insertions(+), 16 deletions(-)

-- 
1.7.8


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[PATCH v4 01/17] usb: doc: phy-mxs: Add more compatible strings

[Peter Chen]

Add "fsl,imx6q-usbphy" for imx6dq and imx6dl, add
"fsl,imx6sl-usbphy" for imx6sl.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 Documentation/devicetree/bindings/usb/mxs-phy.txt |    3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/mxs-phy.txt b/Documentation/devicetree/bindings/usb/mxs-phy.txt
index 5835b27..d850e55 100644
--- a/Documentation/devicetree/bindings/usb/mxs-phy.txt
+++ b/Documentation/devicetree/bindings/usb/mxs-phy.txt
@@ -1,7 +1,8 @@
 * Freescale MXS USB Phy Device
 
 Required properties:
-- compatible: Should be "fsl,imx23-usbphy"
+- compatible: "fsl,imx23-usbphy" for imx23 and imx28, "fsl,imx6q-usbphy"
+for imx6dq and imx6dl, "fsl,imx6sl-usbphy" for imx6sl
 - reg: Should contain registers location and length
 - interrupts: Should contain phy interrupt
 
-- 
1.7.8


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[PATCH v4 02/17] usb: phy-mxs: Add platform judgement code

[Peter Chen]

The mxs-phy has several bugs and features at different
versions, the driver code can get it through of_device_id.data.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/usb/phy/phy-mxs-usb.c |   58 ++++++++++++++++++++++++++++++++++------
 1 files changed, 49 insertions(+), 9 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 545844b..f6cbc78 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2012-2013 Freescale Semiconductor, Inc.
  * Copyright (C) 2012 Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
  * on behalf of DENX Software Engineering GmbH
  *
@@ -20,6 +20,7 @@
 #include <linux/delay.h>
 #include <linux/err.h>
 #include <linux/io.h>
+#include <linux/of_device.h>
 
 #define DRIVER_NAME "mxs_phy"
 
@@ -34,13 +35,55 @@
 #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
 #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
 
+#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
+
+/* Do disconnection between PHY and controller without vbus */
+#define MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS	BIT(0)
+
+/*
+ * The PHY will be in messy if there is an wakeup after putting
+ * bus to suspend (set portsc.suspendM) but before setting PHY to low
+ * power mode (set portsc.phcd).
+ */
+#define MXS_PHY_ABNORAML_IN_SUSPEND		BIT(1)
+
+/*
+ * The SOF sends too fast after resuming, it will cause disconnection
+ * between host and high speed device.
+ */
+#define MXS_PHY_SENDING_SOF_TOO_FAST		BIT(2)
+
+struct mxs_phy_data {
+	unsigned int flags;
+};
+
+static const struct mxs_phy_data imx23_phy_data = {
+	.flags = MXS_PHY_ABNORAML_IN_SUSPEND | MXS_PHY_SENDING_SOF_TOO_FAST,
+};
+
+static const struct mxs_phy_data imx6q_phy_data = {
+	.flags = MXS_PHY_SENDING_SOF_TOO_FAST |
+		MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
+};
+
+static const struct mxs_phy_data imx6sl_phy_data = {
+	.flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
+};
+
+static const struct of_device_id mxs_phy_dt_ids[] = {
+	{ .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, },
+	{ .compatible = "fsl,imx6q-usbphy", .data = &imx6q_phy_data, },
+	{ .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);
+
 struct mxs_phy {
 	struct usb_phy phy;
 	struct clk *clk;
+	const struct mxs_phy_data *data;
 };
 
-#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
-
 static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
 {
 	int ret;
@@ -131,6 +174,8 @@ static int mxs_phy_probe(struct platform_device *pdev)
 	struct clk *clk;
 	struct mxs_phy *mxs_phy;
 	int ret;
+	const struct of_device_id *of_id =
+			of_match_device(mxs_phy_dt_ids, &pdev->dev);
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	base = devm_ioremap_resource(&pdev->dev, res);
@@ -163,6 +208,7 @@ static int mxs_phy_probe(struct platform_device *pdev)
 	ATOMIC_INIT_NOTIFIER_HEAD(&mxs_phy->phy.notifier);
 
 	mxs_phy->clk = clk;
+	mxs_phy->data = of_id->data;
 
 	platform_set_drvdata(pdev, mxs_phy);
 
@@ -182,12 +228,6 @@ static int mxs_phy_remove(struct platform_device *pdev)
 	return 0;
 }
 
-static const struct of_device_id mxs_phy_dt_ids[] = {
-	{ .compatible = "fsl,imx23-usbphy", },
-	{ /* sentinel */ }
-};
-MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);

Re: [PATCH v4 02/17] usb: phy-mxs: Add platform judgement code

[Marc Kleine-Budde]

[-- Attachment #1: Type: text/plain, Size: 1921 bytes --]

On 12/03/2013 08:36 AM, Peter Chen wrote:
> The mxs-phy has several bugs and features at different
> versions, the driver code can get it through of_device_id.data.
> 
> Signed-off-by: Peter Chen <peter.chen@freescale.com>
> ---
>  drivers/usb/phy/phy-mxs-usb.c |   58 ++++++++++++++++++++++++++++++++++------
>  1 files changed, 49 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> index 545844b..f6cbc78 100644
> --- a/drivers/usb/phy/phy-mxs-usb.c
> +++ b/drivers/usb/phy/phy-mxs-usb.c
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2012-2013 Freescale Semiconductor, Inc.
>   * Copyright (C) 2012 Marek Vasut <marex@denx.de>
>   * on behalf of DENX Software Engineering GmbH
>   *
> @@ -20,6 +20,7 @@
>  #include <linux/delay.h>
>  #include <linux/err.h>
>  #include <linux/io.h>
> +#include <linux/of_device.h>
>  
>  #define DRIVER_NAME "mxs_phy"
>  
> @@ -34,13 +35,55 @@
>  #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
>  #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
>  
> +#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
> +
> +/* Do disconnection between PHY and controller without vbus */
> +#define MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS	BIT(0)
> +
> +/*
> + * The PHY will be in messy if there is an wakeup after putting
                                           ^^
                                           a
Do you mean "messy state"?

> + * bus to suspend (set portsc.suspendM) but before setting PHY to low
> + * power mode (set portsc.phcd).
> + */

Marc

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Re: [PATCH v4 02/17] usb: phy-mxs: Add platform judgement code

[Peter Chen]

On Tue, Dec 03, 2013 at 09:38:20AM +0100, Marc Kleine-Budde wrote:
> On 12/03/2013 08:36 AM, Peter Chen wrote:
> > The mxs-phy has several bugs and features at different
> > versions, the driver code can get it through of_device_id.data.
> > 
> > Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> > ---
> >  drivers/usb/phy/phy-mxs-usb.c |   58 ++++++++++++++++++++++++++++++++++------
> >  1 files changed, 49 insertions(+), 9 deletions(-)
> > 
> > diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> > index 545844b..f6cbc78 100644
> > --- a/drivers/usb/phy/phy-mxs-usb.c
> > +++ b/drivers/usb/phy/phy-mxs-usb.c
> > @@ -1,5 +1,5 @@
> >  /*
> > - * Copyright 2012 Freescale Semiconductor, Inc.
> > + * Copyright 2012-2013 Freescale Semiconductor, Inc.
> >   * Copyright (C) 2012 Marek Vasut <marex-ynQEQJNshbs@public.gmane.org>
> >   * on behalf of DENX Software Engineering GmbH
> >   *
> > @@ -20,6 +20,7 @@
> >  #include <linux/delay.h>
> >  #include <linux/err.h>
> >  #include <linux/io.h>
> > +#include <linux/of_device.h>
> >  
> >  #define DRIVER_NAME "mxs_phy"
> >  
> > @@ -34,13 +35,55 @@
> >  #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
> >  #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
> >  
> > +#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
> > +
> > +/* Do disconnection between PHY and controller without vbus */
> > +#define MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS	BIT(0)
> > +
> > +/*
> > + * The PHY will be in messy if there is an wakeup after putting
>                                            ^^
>                                            a
> Do you mean "messy state"?

Yes, will change the typo.


-- 

Best Regards,
Peter Chen

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Re: [PATCH v4 02/17] usb: phy-mxs: Add platform judgement code

[Michael Grzeschik]

On Tue, Dec 03, 2013 at 03:36:56PM +0800, Peter Chen wrote:
> The mxs-phy has several bugs and features at different
> versions, the driver code can get it through of_device_id.data.
> 
> Signed-off-by: Peter Chen <peter.chen@freescale.com>
> ---
>  drivers/usb/phy/phy-mxs-usb.c |   58 ++++++++++++++++++++++++++++++++++------
>  1 files changed, 49 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> index 545844b..f6cbc78 100644
> --- a/drivers/usb/phy/phy-mxs-usb.c
> +++ b/drivers/usb/phy/phy-mxs-usb.c
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright 2012 Freescale Semiconductor, Inc.
> + * Copyright 2012-2013 Freescale Semiconductor, Inc.
>   * Copyright (C) 2012 Marek Vasut <marex@denx.de>
>   * on behalf of DENX Software Engineering GmbH
>   *
> @@ -20,6 +20,7 @@
>  #include <linux/delay.h>
>  #include <linux/err.h>
>  #include <linux/io.h>
> +#include <linux/of_device.h>
>  
>  #define DRIVER_NAME "mxs_phy"
>  
> @@ -34,13 +35,55 @@
>  #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
>  #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
>  
> +#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
> +
> +/* Do disconnection between PHY and controller without vbus */
> +#define MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS	BIT(0)
> +
> +/*
> + * The PHY will be in messy if there is an wakeup after putting
> + * bus to suspend (set portsc.suspendM) but before setting PHY to low
> + * power mode (set portsc.phcd).
> + */
> +#define MXS_PHY_ABNORAML_IN_SUSPEND		BIT(1)

ABNORAML? -> ABNORMAL

> +
> +/*
> + * The SOF sends too fast after resuming, it will cause disconnection
> + * between host and high speed device.
> + */
> +#define MXS_PHY_SENDING_SOF_TOO_FAST		BIT(2)
> +
> +struct mxs_phy_data {
> +	unsigned int flags;
> +};
> +
> +static const struct mxs_phy_data imx23_phy_data = {
> +	.flags = MXS_PHY_ABNORAML_IN_SUSPEND | MXS_PHY_SENDING_SOF_TOO_FAST,
> +};

ABNORAML? -> ABNORMAL

> +
> +static const struct mxs_phy_data imx6q_phy_data = {
> +	.flags = MXS_PHY_SENDING_SOF_TOO_FAST |
> +		MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
> +};
> +
> +static const struct mxs_phy_data imx6sl_phy_data = {
> +	.flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
> +};
> +
> +static const struct of_device_id mxs_phy_dt_ids[] = {
> +	{ .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, },
> +	{ .compatible = "fsl,imx6q-usbphy", .data = &imx6q_phy_data, },
> +	{ .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, },
> +	{ /* sentinel */ }
> +};
> +MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);
> +
>  struct mxs_phy {
>  	struct usb_phy phy;
>  	struct clk *clk;
> +	const struct mxs_phy_data *data;
>  };
>  
> -#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
> -
>  static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
>  {
>  	int ret;
> @@ -131,6 +174,8 @@ static int mxs_phy_probe(struct platform_device *pdev)
>  	struct clk *clk;
>  	struct mxs_phy *mxs_phy;
>  	int ret;
> +	const struct of_device_id *of_id =
> +			of_match_device(mxs_phy_dt_ids, &pdev->dev);
>  
>  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>  	base = devm_ioremap_resource(&pdev->dev, res);
> @@ -163,6 +208,7 @@ static int mxs_phy_probe(struct platform_device *pdev)
>  	ATOMIC_INIT_NOTIFIER_HEAD(&mxs_phy->phy.notifier);
>  
>  	mxs_phy->clk = clk;
> +	mxs_phy->data = of_id->data;
>  
>  	platform_set_drvdata(pdev, mxs_phy);
>  
> @@ -182,12 +228,6 @@ static int mxs_phy_remove(struct platform_device *pdev)
>  	return 0;
>  }
>  
> -static const struct of_device_id mxs_phy_dt_ids[] = {
> -	{ .compatible = "fsl,imx23-usbphy", },
> -	{ /* sentinel */ }
> -};
> -MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);
> -
>  static struct platform_driver mxs_phy_driver = {
>  	.probe = mxs_phy_probe,
>  	.remove = mxs_phy_remove,
> -- 
> 1.7.8
> 
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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RE: [PATCH v4 02/17] usb: phy-mxs: Add platform judgement code

[Peter Chen]

 
> > +
> > +static const struct mxs_phy_data imx23_phy_data = {
> > +	.flags = MXS_PHY_ABNORAML_IN_SUSPEND | MXS_PHY_SENDING_SOF_TOO_FAST,
> > +};
> 
> ABNORAML? -> ABNORMAL
> 

My careless, will change. Thanks.

Peter 

> > +
> > +static const struct mxs_phy_data imx6q_phy_data = {
> > +	.flags = MXS_PHY_SENDING_SOF_TOO_FAST |
> > +		MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
> > +};
> > +
> > +static const struct mxs_phy_data imx6sl_phy_data = {
> > +	.flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
> > +};
> > +
> > +static const struct of_device_id mxs_phy_dt_ids[] = {
> > +	{ .compatible = "fsl,imx6sl-usbphy", .data = &imx6sl_phy_data, },
> > +	{ .compatible = "fsl,imx6q-usbphy", .data = &imx6q_phy_data, },
> > +	{ .compatible = "fsl,imx23-usbphy", .data = &imx23_phy_data, },
> > +	{ /* sentinel */ }
> > +};
> > +MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);
> > +
> >  struct mxs_phy {
> >  	struct usb_phy phy;
> >  	struct clk *clk;
> > +	const struct mxs_phy_data *data;
> >  };
> >
> > -#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
> > -
> >  static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
> >  {
> >  	int ret;
> > @@ -131,6 +174,8 @@ static int mxs_phy_probe(struct platform_device
> *pdev)
> >  	struct clk *clk;
> >  	struct mxs_phy *mxs_phy;
> >  	int ret;
> > +	const struct of_device_id *of_id =
> > +			of_match_device(mxs_phy_dt_ids, &pdev->dev);
> >
> >  	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> >  	base = devm_ioremap_resource(&pdev->dev, res);
> > @@ -163,6 +208,7 @@ static int mxs_phy_probe(struct platform_device
> *pdev)
> >  	ATOMIC_INIT_NOTIFIER_HEAD(&mxs_phy->phy.notifier);
> >
> >  	mxs_phy->clk = clk;
> > +	mxs_phy->data = of_id->data;
> >
> >  	platform_set_drvdata(pdev, mxs_phy);
> >
> > @@ -182,12 +228,6 @@ static int mxs_phy_remove(struct platform_device
> *pdev)
> >  	return 0;
> >  }
> >
> > -static const struct of_device_id mxs_phy_dt_ids[] = {
> > -	{ .compatible = "fsl,imx23-usbphy", },
> > -	{ /* sentinel */ }
> > -};
> > -MODULE_DEVICE_TABLE(of, mxs_phy_dt_ids);
> > -
> >  static struct platform_driver mxs_phy_driver = {
> >  	.probe = mxs_phy_probe,
> >  	.remove = mxs_phy_remove,
> > --
> > 1.7.8
> >
> >
> >
> 
> --
> Pengutronix e.K.                           |
> |
> Industrial Linux Solutions                 | http://www.pengutronix.de/
> |
> Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0
> |
> Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555
> |


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[PATCH v4 03/17] usb: phy-mxs: Add auto clock and power setting

[Peter Chen]

With the auto setting, the PHY's clock and power can be
recovered correctly from low power mode, it is ganranteed by IC logic.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/usb/phy/phy-mxs-usb.c |   20 +++++++++++++++++---
 1 files changed, 17 insertions(+), 3 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index f6cbc78..70b084d 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -31,6 +31,11 @@
 
 #define BM_USBPHY_CTRL_SFTRST			BIT(31)
 #define BM_USBPHY_CTRL_CLKGATE			BIT(30)
+#define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS	BIT(26)
+#define BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE	BIT(25)
+#define BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD	BIT(20)
+#define BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE	BIT(19)
+#define BM_USBPHY_CTRL_ENAUTO_PWRON_PLL		BIT(18)
 #define BM_USBPHY_CTRL_ENUTMILEVEL3		BIT(15)
 #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
 #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
@@ -96,9 +101,18 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
 	/* Power up the PHY */
 	writel(0, base + HW_USBPHY_PWD);
 
-	/* enable FS/LS device */
-	writel(BM_USBPHY_CTRL_ENUTMILEVEL2 |
-	       BM_USBPHY_CTRL_ENUTMILEVEL3,
+	/*
+	 * USB PHY Ctrl Setting
+	 * - Auto clock/power on
+	 * - Enable full/low speed support
+	 */
+	writel(BM_USBPHY_CTRL_ENAUTOSET_USBCLKS |
+		BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE |
+		BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD |
+		BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE |
+		BM_USBPHY_CTRL_ENAUTO_PWRON_PLL |
+		BM_USBPHY_CTRL_ENUTMILEVEL2 |
+		BM_USBPHY_CTRL_ENUTMILEVEL3,
 	       base + HW_USBPHY_CTRL_SET);
 
 	return 0;
-- 
1.7.8


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[PATCH v4 04/17] usb: doc: phy-mxs: update binding for adding anatop phandle

[Peter Chen]

Add anatop phandle which is used to access anatop registers to
control PHY's power and other USB operations.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 Documentation/devicetree/bindings/usb/mxs-phy.txt |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/usb/mxs-phy.txt b/Documentation/devicetree/bindings/usb/mxs-phy.txt
index d850e55..059536c 100644
--- a/Documentation/devicetree/bindings/usb/mxs-phy.txt
+++ b/Documentation/devicetree/bindings/usb/mxs-phy.txt
@@ -5,10 +5,12 @@ Required properties:
 for imx6dq and imx6dl, "fsl,imx6sl-usbphy" for imx6sl
 - reg: Should contain registers location and length
 - interrupts: Should contain phy interrupt
+- fsl,anatop: phandle for anatop register, it is only for imx6 SoC series
 
 Example:
 usbphy1: usbphy@020c9000 {
 	compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
 	reg = <0x020c9000 0x1000>;
 	interrupts = <0 44 0x04>;
+	fsl,anatop = <&anatop>;
 };
-- 
1.7.8


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[PATCH v4 05/17] ARM: dts: imx6: add anatop phandle for usbphy

[Peter Chen]

Add anatop phandle for usbphy

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 arch/arm/boot/dts/imx6qdl.dtsi |    2 ++
 arch/arm/boot/dts/imx6sl.dtsi  |    2 ++
 2 files changed, 4 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 59154dc..4e74962 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -557,6 +557,7 @@
 				reg = <0x020c9000 0x1000>;
 				interrupts = <0 44 0x04>;
 				clocks = <&clks 182>;
+				fsl,anatop = <&anatop>;
 			};
 
 			usbphy2: usbphy@020ca000 {
@@ -564,6 +565,7 @@
 				reg = <0x020ca000 0x1000>;
 				interrupts = <0 45 0x04>;
 				clocks = <&clks 183>;
+				fsl,anatop = <&anatop>;
 			};
 
 			snvs@020cc000 {
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 28558f1..30322b5 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -489,6 +489,7 @@
 				reg = <0x020c9000 0x1000>;
 				interrupts = <0 44 0x04>;
 				clocks = <&clks IMX6SL_CLK_USBPHY1>;
+				fsl,anatop = <&anatop>;
 			};
 
 			usbphy2: usbphy@020ca000 {
@@ -496,6 +497,7 @@
 				reg = <0x020ca000 0x1000>;
 				interrupts = <0 45 0x04>;
 				clocks = <&clks IMX6SL_CLK_USBPHY2>;
+				fsl,anatop = <&anatop>;
 			};
 
 			snvs@020cc000 {
-- 
1.7.8


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[PATCH v4 06/17] usb: phy-mxs: Add anatop regmap

[Peter Chen]

It is needed by imx6 SoC series, but not for imx23 and imx28.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/usb/phy/phy-mxs-usb.c |   23 +++++++++++++++++++++--
 1 files changed, 21 insertions(+), 2 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 70b084d..d34df4c 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -21,6 +21,8 @@
 #include <linux/err.h>
 #include <linux/io.h>
 #include <linux/of_device.h>
+#include <linux/regmap.h>
+#include <linux/mfd/syscon.h>
 
 #define DRIVER_NAME "mxs_phy"
 
@@ -58,6 +60,9 @@
  */
 #define MXS_PHY_SENDING_SOF_TOO_FAST		BIT(2)
 
+/* The SoCs who have anatop module */
+#define MXS_PHY_HAS_ANATOP			BIT(3)
+
 struct mxs_phy_data {
 	unsigned int flags;
 };
@@ -68,11 +73,13 @@ static const struct mxs_phy_data imx23_phy_data = {
 
 static const struct mxs_phy_data imx6q_phy_data = {
 	.flags = MXS_PHY_SENDING_SOF_TOO_FAST |
-		MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
+		MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS |
+		MXS_PHY_HAS_ANATOP,
 };
 
 static const struct mxs_phy_data imx6sl_phy_data = {
-	.flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS,
+	.flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS |
+		MXS_PHY_HAS_ANATOP,
 };
 
 static const struct of_device_id mxs_phy_dt_ids[] = {
@@ -87,6 +94,7 @@ struct mxs_phy {
 	struct usb_phy phy;
 	struct clk *clk;
 	const struct mxs_phy_data *data;
+	struct regmap *regmap_anatop;
 };
 
 static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
@@ -190,6 +198,7 @@ static int mxs_phy_probe(struct platform_device *pdev)
 	int ret;
 	const struct of_device_id *of_id =
 			of_match_device(mxs_phy_dt_ids, &pdev->dev);
+	struct device_node *np = pdev->dev.of_node;
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	base = devm_ioremap_resource(&pdev->dev, res);
@@ -226,6 +235,16 @@ static int mxs_phy_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, mxs_phy);
 
+	if (mxs_phy->data->flags & MXS_PHY_HAS_ANATOP) {
+		mxs_phy->regmap_anatop = syscon_regmap_lookup_by_phandle
+			(np, "fsl,anatop");
+		if (IS_ERR(mxs_phy->regmap_anatop)) {
+			dev_dbg(&pdev->dev,
+				"failed to find regmap for anatop\n");
+			return PTR_ERR(mxs_phy->regmap_anatop);
+		}
+	}
+
 	ret = usb_add_phy_dev(&mxs_phy->phy);
 	if (ret)
 		return ret;
-- 
1.7.8


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[PATCH v4 07/17] usb: phy: add notify suspend and resume callback

[Peter Chen]

They are used to notify PHY that the controller enters suspend
or finishes resume.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 include/linux/usb/phy.h |   23 +++++++++++++++++++++++
 1 files changed, 23 insertions(+), 0 deletions(-)

diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h
index 6c0b1c5..a747960 100644
--- a/include/linux/usb/phy.h
+++ b/include/linux/usb/phy.h
@@ -116,6 +116,11 @@ struct usb_phy {
 			enum usb_device_speed speed);
 	int	(*notify_disconnect)(struct usb_phy *x,
 			enum usb_device_speed speed);
+	int	(*notify_suspend)(struct usb_phy *x,
+			enum usb_device_speed speed);
+	int	(*notify_resume)(struct usb_phy *x,
+			enum usb_device_speed speed);
+
 };
 
 /**
@@ -282,6 +287,24 @@ usb_phy_notify_disconnect(struct usb_phy *x, enum usb_device_speed speed)
 		return 0;
 }
 
+static inline int usb_phy_notify_suspend
+	(struct usb_phy *x, enum usb_device_speed speed)
+{
+	if (x && x->notify_suspend)
+		return x->notify_suspend(x, speed);
+	else
+		return 0;
+}
+
+static inline int usb_phy_notify_resume
+	(struct usb_phy *x, enum usb_device_speed speed)
+{
+	if (x && x->notify_resume)
+		return x->notify_resume(x, speed);
+	else
+		return 0;
+}
+
 /* notifiers */
 static inline int
 usb_register_notifier(struct usb_phy *x, struct notifier_block *nb)
-- 
1.7.8


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[PATCH v4 08/17] usb: phy-mxs: Add implementation of nofity_suspend and notify_resume

[Peter Chen]

Implementation of notify_suspend and notify_resume will be different
according to mxs_phy_data->flags.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/usb/phy/phy-mxs-usb.c |   55 ++++++++++++++++++++++++++++++++++++++---
 1 files changed, 51 insertions(+), 4 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index d34df4c..8738890 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -166,8 +166,8 @@ static int mxs_phy_suspend(struct usb_phy *x, int suspend)
 static int mxs_phy_on_connect(struct usb_phy *phy,
 		enum usb_device_speed speed)
 {
-	dev_dbg(phy->dev, "%s speed device has connected\n",
-		(speed == USB_SPEED_HIGH) ? "high" : "non-high");
+	dev_dbg(phy->dev, "%s device has connected\n",
+		(speed == USB_SPEED_HIGH) ? "HS" : "FS/LS");
 
 	if (speed == USB_SPEED_HIGH)
 		writel(BM_USBPHY_CTRL_ENHOSTDISCONDETECT,
@@ -179,8 +179,8 @@ static int mxs_phy_on_connect(struct usb_phy *phy,
 static int mxs_phy_on_disconnect(struct usb_phy *phy,
 		enum usb_device_speed speed)
 {
-	dev_dbg(phy->dev, "%s speed device has disconnected\n",
-		(speed == USB_SPEED_HIGH) ? "high" : "non-high");
+	dev_dbg(phy->dev, "%s device has disconnected\n",
+		(speed == USB_SPEED_HIGH) ? "HS" : "FS/LS");
 
 	if (speed == USB_SPEED_HIGH)
 		writel(BM_USBPHY_CTRL_ENHOSTDISCONDETECT,
@@ -189,6 +189,48 @@ static int mxs_phy_on_disconnect(struct usb_phy *phy,
 	return 0;
 }
 
+static int mxs_phy_on_suspend(struct usb_phy *phy,
+		enum usb_device_speed speed)
+{
+	struct mxs_phy *mxs_phy = to_mxs_phy(phy);
+
+	dev_dbg(phy->dev, "%s device has suspended\n",
+		(speed == USB_SPEED_HIGH) ? "HS" : "FS/LS");
+
+	/* delay 4ms to wait bus entering idle */
+	usleep_range(4000, 5000);
+
+	if (mxs_phy->data->flags & MXS_PHY_ABNORAML_IN_SUSPEND) {
+		writel_relaxed(0xffffffff, phy->io_priv + HW_USBPHY_PWD);
+		writel_relaxed(0, phy->io_priv + HW_USBPHY_PWD);
+	}
+
+	if (speed == USB_SPEED_HIGH)
+		writel_relaxed(BM_USBPHY_CTRL_ENHOSTDISCONDETECT,
+				phy->io_priv + HW_USBPHY_CTRL_CLR);
+
+	return 0;
+}
+
+/*
+ * The resume signal must be finished here.
+ */
+static int mxs_phy_on_resume(struct usb_phy *phy,
+		enum usb_device_speed speed)
+{
+	dev_dbg(phy->dev, "%s device has resumed\n",
+		(speed == USB_SPEED_HIGH) ? "HS" : "FS/LS");
+
+	if (speed == USB_SPEED_HIGH) {
+		/* Make sure the device has switched to High-Speed mode */
+		udelay(500);
+		writel_relaxed(BM_USBPHY_CTRL_ENHOSTDISCONDETECT,
+				phy->io_priv + HW_USBPHY_CTRL_SET);
+	}
+
+	return 0;
+}
+
 static int mxs_phy_probe(struct platform_device *pdev)
 {
 	struct resource *res;
@@ -235,6 +277,11 @@ static int mxs_phy_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, mxs_phy);
 
+	if (mxs_phy->data->flags & MXS_PHY_SENDING_SOF_TOO_FAST) {
+		mxs_phy->phy.notify_suspend = mxs_phy_on_suspend;
+		mxs_phy->phy.notify_resume = mxs_phy_on_resume;
+	}
+
 	if (mxs_phy->data->flags & MXS_PHY_HAS_ANATOP) {
 		mxs_phy->regmap_anatop = syscon_regmap_lookup_by_phandle
 			(np, "fsl,anatop");
-- 
1.7.8


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[PATCH v4 09/17] usb: phy-mxs: Enable IC fixes for related SoCs

[Peter Chen]

Some PHY bugs are fixed by IC logic, but these bits are not
enabled by default, so we enable them at driver.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/usb/phy/phy-mxs-usb.c |   20 ++++++++++++++++++++
 1 files changed, 20 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 8738890..0908d74 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -31,6 +31,10 @@
 #define HW_USBPHY_CTRL_SET			0x34
 #define HW_USBPHY_CTRL_CLR			0x38
 
+#define HW_USBPHY_IP				0x90
+#define HW_USBPHY_IP_SET			0x94
+#define HW_USBPHY_IP_CLR			0x98
+
 #define BM_USBPHY_CTRL_SFTRST			BIT(31)
 #define BM_USBPHY_CTRL_CLKGATE			BIT(30)
 #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS	BIT(26)
@@ -42,6 +46,8 @@
 #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
 #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
 
+#define BM_USBPHY_IP_FIX                       (BIT(17) | BIT(18))
+
 #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
 
 /* Do disconnection between PHY and controller without vbus */
@@ -97,6 +103,16 @@ struct mxs_phy {
 	struct regmap *regmap_anatop;
 };
 
+static inline bool is_imx6q_phy(struct mxs_phy *mxs_phy)
+{
+	return mxs_phy->data == &imx6q_phy_data;
+}
+
+static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
+{
+	return mxs_phy->data == &imx6sl_phy_data;
+}
+
 static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
 {
 	int ret;
@@ -123,6 +139,10 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
 		BM_USBPHY_CTRL_ENUTMILEVEL3,
 	       base + HW_USBPHY_CTRL_SET);
 
+	/* Enable IC solution */
+	if (is_imx6q_phy(mxs_phy) || is_imx6sl_phy(mxs_phy))
+		writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
+
 	return 0;
 }
 
-- 
1.7.8


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Re: [PATCH v4 09/17] usb: phy-mxs: Enable IC fixes for related SoCs

[Marc Kleine-Budde]

[-- Attachment #1: Type: text/plain, Size: 1906 bytes --]

On 12/03/2013 08:37 AM, Peter Chen wrote:
> Some PHY bugs are fixed by IC logic, but these bits are not
> enabled by default, so we enable them at driver.
> 
> Signed-off-by: Peter Chen <peter.chen@freescale.com>
> ---
>  drivers/usb/phy/phy-mxs-usb.c |   20 ++++++++++++++++++++
>  1 files changed, 20 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> index 8738890..0908d74 100644
> --- a/drivers/usb/phy/phy-mxs-usb.c
> +++ b/drivers/usb/phy/phy-mxs-usb.c
> @@ -31,6 +31,10 @@
>  #define HW_USBPHY_CTRL_SET			0x34
>  #define HW_USBPHY_CTRL_CLR			0x38
>  
> +#define HW_USBPHY_IP				0x90
> +#define HW_USBPHY_IP_SET			0x94
> +#define HW_USBPHY_IP_CLR			0x98
> +
>  #define BM_USBPHY_CTRL_SFTRST			BIT(31)
>  #define BM_USBPHY_CTRL_CLKGATE			BIT(30)
>  #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS	BIT(26)
> @@ -42,6 +46,8 @@
>  #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
>  #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
>  
> +#define BM_USBPHY_IP_FIX                       (BIT(17) | BIT(18))
> +
>  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
>  
>  /* Do disconnection between PHY and controller without vbus */
> @@ -97,6 +103,16 @@ struct mxs_phy {
>  	struct regmap *regmap_anatop;
>  };
>  
> +static inline bool is_imx6q_phy(struct mxs_phy *mxs_phy)
> +{
> +	return mxs_phy->data == &imx6q_phy_data;
> +}
> +
> +static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
> +{
> +	return mxs_phy->data == &imx6sl_phy_data;
> +}

Why don't you use a a BIT() here as in Patch 2/17, too?

Marc

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[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 259 bytes --]

RE: [PATCH v4 09/17] usb: phy-mxs: Enable IC fixes for related SoCs

[Peter Chen]

 
> 
> On 12/03/2013 08:37 AM, Peter Chen wrote:
> > Some PHY bugs are fixed by IC logic, but these bits are not
> > enabled by default, so we enable them at driver.
> >
> > Signed-off-by: Peter Chen <peter.chen@freescale.com>
> > ---
> >  drivers/usb/phy/phy-mxs-usb.c |   20 ++++++++++++++++++++
> >  1 files changed, 20 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-
> usb.c
> > index 8738890..0908d74 100644
> > --- a/drivers/usb/phy/phy-mxs-usb.c
> > +++ b/drivers/usb/phy/phy-mxs-usb.c
> > @@ -31,6 +31,10 @@
> >  #define HW_USBPHY_CTRL_SET			0x34
> >  #define HW_USBPHY_CTRL_CLR			0x38
> >
> > +#define HW_USBPHY_IP				0x90
> > +#define HW_USBPHY_IP_SET			0x94
> > +#define HW_USBPHY_IP_CLR			0x98
> > +
> >  #define BM_USBPHY_CTRL_SFTRST			BIT(31)
> >  #define BM_USBPHY_CTRL_CLKGATE			BIT(30)
> >  #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS	BIT(26)
> > @@ -42,6 +46,8 @@
> >  #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
> >  #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
> >
> > +#define BM_USBPHY_IP_FIX                       (BIT(17) | BIT(18))
> > +
> >  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
> >
> >  /* Do disconnection between PHY and controller without vbus */
> > @@ -97,6 +103,16 @@ struct mxs_phy {
> >  	struct regmap *regmap_anatop;
> >  };
> >
> > +static inline bool is_imx6q_phy(struct mxs_phy *mxs_phy)
> > +{
> > +	return mxs_phy->data == &imx6q_phy_data;
> > +}
> > +
> > +static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
> > +{
> > +	return mxs_phy->data == &imx6sl_phy_data;
> > +}
> 
> Why don't you use a a BIT() here as in Patch 2/17, too?
> 
 
Thanks, I will define the two PHY problems as the register bit
position at 2/17, and use those two MACROs at this patch.
Is it your point?

Peter

Re: [PATCH v4 09/17] usb: phy-mxs: Enable IC fixes for related SoCs

[Marc Kleine-Budde]

[-- Attachment #1: Type: text/plain, Size: 2817 bytes --]

On 12/03/2013 09:38 AM, Peter Chen wrote:
>  
>>
>> On 12/03/2013 08:37 AM, Peter Chen wrote:
>>> Some PHY bugs are fixed by IC logic, but these bits are not
>>> enabled by default, so we enable them at driver.
>>>
>>> Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>>> ---
>>>  drivers/usb/phy/phy-mxs-usb.c |   20 ++++++++++++++++++++
>>>  1 files changed, 20 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-
>> usb.c
>>> index 8738890..0908d74 100644
>>> --- a/drivers/usb/phy/phy-mxs-usb.c
>>> +++ b/drivers/usb/phy/phy-mxs-usb.c
>>> @@ -31,6 +31,10 @@
>>>  #define HW_USBPHY_CTRL_SET			0x34
>>>  #define HW_USBPHY_CTRL_CLR			0x38
>>>
>>> +#define HW_USBPHY_IP				0x90
>>> +#define HW_USBPHY_IP_SET			0x94
>>> +#define HW_USBPHY_IP_CLR			0x98
>>> +
>>>  #define BM_USBPHY_CTRL_SFTRST			BIT(31)
>>>  #define BM_USBPHY_CTRL_CLKGATE			BIT(30)
>>>  #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS	BIT(26)
>>> @@ -42,6 +46,8 @@
>>>  #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
>>>  #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
>>>
>>> +#define BM_USBPHY_IP_FIX                       (BIT(17) | BIT(18))
>>> +
>>>  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
>>>
>>>  /* Do disconnection between PHY and controller without vbus */
>>> @@ -97,6 +103,16 @@ struct mxs_phy {
>>>  	struct regmap *regmap_anatop;
>>>  };
>>>
>>> +static inline bool is_imx6q_phy(struct mxs_phy *mxs_phy)
>>> +{
>>> +	return mxs_phy->data == &imx6q_phy_data;
>>> +}
>>> +
>>> +static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
>>> +{
>>> +	return mxs_phy->data == &imx6sl_phy_data;
>>> +}
>>
>> Why don't you use a a BIT() here as in Patch 2/17, too?
>>
>  
> Thanks, I will define the two PHY problems as the register bit
> position at 2/17, and use those two MACROs at this patch.
> Is it your point?

I was wondering if the driver looks more uniform if you use something
like this:

#define MXS_PHY_NEED_IP_FIX		BIT(3)

>  static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
>  {
>  	int ret;
> @@ -123,6 +139,10 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
>  		BM_USBPHY_CTRL_ENUTMILEVEL3,
>  	       base + HW_USBPHY_CTRL_SET);
>  
> +	/* Enable IC solution */
> +	if (is_imx6q_phy(mxs_phy) || is_imx6sl_phy(mxs_phy))

	if (mxs_phy->data->flags & MXS_PHY_NEED_IP_FIX)

> +		writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
> +
>  	return 0;
>  }

Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
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[-- Attachment #2: OpenPGP digital signature --]
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RE: [PATCH v4 09/17] usb: phy-mxs: Enable IC fixes for related SoCs

[Peter Chen]

 
> On 12/03/2013 09:38 AM, Peter Chen wrote:
> >
> >>
> >> On 12/03/2013 08:37 AM, Peter Chen wrote:
> >>> Some PHY bugs are fixed by IC logic, but these bits are not
> >>> enabled by default, so we enable them at driver.
> >>>
> >>> Signed-off-by: Peter Chen <peter.chen@freescale.com>
> >>> ---
> >>>  drivers/usb/phy/phy-mxs-usb.c |   20 ++++++++++++++++++++
> >>>  1 files changed, 20 insertions(+), 0 deletions(-)
> >>>
> >>> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-
> >> usb.c
> >>> index 8738890..0908d74 100644
> >>> --- a/drivers/usb/phy/phy-mxs-usb.c
> >>> +++ b/drivers/usb/phy/phy-mxs-usb.c
> >>> @@ -31,6 +31,10 @@
> >>>  #define HW_USBPHY_CTRL_SET			0x34
> >>>  #define HW_USBPHY_CTRL_CLR			0x38
> >>>
> >>> +#define HW_USBPHY_IP				0x90
> >>> +#define HW_USBPHY_IP_SET			0x94
> >>> +#define HW_USBPHY_IP_CLR			0x98
> >>> +
> >>>  #define BM_USBPHY_CTRL_SFTRST			BIT(31)
> >>>  #define BM_USBPHY_CTRL_CLKGATE			BIT(30)
> >>>  #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS	BIT(26)
> >>> @@ -42,6 +46,8 @@
> >>>  #define BM_USBPHY_CTRL_ENUTMILEVEL2		BIT(14)
> >>>  #define BM_USBPHY_CTRL_ENHOSTDISCONDETECT	BIT(1)
> >>>
> >>> +#define BM_USBPHY_IP_FIX                       (BIT(17) | BIT(18))
> >>> +
> >>>  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
> >>>
> >>>  /* Do disconnection between PHY and controller without vbus */
> >>> @@ -97,6 +103,16 @@ struct mxs_phy {
> >>>  	struct regmap *regmap_anatop;
> >>>  };
> >>>
> >>> +static inline bool is_imx6q_phy(struct mxs_phy *mxs_phy)
> >>> +{
> >>> +	return mxs_phy->data == &imx6q_phy_data;
> >>> +}
> >>> +
> >>> +static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
> >>> +{
> >>> +	return mxs_phy->data == &imx6sl_phy_data;
> >>> +}
> >>
> >> Why don't you use a a BIT() here as in Patch 2/17, too?
> >>
> >
> > Thanks, I will define the two PHY problems as the register bit
> > position at 2/17, and use those two MACROs at this patch.
> > Is it your point?
> 
> I was wondering if the driver looks more uniform if you use something
> like this:
> 
> #define MXS_PHY_NEED_IP_FIX		BIT(3)
> 

OK, will change like below:

if (mxs_phy->data->flags & MXS_PHY_NEED_IP_FIX)
	writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);

Peter

[PATCH v4 11/17] usb: phy-mxs: Add implementation of set_wakeup

[Peter Chen]

When we need the PHY can be waken up by external signals,
we can call this API. Besides, we call mxs_phy_disconnect_line
at this API to close the connection between USB PHY and
controller, after that, the line state from controller is SE0.
Once the PHY is out of power, without calling mxs_phy_disconnect_line,
there are unknown wakeups due to dp/dm floating at device mode.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/usb/phy/phy-mxs-usb.c |   79 +++++++++++++++++++++++++++++++++++++++++
 1 files changed, 79 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 0908d74..84680e3 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -31,6 +31,9 @@
 #define HW_USBPHY_CTRL_SET			0x34
 #define HW_USBPHY_CTRL_CLR			0x38
 
+#define HW_USBPHY_DEBUG_SET			0x54
+#define HW_USBPHY_DEBUG_CLR			0x58
+
 #define HW_USBPHY_IP				0x90
 #define HW_USBPHY_IP_SET			0x94
 #define HW_USBPHY_IP_CLR			0x98
@@ -39,6 +42,9 @@
 #define BM_USBPHY_CTRL_CLKGATE			BIT(30)
 #define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS	BIT(26)
 #define BM_USBPHY_CTRL_ENAUTOCLR_USBCLKGATE	BIT(25)
+#define BM_USBPHY_CTRL_ENVBUSCHG_WKUP		BIT(23)
+#define BM_USBPHY_CTRL_ENIDCHG_WKUP		BIT(22)
+#define BM_USBPHY_CTRL_ENDPDMCHG_WKUP		BIT(21)
 #define BM_USBPHY_CTRL_ENAUTOCLR_PHY_PWD	BIT(20)
 #define BM_USBPHY_CTRL_ENAUTOCLR_CLKGATE	BIT(19)
 #define BM_USBPHY_CTRL_ENAUTO_PWRON_PLL		BIT(18)
@@ -48,6 +54,19 @@
 
 #define BM_USBPHY_IP_FIX                       (BIT(17) | BIT(18))
 
+#define BM_USBPHY_DEBUG_CLKGATE			BIT(30)
+
+/* Anatop Registers */
+#define ANADIG_USB1_VBUS_DET_STAT		0x1c0
+
+#define ANADIG_USB1_LOOPBACK_SET		0x1e4
+#define ANADIG_USB1_LOOPBACK_CLR		0x1e8
+
+#define BM_ANADIG_USB1_VBUS_DET_STAT_VBUS_VALID	BIT(3)
+
+#define BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1	BIT(2)
+#define BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN	BIT(5)
+
 #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
 
 /* Do disconnection between PHY and controller without vbus */
@@ -146,6 +165,48 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
 	return 0;
 }
 
+static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on)
+{
+	void __iomem *base = mxs_phy->phy.io_priv;
+	bool vbus_is_on = false;
+	static bool line_is_disconnected;
+	unsigned int vbus_value = 0;
+
+	/* If the SoCs don't need to disconnect line without vbus, quit */
+	if (!(mxs_phy->data->flags & MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS))
+		return;
+
+	/* If the SoCs don't have anatop, quit */
+	if (!mxs_phy->regmap_anatop)
+		return;
+
+	regmap_read(mxs_phy->regmap_anatop, ANADIG_USB1_VBUS_DET_STAT,
+			&vbus_value);
+	if (vbus_value & BM_ANADIG_USB1_VBUS_DET_STAT_VBUS_VALID)
+		vbus_is_on = true;
+
+	if (on && !vbus_is_on) {
+		writel_relaxed(BM_USBPHY_DEBUG_CLKGATE,
+			base + HW_USBPHY_DEBUG_CLR);
+		regmap_write(mxs_phy->regmap_anatop, ANADIG_USB1_LOOPBACK_SET,
+				BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1 |
+				BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN);
+		/* Delay some time, and let Linestate be SE0 for controller */
+		usleep_range(500, 1000);
+		line_is_disconnected = true;
+	} else if (line_is_disconnected) {
+		regmap_write(mxs_phy->regmap_anatop, ANADIG_USB1_LOOPBACK_CLR,
+				BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1 |
+				BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN);
+		writel_relaxed(BM_USBPHY_DEBUG_CLKGATE,
+				base + HW_USBPHY_DEBUG_SET);
+		line_is_disconnected = false;
+	}
+
+	dev_dbg(mxs_phy->phy.dev, "line is %s\n", line_is_disconnected
+			? "disconnected" : "connected");
+}
+
 static int mxs_phy_init(struct usb_phy *phy)
 {
 	struct mxs_phy *mxs_phy = to_mxs_phy(phy);
@@ -183,6 +244,23 @@ static int mxs_phy_suspend(struct usb_phy *x, int suspend)
 	return 0;
 }
 
+static int mxs_phy_set_wakeup(struct usb_phy *x, bool enabled)
+{
+	struct mxs_phy *mxs_phy = to_mxs_phy(x);
+	u32 value = BM_USBPHY_CTRL_ENVBUSCHG_WKUP |
+			BM_USBPHY_CTRL_ENDPDMCHG_WKUP |
+				BM_USBPHY_CTRL_ENIDCHG_WKUP;
+	if (enabled) {
+		mxs_phy_disconnect_line(mxs_phy, true);
+		writel_relaxed(value, x->io_priv + HW_USBPHY_CTRL_SET);
+	} else {
+		writel_relaxed(value, x->io_priv + HW_USBPHY_CTRL_CLR);
+		mxs_phy_disconnect_line(mxs_phy, false);
+	}
+
+	return 0;
+}
+
 static int mxs_phy_on_connect(struct usb_phy *phy,
 		enum usb_device_speed speed)
 {
@@ -289,6 +367,7 @@ static int mxs_phy_probe(struct platform_device *pdev)
 	mxs_phy->phy.notify_connect	= mxs_phy_on_connect;
 	mxs_phy->phy.notify_disconnect	= mxs_phy_on_disconnect;
 	mxs_phy->phy.type		= USB_PHY_TYPE_USB2;
+	mxs_phy->phy.set_wakeup		= mxs_phy_set_wakeup;
 
 	ATOMIC_INIT_NOTIFIER_HEAD(&mxs_phy->phy.notifier);
 
-- 
1.7.8


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[PATCH v4 14/17] ARM: dts: imx: add mxs phy controller id

[Peter Chen]

We need to use controller id to access different register regions
for mxs phy.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 arch/arm/boot/dts/imx23.dtsi   |    1 +
 arch/arm/boot/dts/imx28.dtsi   |    2 ++
 arch/arm/boot/dts/imx6qdl.dtsi |    2 ++
 arch/arm/boot/dts/imx6sl.dtsi  |    2 ++
 4 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/boot/dts/imx23.dtsi b/arch/arm/boot/dts/imx23.dtsi
index c96ceae..a231f3d 100644
--- a/arch/arm/boot/dts/imx23.dtsi
+++ b/arch/arm/boot/dts/imx23.dtsi
@@ -23,6 +23,7 @@
 		serial1 = &auart1;
 		spi0 = &ssp0;
 		spi1 = &ssp1;
+		usbphy0 = &usbphy0;
 	};
 
 	cpus {
diff --git a/arch/arm/boot/dts/imx28.dtsi b/arch/arm/boot/dts/imx28.dtsi
index cda19c8..671dda0 100644
--- a/arch/arm/boot/dts/imx28.dtsi
+++ b/arch/arm/boot/dts/imx28.dtsi
@@ -32,6 +32,8 @@
 		serial4 = &auart4;
 		spi0 = &ssp1;
 		spi1 = &ssp2;
+		usbphy0 = &usbphy0;
+		usbphy1 = &usbphy1;
 	};
 
 	cpus {
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 4e74962..c23803d 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -33,6 +33,8 @@
 		spi1 = &ecspi2;
 		spi2 = &ecspi3;
 		spi3 = &ecspi4;
+		usbphy0 = &usbphy1;
+		usbphy1 = &usbphy2;
 	};
 
 	intc: interrupt-controller@00a01000 {
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 30322b5..a06d939 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -27,6 +27,8 @@
 		spi1 = &ecspi2;
 		spi2 = &ecspi3;
 		spi3 = &ecspi4;
+		usbphy0 = &usbphy1;
+		usbphy1 = &usbphy2;
 	};
 
 	cpus {
-- 
1.7.8


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[PATCH v4 15/17] usb: phy-mxs: add controller id

[Peter Chen]

It is used to access un-regulator registers according to
different controllers.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/usb/phy/phy-mxs-usb.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 52e80d9..4c2dfcd 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -127,6 +127,7 @@ struct mxs_phy {
 	struct clk *clk;
 	const struct mxs_phy_data *data;
 	struct regmap *regmap_anatop;
+	int port_id;
 };
 
 static inline bool is_imx6q_phy(struct mxs_phy *mxs_phy)
@@ -392,6 +393,13 @@ static int mxs_phy_probe(struct platform_device *pdev)
 		return -ENOMEM;
 	}
 
+	ret = of_alias_get_id(np, "usbphy");
+	if (ret < 0) {
+		dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
+		return ret;
+	}
+	mxs_phy->port_id = ret;
+
 	mxs_phy->phy.io_priv		= base;
 	mxs_phy->phy.dev		= &pdev->dev;
 	mxs_phy->phy.label		= DRIVER_NAME;
-- 
1.7.8


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[PATCH v4 16/17] usb: phy-mxs: fix the problem by only using 1st controller's register

[Peter Chen]

We fix the problem that we only use the 1st controller's related
registers at mxs_phy_disconnect_line, but in fact, it needs to
access registers according to different PHYs.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/usb/phy/phy-mxs-usb.c |   89 +++++++++++++++++++++++++++++------------
 1 files changed, 63 insertions(+), 26 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 4c2dfcd..542b6ec 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -62,17 +62,23 @@
 #define ANADIG_ANA_MISC0_CLR			0x158
 
 #define ANADIG_USB1_VBUS_DET_STAT		0x1c0
+#define ANADIG_USB2_VBUS_DET_STAT		0x220
 
 #define ANADIG_USB1_LOOPBACK_SET		0x1e4
 #define ANADIG_USB1_LOOPBACK_CLR		0x1e8
+#define ANADIG_USB2_LOOPBACK_SET		0x244
+#define ANADIG_USB2_LOOPBACK_CLR		0x248
 
 #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG	BIT(12)
 #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG_SL BIT(11)
 
 #define BM_ANADIG_USB1_VBUS_DET_STAT_VBUS_VALID	BIT(3)
+#define BM_ANADIG_USB2_VBUS_DET_STAT_VBUS_VALID	BIT(3)
 
 #define BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1	BIT(2)
 #define BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN	BIT(5)
+#define BM_ANADIG_USB2_LOOPBACK_UTMI_DIG_TST1	BIT(2)
+#define BM_ANADIG_USB2_LOOPBACK_TSTI_TX_EN	BIT(5)
 
 #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
 
@@ -182,12 +188,61 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
 	return 0;
 }
 
-static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on)
+/* Return true if the vbus is there */
+static bool mxs_phy_get_vbus_status(struct mxs_phy *mxs_phy)
+{
+	unsigned int vbus_value;
+
+	if (mxs_phy->port_id == 0)
+		regmap_read(mxs_phy->regmap_anatop,
+			ANADIG_USB1_VBUS_DET_STAT,
+			&vbus_value);
+	else if (mxs_phy->port_id == 1)
+		regmap_read(mxs_phy->regmap_anatop,
+			ANADIG_USB2_VBUS_DET_STAT,
+			&vbus_value);
+
+	if (vbus_value & BM_ANADIG_USB1_VBUS_DET_STAT_VBUS_VALID)
+		return true;
+	else
+		return false;
+}
+
+static void __mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool disconnect)
 {
 	void __iomem *base = mxs_phy->phy.io_priv;
+	u32 reg;
+
+	if (disconnect)
+		writel_relaxed(BM_USBPHY_DEBUG_CLKGATE,
+			base + HW_USBPHY_DEBUG_CLR);
+
+	if (mxs_phy->port_id == 0) {
+		reg = disconnect ? ANADIG_USB1_LOOPBACK_SET
+			: ANADIG_USB1_LOOPBACK_CLR;
+		regmap_write(mxs_phy->regmap_anatop, reg,
+			BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1 |
+			BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN);
+	} else if (mxs_phy->port_id == 1) {
+		reg = disconnect ? ANADIG_USB2_LOOPBACK_SET
+			: ANADIG_USB2_LOOPBACK_CLR;
+		regmap_write(mxs_phy->regmap_anatop, reg,
+			BM_ANADIG_USB2_LOOPBACK_UTMI_DIG_TST1 |
+			BM_ANADIG_USB2_LOOPBACK_TSTI_TX_EN);
+	}
+
+	if (!disconnect)
+		writel_relaxed(BM_USBPHY_DEBUG_CLKGATE,
+			base + HW_USBPHY_DEBUG_SET);
+
+	/* Delay some time, and let Linestate be SE0 for controller */
+	if (disconnect)
+		usleep_range(500, 1000);
+}
+
+static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on)
+{
 	bool vbus_is_on = false;
-	static bool line_is_disconnected;
-	unsigned int vbus_value = 0;
 
 	/* If the SoCs don't need to disconnect line without vbus, quit */
 	if (!(mxs_phy->data->flags & MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS))
@@ -197,31 +252,13 @@ static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on)
 	if (!mxs_phy->regmap_anatop)
 		return;
 
-	regmap_read(mxs_phy->regmap_anatop, ANADIG_USB1_VBUS_DET_STAT,
-			&vbus_value);
-	if (vbus_value & BM_ANADIG_USB1_VBUS_DET_STAT_VBUS_VALID)
-		vbus_is_on = true;
+	vbus_is_on = mxs_phy_get_vbus_status(mxs_phy);
 
-	if (on && !vbus_is_on) {
-		writel_relaxed(BM_USBPHY_DEBUG_CLKGATE,
-			base + HW_USBPHY_DEBUG_CLR);
-		regmap_write(mxs_phy->regmap_anatop, ANADIG_USB1_LOOPBACK_SET,
-				BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1 |
-				BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN);
-		/* Delay some time, and let Linestate be SE0 for controller */
-		usleep_range(500, 1000);
-		line_is_disconnected = true;
-	} else if (line_is_disconnected) {
-		regmap_write(mxs_phy->regmap_anatop, ANADIG_USB1_LOOPBACK_CLR,
-				BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1 |
-				BM_ANADIG_USB1_LOOPBACK_TSTI_TX_EN);
-		writel_relaxed(BM_USBPHY_DEBUG_CLKGATE,
-				base + HW_USBPHY_DEBUG_SET);
-		line_is_disconnected = false;
-	}
+	if (on && !vbus_is_on)
+		__mxs_phy_disconnect_line(mxs_phy, true);
+	else
+		__mxs_phy_disconnect_line(mxs_phy, false);
 
-	dev_dbg(mxs_phy->phy.dev, "line is %s\n", line_is_disconnected
-			? "disconnected" : "connected");
 }
 
 static void mxs_phy_enable_ldo_in_suspend(struct mxs_phy *mxs_phy, bool on)
-- 
1.7.8


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Re: [PATCH v4 16/17] usb: phy-mxs: fix the problem by only using 1st controller's register

[Marc Kleine-Budde]

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On 12/03/2013 08:37 AM, Peter Chen wrote:
> We fix the problem that we only use the 1st controller's related
> registers at mxs_phy_disconnect_line, but in fact, it needs to
> access registers according to different PHYs.

Are you fixing the code that has been added in this series before? If
so, please squash into the patch. Don't add the broken code in the first
place.

Marc
-- 
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Industrial Linux Solutions        | Phone: +49-231-2826-924     |
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Re: [PATCH v4 16/17] usb: phy-mxs: fix the problem by only using 1st controller's register

[Peter Chen]

On Tue, Dec 03, 2013 at 09:34:09AM +0100, Marc Kleine-Budde wrote:
> On 12/03/2013 08:37 AM, Peter Chen wrote:
> > We fix the problem that we only use the 1st controller's related
> > registers at mxs_phy_disconnect_line, but in fact, it needs to
> > access registers according to different PHYs.
> 
> Are you fixing the code that has been added in this series before? If
> so, please squash into the patch. Don't add the broken code in the first
> place.
> 

Thanks, will do squash

-- 

Best Regards,
Peter Chen

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[PATCH v4 17/17] usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection

[Peter Chen]

At very rare cases, the SoF will not send out after resume with
low speed connection. The workaround is do not power down
PWD.RXPWD1PT1 bit during the suspend.

Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
 drivers/usb/phy/phy-mxs-usb.c |   47 ++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 46 insertions(+), 1 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 542b6ec..5ae4a57 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -69,6 +69,9 @@
 #define ANADIG_USB2_LOOPBACK_SET		0x244
 #define ANADIG_USB2_LOOPBACK_CLR		0x248
 
+#define ANADIG_USB1_MISC			0x1f0
+#define ANADIG_USB2_MISC			0x250
+
 #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG	BIT(12)
 #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG_SL BIT(11)
 
@@ -80,6 +83,11 @@
 #define BM_ANADIG_USB2_LOOPBACK_UTMI_DIG_TST1	BIT(2)
 #define BM_ANADIG_USB2_LOOPBACK_TSTI_TX_EN	BIT(5)
 
+#define BM_ANADIG_USB1_MISC_RX_VPIN_FS		BIT(29)
+#define BM_ANADIG_USB1_MISC_RX_VMIN_FS		BIT(28)
+#define BM_ANADIG_USB2_MISC_RX_VPIN_FS		BIT(29)
+#define BM_ANADIG_USB2_MISC_RX_VMIN_FS		BIT(28)
+
 #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
 
 /* Do disconnection between PHY and controller without vbus */
@@ -296,12 +304,49 @@ static void mxs_phy_shutdown(struct usb_phy *phy)
 	clk_disable_unprepare(mxs_phy->clk);
 }
 
+static bool mxs_phy_is_low_speed_connection(struct mxs_phy *mxs_phy)
+{
+	unsigned int line_state;
+	/* bit definition is the same for all controllers */
+	unsigned int dp_bit = BM_ANADIG_USB1_MISC_RX_VPIN_FS,
+		     dm_bit = BM_ANADIG_USB1_MISC_RX_VMIN_FS;
+	unsigned int reg = ANADIG_USB1_MISC;
+
+	/* If the SoCs don't have anatop, quit */
+	if (!mxs_phy->regmap_anatop)
+		return false;
+
+	if (mxs_phy->port_id == 0)
+		reg = ANADIG_USB1_MISC;
+	else if (mxs_phy->port_id == 1)
+		reg = ANADIG_USB2_MISC;
+
+	regmap_read(mxs_phy->regmap_anatop, reg, &line_state);
+
+	if ((line_state & (dp_bit | dm_bit)) ==  dm_bit)
+		return true;
+	else
+		return false;
+}
+
 static int mxs_phy_suspend(struct usb_phy *x, int suspend)
 {
 	struct mxs_phy *mxs_phy = to_mxs_phy(x);
+	bool low_speed_connection, vbus_is_on;
+
+	low_speed_connection = mxs_phy_is_low_speed_connection(mxs_phy);
+	vbus_is_on = mxs_phy_get_vbus_status(mxs_phy);
 
 	if (suspend) {
-		writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
+		/*
+		 * FIXME: Do not power down RXPWD1PT1 bit for low speed
+		 * connect. The low speed connection will have problem at
+		 * very rare cases during usb suspend and resume process.
+		 */
+		if (low_speed_connection & vbus_is_on)
+			writel(0xfffbffff, x->io_priv + HW_USBPHY_PWD);
+		else
+			writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
 		writel(BM_USBPHY_CTRL_CLKGATE,
 		       x->io_priv + HW_USBPHY_CTRL_SET);
 		clk_disable_unprepare(mxs_phy->clk);
-- 
1.7.8


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Re: [PATCH v4 17/17] usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection

[Marc Kleine-Budde]

[-- Attachment #1: Type: text/plain, Size: 3565 bytes --]

On 12/03/2013 08:37 AM, Peter Chen wrote:
> At very rare cases, the SoF will not send out after resume with
> low speed connection. The workaround is do not power down
> PWD.RXPWD1PT1 bit during the suspend.

Is this also a fix for newly added code? If so please also squash.

> Signed-off-by: Peter Chen <peter.chen-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
>  drivers/usb/phy/phy-mxs-usb.c |   47 ++++++++++++++++++++++++++++++++++++++++-
>  1 files changed, 46 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
> index 542b6ec..5ae4a57 100644
> --- a/drivers/usb/phy/phy-mxs-usb.c
> +++ b/drivers/usb/phy/phy-mxs-usb.c
> @@ -69,6 +69,9 @@
>  #define ANADIG_USB2_LOOPBACK_SET		0x244
>  #define ANADIG_USB2_LOOPBACK_CLR		0x248
>  
> +#define ANADIG_USB1_MISC			0x1f0
> +#define ANADIG_USB2_MISC			0x250
> +
>  #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG	BIT(12)
>  #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG_SL BIT(11)
>  
> @@ -80,6 +83,11 @@
>  #define BM_ANADIG_USB2_LOOPBACK_UTMI_DIG_TST1	BIT(2)
>  #define BM_ANADIG_USB2_LOOPBACK_TSTI_TX_EN	BIT(5)
>  
> +#define BM_ANADIG_USB1_MISC_RX_VPIN_FS		BIT(29)
> +#define BM_ANADIG_USB1_MISC_RX_VMIN_FS		BIT(28)
> +#define BM_ANADIG_USB2_MISC_RX_VPIN_FS		BIT(29)
> +#define BM_ANADIG_USB2_MISC_RX_VMIN_FS		BIT(28)
> +
>  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
>  
>  /* Do disconnection between PHY and controller without vbus */
> @@ -296,12 +304,49 @@ static void mxs_phy_shutdown(struct usb_phy *phy)
>  	clk_disable_unprepare(mxs_phy->clk);
>  }
>  
> +static bool mxs_phy_is_low_speed_connection(struct mxs_phy *mxs_phy)
> +{
> +	unsigned int line_state;
> +	/* bit definition is the same for all controllers */
> +	unsigned int dp_bit = BM_ANADIG_USB1_MISC_RX_VPIN_FS,
> +		     dm_bit = BM_ANADIG_USB1_MISC_RX_VMIN_FS;
> +	unsigned int reg = ANADIG_USB1_MISC;
> +
> +	/* If the SoCs don't have anatop, quit */
> +	if (!mxs_phy->regmap_anatop)
> +		return false;
> +
> +	if (mxs_phy->port_id == 0)
> +		reg = ANADIG_USB1_MISC;
> +	else if (mxs_phy->port_id == 1)
> +		reg = ANADIG_USB2_MISC;
> +
> +	regmap_read(mxs_phy->regmap_anatop, reg, &line_state);
> +
> +	if ((line_state & (dp_bit | dm_bit)) ==  dm_bit)
> +		return true;
> +	else
> +		return false;
> +}
> +
>  static int mxs_phy_suspend(struct usb_phy *x, int suspend)
>  {
>  	struct mxs_phy *mxs_phy = to_mxs_phy(x);
> +	bool low_speed_connection, vbus_is_on;
> +
> +	low_speed_connection = mxs_phy_is_low_speed_connection(mxs_phy);
> +	vbus_is_on = mxs_phy_get_vbus_status(mxs_phy);
>  
>  	if (suspend) {
> -		writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
> +		/*
> +		 * FIXME: Do not power down RXPWD1PT1 bit for low speed

Is this FIXME still true?

> +		 * connect. The low speed connection will have problem at
> +		 * very rare cases during usb suspend and resume process.
> +		 */
> +		if (low_speed_connection & vbus_is_on)
> +			writel(0xfffbffff, x->io_priv + HW_USBPHY_PWD);
> +		else
> +			writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
>  		writel(BM_USBPHY_CTRL_CLKGATE,
>  		       x->io_priv + HW_USBPHY_CTRL_SET);
>  		clk_disable_unprepare(mxs_phy->clk);
> 

Marc

-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
Industrial Linux Solutions        | Phone: +49-231-2826-924     |
Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
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RE: [PATCH v4 17/17] usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection

[Peter Chen]

 
> 
> On 12/03/2013 08:37 AM, Peter Chen wrote:
> > At very rare cases, the SoF will not send out after resume with
> > low speed connection. The workaround is do not power down
> > PWD.RXPWD1PT1 bit during the suspend.
> 
> Is this also a fix for newly added code? If so please also squash.
> 

No, it is a workaround for new problem.

> > Signed-off-by: Peter Chen <peter.chen@freescale.com>
> > ---
> >  drivers/usb/phy/phy-mxs-usb.c |   47
> ++++++++++++++++++++++++++++++++++++++++-
> >  1 files changed, 46 insertions(+), 1 deletions(-)
> >
> > diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-
> usb.c
> > index 542b6ec..5ae4a57 100644
> > --- a/drivers/usb/phy/phy-mxs-usb.c
> > +++ b/drivers/usb/phy/phy-mxs-usb.c
> > @@ -69,6 +69,9 @@
> >  #define ANADIG_USB2_LOOPBACK_SET		0x244
> >  #define ANADIG_USB2_LOOPBACK_CLR		0x248
> >
> > +#define ANADIG_USB1_MISC			0x1f0
> > +#define ANADIG_USB2_MISC			0x250
> > +
> >  #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG	BIT(12)
> >  #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG_SL BIT(11)
> >
> > @@ -80,6 +83,11 @@
> >  #define BM_ANADIG_USB2_LOOPBACK_UTMI_DIG_TST1	BIT(2)
> >  #define BM_ANADIG_USB2_LOOPBACK_TSTI_TX_EN	BIT(5)
> >
> > +#define BM_ANADIG_USB1_MISC_RX_VPIN_FS		BIT(29)
> > +#define BM_ANADIG_USB1_MISC_RX_VMIN_FS		BIT(28)
> > +#define BM_ANADIG_USB2_MISC_RX_VPIN_FS		BIT(29)
> > +#define BM_ANADIG_USB2_MISC_RX_VMIN_FS		BIT(28)
> > +
> >  #define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
> >
> >  /* Do disconnection between PHY and controller without vbus */
> > @@ -296,12 +304,49 @@ static void mxs_phy_shutdown(struct usb_phy *phy)
> >  	clk_disable_unprepare(mxs_phy->clk);
> >  }
> >
> > +static bool mxs_phy_is_low_speed_connection(struct mxs_phy *mxs_phy)
> > +{
> > +	unsigned int line_state;
> > +	/* bit definition is the same for all controllers */
> > +	unsigned int dp_bit = BM_ANADIG_USB1_MISC_RX_VPIN_FS,
> > +		     dm_bit = BM_ANADIG_USB1_MISC_RX_VMIN_FS;
> > +	unsigned int reg = ANADIG_USB1_MISC;
> > +
> > +	/* If the SoCs don't have anatop, quit */
> > +	if (!mxs_phy->regmap_anatop)
> > +		return false;
> > +
> > +	if (mxs_phy->port_id == 0)
> > +		reg = ANADIG_USB1_MISC;
> > +	else if (mxs_phy->port_id == 1)
> > +		reg = ANADIG_USB2_MISC;
> > +
> > +	regmap_read(mxs_phy->regmap_anatop, reg, &line_state);
> > +
> > +	if ((line_state & (dp_bit | dm_bit)) ==  dm_bit)
> > +		return true;
> > +	else
> > +		return false;
> > +}
> > +
> >  static int mxs_phy_suspend(struct usb_phy *x, int suspend)
> >  {
> >  	struct mxs_phy *mxs_phy = to_mxs_phy(x);
> > +	bool low_speed_connection, vbus_is_on;
> > +
> > +	low_speed_connection = mxs_phy_is_low_speed_connection(mxs_phy);
> > +	vbus_is_on = mxs_phy_get_vbus_status(mxs_phy);
> >
> >  	if (suspend) {
> > -		writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
> > +		/*
> > +		 * FIXME: Do not power down RXPWD1PT1 bit for low speed
> 
> Is this FIXME still true?

Yes, still not find the root cause.

Peter

> 
> > +		 * connect. The low speed connection will have problem at
> > +		 * very rare cases during usb suspend and resume process.
> > +		 */
> > +		if (low_speed_connection & vbus_is_on)
> > +			writel(0xfffbffff, x->io_priv + HW_USBPHY_PWD);
> > +		else
> > +			writel(0xffffffff, x->io_priv + HW_USBPHY_PWD);
> >  		writel(BM_USBPHY_CTRL_CLKGATE,
> >  		       x->io_priv + HW_USBPHY_CTRL_SET);
> >  		clk_disable_unprepare(mxs_phy->clk);
> >
> 
> Marc
> 
> --
> Pengutronix e.K.                  | Marc Kleine-Budde           |
> Industrial Linux Solutions        | Phone: +49-231-2826-924     |
> Vertretung West/Dortmund          | Fax:   +49-5121-206917-5555 |
> Amtsgericht Hildesheim, HRA 2686  | http://www.pengutronix.de   |

Re: [PATCH v4 17/17] usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection

[Marc Kleine-Budde]

[-- Attachment #1: Type: text/plain, Size: 803 bytes --]

On 12/03/2013 10:19 AM, Peter Chen wrote:
>> On 12/03/2013 08:37 AM, Peter Chen wrote:
>>> At very rare cases, the SoF will not send out after resume with
>>> low speed connection. The workaround is do not power down
>>> PWD.RXPWD1PT1 bit during the suspend.
>>
>> Is this also a fix for newly added code? If so please also squash.

> No, it is a workaround for new problem.

If this would be a fix, it's better to put this as first patch into a
series, so that it can be applied to the stable trees easier.

Marc
-- 
Pengutronix e.K.                  | Marc Kleine-Budde           |
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[-- Attachment #2: OpenPGP digital signature --]
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RE: [PATCH v4 17/17] usb: phy-mxs: do not set PWD.RXPWD1PT1 for low speed connection

[Peter Chen]

 
> 
> On 12/03/2013 10:19 AM, Peter Chen wrote:
> >> On 12/03/2013 08:37 AM, Peter Chen wrote:
> >>> At very rare cases, the SoF will not send out after resume with
> >>> low speed connection. The workaround is do not power down
> >>> PWD.RXPWD1PT1 bit during the suspend.
> >>
> >> Is this also a fix for newly added code? If so please also squash.
> 
> > No, it is a workaround for new problem.
> 
> If this would be a fix, it's better to put this as first patch into a
> series, so that it can be applied to the stable trees easier.
> 

It is introduced by [3/17], without [3/17] it needs another fix which
we have not intended to use. I will squash them, thanks.

Peter

 

[PATCH v4 10/17] usb: phy: Add set_wakeup API

[Peter Chen]

This API is used to set wakeup enable at PHY registers, in that
case, the PHY can be waken up from suspend due to external events,
like vbus change, dp/dm change and id change.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
---
 include/linux/usb/phy.h |   16 ++++++++++++++++
 1 files changed, 16 insertions(+), 0 deletions(-)

diff --git a/include/linux/usb/phy.h b/include/linux/usb/phy.h
index a747960..c6ebe1d 100644
--- a/include/linux/usb/phy.h
+++ b/include/linux/usb/phy.h
@@ -111,6 +111,13 @@ struct usb_phy {
 	int	(*set_suspend)(struct usb_phy *x,
 				int suspend);
 
+	/*
+	 * Set wakeup enable for PHY, in that case, the PHY can be
+	 * waken up from suspend status due to external events,
+	 * like vbus change, dp/dm change and id.
+	 */
+	int	(*set_wakeup)(struct usb_phy *x, bool enabled);
+
 	/* notify phy connect status change */
 	int	(*notify_connect)(struct usb_phy *x,
 			enum usb_device_speed speed);
@@ -270,6 +277,15 @@ usb_phy_set_suspend(struct usb_phy *x, int suspend)
 }
 
 static inline int
+usb_phy_set_wakeup(struct usb_phy *x, bool enabled)
+{
+	if (x && x->set_wakeup)
+		return x->set_wakeup(x, enabled);
+	else
+		return 0;
+}
+
+static inline int
 usb_phy_notify_connect(struct usb_phy *x, enum usb_device_speed speed)
 {
 	if (x && x->notify_connect)
-- 
1.7.8

[PATCH v4 12/17] usb: phy-mxs: Add system suspend/resume API

[Peter Chen]

We need this to keep PHY's power on or off during the system
suspend mode. If we need to enable USB wakeup, then we
must keep PHY's power being on during the system suspend mode.
Otherwise, we need to keep PHY's power being off to save power.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
---
 drivers/usb/phy/phy-mxs-usb.c |   48 +++++++++++++++++++++++++++++++++++++++++
 1 files changed, 48 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 84680e3..3e25c3d 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -57,11 +57,18 @@
 #define BM_USBPHY_DEBUG_CLKGATE			BIT(30)
 
 /* Anatop Registers */
+#define ANADIG_ANA_MISC0			0x150
+#define ANADIG_ANA_MISC0_SET			0x154
+#define ANADIG_ANA_MISC0_CLR			0x158
+
 #define ANADIG_USB1_VBUS_DET_STAT		0x1c0
 
 #define ANADIG_USB1_LOOPBACK_SET		0x1e4
 #define ANADIG_USB1_LOOPBACK_CLR		0x1e8
 
+#define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG	BIT(12)
+#define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG_SL BIT(11)
+
 #define BM_ANADIG_USB1_VBUS_DET_STAT_VBUS_VALID	BIT(3)
 
 #define BM_ANADIG_USB1_LOOPBACK_UTMI_DIG_TST1	BIT(2)
@@ -207,6 +214,22 @@ static void mxs_phy_disconnect_line(struct mxs_phy *mxs_phy, bool on)
 			? "disconnected" : "connected");
 }
 
+static void mxs_phy_enable_ldo_in_suspend(struct mxs_phy *mxs_phy, bool on)
+{
+	unsigned int reg = on ? ANADIG_ANA_MISC0_SET : ANADIG_ANA_MISC0_CLR;
+
+	/* If the SoCs don't have anatop, quit */
+	if (!mxs_phy->regmap_anatop)
+		return;
+
+	if (is_imx6q_phy(mxs_phy))
+		regmap_write(mxs_phy->regmap_anatop, reg,
+			BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG);
+	else if (is_imx6sl_phy(mxs_phy))
+		regmap_write(mxs_phy->regmap_anatop,
+			reg, BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG_SL);
+}
+
 static int mxs_phy_init(struct usb_phy *phy)
 {
 	struct mxs_phy *mxs_phy = to_mxs_phy(phy);
@@ -391,6 +414,8 @@ static int mxs_phy_probe(struct platform_device *pdev)
 		}
 	}
 
+	device_set_wakeup_capable(&pdev->dev, true);
+
 	ret = usb_add_phy_dev(&mxs_phy->phy);
 	if (ret)
 		return ret;
@@ -407,6 +432,28 @@ static int mxs_phy_remove(struct platform_device *pdev)
 	return 0;
 }
 
+static int mxs_phy_system_suspend(struct device *dev)
+{
+	struct mxs_phy *mxs_phy = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev))
+		mxs_phy_enable_ldo_in_suspend(mxs_phy, true);
+
+	return 0;
+}
+
+static int mxs_phy_system_resume(struct device *dev)
+{
+	struct mxs_phy *mxs_phy = dev_get_drvdata(dev);
+
+	if (device_may_wakeup(dev))
+		mxs_phy_enable_ldo_in_suspend(mxs_phy, false);
+
+	return 0;
+}
+
+SIMPLE_DEV_PM_OPS(mxs_phy_pm, mxs_phy_system_suspend, mxs_phy_system_resume);
+
 static struct platform_driver mxs_phy_driver = {
 	.probe = mxs_phy_probe,
 	.remove = mxs_phy_remove,
@@ -414,6 +461,7 @@ static struct platform_driver mxs_phy_driver = {
 		.name = DRIVER_NAME,
 		.owner	= THIS_MODULE,
 		.of_match_table = mxs_phy_dt_ids,
+		.pm = &mxs_phy_pm,
 	 },
 };
 
-- 
1.7.8

[PATCH v4 13/17] usb: phy-mxs: Add sync time after controller clear phcd

[Peter Chen]

After clear portsc.phcd, PHY needs 200us stable time for switch
32K clock to AHB clock.

Signed-off-by: Peter Chen <peter.chen@freescale.com>
---
 drivers/usb/phy/phy-mxs-usb.c |   11 +++++++++++
 1 files changed, 11 insertions(+), 0 deletions(-)

diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 3e25c3d..52e80d9 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -139,6 +139,15 @@ static inline bool is_imx6sl_phy(struct mxs_phy *mxs_phy)
 	return mxs_phy->data == &imx6sl_phy_data;
 }
 
+/*
+ * PHY needs some 32K cycles to switch from 32K clock to
+ * bus (such as AHB/AXI, etc) clock.
+ */
+static void mxs_phy_clock_switch(void)
+{
+	usleep_range(300, 400);
+}
+
 static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
 {
 	int ret;
@@ -234,6 +243,7 @@ static int mxs_phy_init(struct usb_phy *phy)
 {
 	struct mxs_phy *mxs_phy = to_mxs_phy(phy);
 
+	mxs_phy_clock_switch();
 	clk_prepare_enable(mxs_phy->clk);
 	return mxs_phy_hw_init(mxs_phy);
 }
@@ -258,6 +268,7 @@ static int mxs_phy_suspend(struct usb_phy *x, int suspend)
 		       x->io_priv + HW_USBPHY_CTRL_SET);
 		clk_disable_unprepare(mxs_phy->clk);
 	} else {
+		mxs_phy_clock_switch();
 		clk_prepare_enable(mxs_phy->clk);
 		writel(BM_USBPHY_CTRL_CLKGATE,
 		       x->io_priv + HW_USBPHY_CTRL_CLR);
-- 
1.7.8