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Sat, 11 Oct 2025 03:41:58 -0700 (PDT) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Samuel Holland , Richard Genoud Cc: Wentao Liang , Uwe =?UTF-8?B?S2xlaW5lLUvDtm5pZw==?= , Maxime Ripard , Thomas Petazzoni , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Richard Genoud Subject: Re: [PATCH 04/15] mtd: nand: sunxi: move ecc strenghts in sunxi_nfc_caps Date: Sat, 11 Oct 2025 12:41:56 +0200 Message-ID: <13861163.uLZWGnKmhe@jernej-laptop> In-Reply-To: <20251010084042.341224-5-richard.genoud@bootlin.com> References: <20251010084042.341224-1-richard.genoud@bootlin.com> <20251010084042.341224-5-richard.genoud@bootlin.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Hi! Dne petek, 10. oktober 2025 ob 10:40:31 Srednjeevropski poletni =C4=8Das je= Richard Genoud napisal(a): > H6/H616 has more ecc strenghts. > This commit prepares the change. > No functional change. =46ormat looks weird. Reword message to something like moving ecc to caps w= hich will allow expand support for newer cores. Also, there should be empty line before "No functional change." Best regards, Jernej >=20 > Signed-off-by: Richard Genoud > --- > drivers/mtd/nand/raw/sunxi_nand.c | 20 ++++++++++++++++---- > 1 file changed, 16 insertions(+), 4 deletions(-) >=20 > diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sun= xi_nand.c > index 10a48e0d361f..198dd40f9220 100644 > --- a/drivers/mtd/nand/raw/sunxi_nand.c > +++ b/drivers/mtd/nand/raw/sunxi_nand.c > @@ -213,11 +213,15 @@ static inline struct sunxi_nand_chip *to_sunxi_nand= (struct nand_chip *nand) > * through MBUS on A23/A33 needs extra configuration. > * @reg_io_data: I/O data register > * @dma_maxburst: DMA maxburst > + * @ecc_strengths: Available ECC strengths array > + * @nstrengths: Size of @ecc_strengths > */ > struct sunxi_nfc_caps { > bool has_mdma; > unsigned int reg_io_data; > unsigned int dma_maxburst; > + const u8 *ecc_strengths; > + unsigned int nstrengths; > }; > =20 > /** > @@ -1619,9 +1623,9 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_= chip *nand, > struct nand_ecc_ctrl *ecc, > struct device_node *np) > { > - static const u8 strengths[] =3D { 16, 24, 28, 32, 40, 48, 56, 60, 64 }; > struct sunxi_nand_chip *sunxi_nand =3D to_sunxi_nand(nand); > struct sunxi_nfc *nfc =3D to_sunxi_nfc(nand->controller); > + const u8 *strengths =3D nfc->caps->ecc_strengths; > struct mtd_info *mtd =3D nand_to_mtd(nand); > struct nand_device *nanddev =3D mtd_to_nanddev(mtd); > int nsectors; > @@ -1645,7 +1649,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_= chip *nand, > =20 > ecc->strength =3D bytes * 8 / fls(8 * ecc->size); > =20 > - for (i =3D 0; i < ARRAY_SIZE(strengths); i++) { > + for (i =3D 0; i < nfc->caps->nstrengths; i++) { > if (strengths[i] > ecc->strength) > break; > } > @@ -1666,7 +1670,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_= chip *nand, > } > =20 > /* Add ECC info retrieval from DT */ > - for (i =3D 0; i < ARRAY_SIZE(strengths); i++) { > + for (i =3D 0; i < nfc->caps->nstrengths; i++) { > if (ecc->strength <=3D strengths[i]) { > /* > * Update ecc->strength value with the actual strength > @@ -1677,7 +1681,7 @@ static int sunxi_nand_hw_ecc_ctrl_init(struct nand_= chip *nand, > } > } > =20 > - if (i >=3D ARRAY_SIZE(strengths)) { > + if (i >=3D nfc->caps->nstrengths) { > dev_err(nfc->dev, "unsupported strength\n"); > return -ENOTSUPP; > } > @@ -2167,15 +2171,23 @@ static void sunxi_nfc_remove(struct platform_devi= ce *pdev) > dma_release_channel(nfc->dmac); > } > =20 > +static const u8 sunxi_ecc_strengths_a10[] =3D { > + 16, 24, 28, 32, 40, 48, 56, 60, 64 > +}; > + > static const struct sunxi_nfc_caps sunxi_nfc_a10_caps =3D { > .reg_io_data =3D NFC_REG_A10_IO_DATA, > .dma_maxburst =3D 4, > + .ecc_strengths =3D sunxi_ecc_strengths_a10, > + .nstrengths =3D ARRAY_SIZE(sunxi_ecc_strengths_a10), > }; > =20 > static const struct sunxi_nfc_caps sunxi_nfc_a23_caps =3D { > .has_mdma =3D true, > .reg_io_data =3D NFC_REG_A23_IO_DATA, > .dma_maxburst =3D 8, > + .ecc_strengths =3D sunxi_ecc_strengths_a10, > + .nstrengths =3D ARRAY_SIZE(sunxi_ecc_strengths_a10), > }; > =20 > static const struct of_device_id sunxi_nfc_ids[] =3D { >=20