From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shawn Guo Subject: =?UTF-8?q?=5BPATCH=206/9=5D=20ARM=3A=20dts=3A=20imx35=3A=20remove=20the=20use=20of=20pingrp=20macros?= Date: Sun, 26 Jan 2014 00:43:08 +0800 Message-ID: <1390668191-20289-7-git-send-email-shawn.guo@linaro.org> References: <1390668191-20289-1-git-send-email-shawn.guo@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <1390668191-20289-1-git-send-email-shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Rob Herring , arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org, Russell King - ARM Linux , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Shawn Guo List-Id: devicetree@vger.kernel.org We created the pingrp macros in imx35-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainer= s take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx35-pingrp.h | 104 ------------------------------= -------- arch/arm/boot/dts/imx35.dtsi | 1 - 2 files changed, 105 deletions(-) delete mode 100644 arch/arm/boot/dts/imx35-pingrp.h diff --git a/arch/arm/boot/dts/imx35-pingrp.h b/arch/arm/boot/dts/imx35= -pingrp.h deleted file mode 100644 index 2406e7e..0000000 --- a/arch/arm/boot/dts/imx35-pingrp.h +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Copyright 2013 Eukr=C3=A9a Electromatique - * - * This program is free software; you can redistribute it and/or modif= y - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __DTS_IMX35_PINGRP_H -#define __DTS_IMX35_PINGRP_H - -#define MX35_AUDMUX_PINGRP1 \ - MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000 \ - MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000 \ - MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000 \ - MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000 - -#define MX35_CAN1_PINGRP1 \ - MX35_PAD_I2C2_CLK__CAN1_TXCAN 0x1c0 \ - MX35_PAD_I2C2_DAT__CAN1_RXCAN 0x1c0 - -#define MX35_CAN2_PINGRP1 \ - MX35_PAD_TX5_RX0__CAN2_TXCAN 0x1c0 \ - MX35_PAD_TX4_RX1__CAN2_RXCAN 0x1c0 - -#define MX35_ESDHC1_PINGRP1 \ - MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000 \ - MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000 \ - MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000 \ - MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000 \ - MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000 \ - MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000 - -#define MX35_FEC_PINGRP1 \ - MX35_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000 \ - MX35_PAD_FEC_RX_CLK__FEC_RX_CLK 0x80000000 \ - MX35_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 \ - MX35_PAD_FEC_COL__FEC_COL 0x80000000 \ - MX35_PAD_FEC_RDATA0__FEC_RDATA_0 0x80000000 \ - MX35_PAD_FEC_TDATA0__FEC_TDATA_0 0x80000000 \ - MX35_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 \ - MX35_PAD_FEC_MDC__FEC_MDC 0x80000000 \ - MX35_PAD_FEC_MDIO__FEC_MDIO 0x80000000 \ - MX35_PAD_FEC_TX_ERR__FEC_TX_ERR 0x80000000 \ - MX35_PAD_FEC_RX_ERR__FEC_RX_ERR 0x80000000 \ - MX35_PAD_FEC_CRS__FEC_CRS 0x80000000 \ - MX35_PAD_FEC_RDATA1__FEC_RDATA_1 0x80000000 \ - MX35_PAD_FEC_TDATA1__FEC_TDATA_1 0x80000000 \ - MX35_PAD_FEC_RDATA2__FEC_RDATA_2 0x80000000 \ - MX35_PAD_FEC_TDATA2__FEC_TDATA_2 0x80000000 \ - MX35_PAD_FEC_RDATA3__FEC_RDATA_3 0x80000000 \ - MX35_PAD_FEC_TDATA3__FEC_TDATA_3 0x80000000 - -#define MX35_I2C1_PINGRP1 \ - MX35_PAD_I2C1_CLK__I2C1_SCL 0x80000000 \ - MX35_PAD_I2C1_DAT__I2C1_SDA 0x80000000 - -#define MX35_I2C3_PINGRP1 \ - MX35_PAD_ATA_DATA12__I2C3_SCL 0x80000000 \ - MX35_PAD_ATA_DATA13__I2C3_SDA 0x80000000 - -#define MX35_IPU_PINGRP1 \ - MX35_PAD_LD0__IPU_DISPB_DAT_0 0x80000000 \ - MX35_PAD_LD1__IPU_DISPB_DAT_1 0x80000000 \ - MX35_PAD_LD2__IPU_DISPB_DAT_2 0x80000000 \ - MX35_PAD_LD3__IPU_DISPB_DAT_3 0x80000000 \ - MX35_PAD_LD4__IPU_DISPB_DAT_4 0x80000000 \ - MX35_PAD_LD5__IPU_DISPB_DAT_5 0x80000000 \ - MX35_PAD_LD6__IPU_DISPB_DAT_6 0x80000000 \ - MX35_PAD_LD7__IPU_DISPB_DAT_7 0x80000000 \ - MX35_PAD_LD8__IPU_DISPB_DAT_8 0x80000000 \ - MX35_PAD_LD9__IPU_DISPB_DAT_9 0x80000000 \ - MX35_PAD_LD10__IPU_DISPB_DAT_10 0x80000000 \ - MX35_PAD_LD11__IPU_DISPB_DAT_11 0x80000000 \ - MX35_PAD_LD12__IPU_DISPB_DAT_12 0x80000000 \ - MX35_PAD_LD13__IPU_DISPB_DAT_13 0x80000000 \ - MX35_PAD_LD14__IPU_DISPB_DAT_14 0x80000000 \ - MX35_PAD_LD15__IPU_DISPB_DAT_15 0x80000000 \ - MX35_PAD_LD16__IPU_DISPB_DAT_16 0x80000000 \ - MX35_PAD_LD17__IPU_DISPB_DAT_17 0x80000000 \ - MX35_PAD_D3_HSYNC__IPU_DISPB_D3_HSYNC 0x80000000 \ - MX35_PAD_D3_FPSHIFT__IPU_DISPB_D3_CLK 0x80000000 \ - MX35_PAD_D3_DRDY__IPU_DISPB_D3_DRDY 0x80000000 \ - MX35_PAD_D3_VSYNC__IPU_DISPB_D3_VSYNC 0x80000000 \ - MX35_PAD_CONTRAST__IPU_DISPB_CONTR 0x80000000 - -#define MX35_UART1_PINGRP1 \ - MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5 \ - MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5 - -#define MX35_UART1_RTSCTS_PINGRP1 \ - MX35_PAD_CTS1__UART1_CTS 0x1c5 \ - MX35_PAD_RTS1__UART1_RTS 0x1c5 - -#define MX35_UART2_PINGRP1 \ - MX35_PAD_RXD2__UART2_RXD_MUX 0x1c5 \ - MX35_PAD_TXD2__UART2_TXD_MUX 0x1c5 - -#define MX35_UART2_RTSCTS_PINGRP1 \ - MX35_PAD_RTS2__UART2_RTS 0x1c5 \ - MX35_PAD_CTS2__UART2_CTS 0x1c5 - -#endif /* __DTS_IMX35_PINGRP_H */ diff --git a/arch/arm/boot/dts/imx35.dtsi b/arch/arm/boot/dts/imx35.dts= i index a198b92..88b218f 100644 --- a/arch/arm/boot/dts/imx35.dtsi +++ b/arch/arm/boot/dts/imx35.dtsi @@ -10,7 +10,6 @@ =20 #include "skeleton.dtsi" #include "imx35-pinfunc.h" -#include "imx35-pingrp.h" =20 / { aliases { --=20 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" i= n the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html