From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shawn Guo Subject: =?UTF-8?q?=5BPATCH=207/9=5D=20ARM=3A=20dts=3A=20imx25=3A=20remove=20the=20use=20of=20pingrp=20macros?= Date: Sun, 26 Jan 2014 00:43:09 +0800 Message-ID: <1390668191-20289-8-git-send-email-shawn.guo@linaro.org> References: <1390668191-20289-1-git-send-email-shawn.guo@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: QUOTED-PRINTABLE Return-path: In-Reply-To: <1390668191-20289-1-git-send-email-shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org> Sender: devicetree-owner-u79uwXL29TY76Z2rM5mHXA@public.gmane.org To: Rob Herring , arm-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org, Russell King - ARM Linux , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, Shawn Guo List-Id: devicetree@vger.kernel.org We created the pingrp macros in imx25-pingrp.h for purpose of less LOC when same pin group is used by multiple boards. However, DT maintainer= s take it as an abuse of DTC macro support. So let's get rid of it to make the pins used by given device more intuitive. Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi | 17 +++- .../boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts | 56 ++++++++++++= -- arch/arm/boot/dts/imx25-pingrp.h | 81 ------------= -------- arch/arm/boot/dts/imx25.dtsi | 2 +- 4 files changed, 67 insertions(+), 89 deletions(-) delete mode 100644 arch/arm/boot/dts/imx25-pingrp.h diff --git a/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi b/arch/arm/bo= ot/dts/imx25-eukrea-cpuimx25.dtsi index 8abd45a..d6f2764 100644 --- a/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi +++ b/arch/arm/boot/dts/imx25-eukrea-cpuimx25.dtsi @@ -43,11 +43,24 @@ &iomuxc { imx25-eukrea-cpuimx25 { pinctrl_fec: fecgrp { - fsl,pins =3D ; + fsl,pins =3D < + MX25_PAD_FEC_MDC__FEC_MDC 0x80000000 + MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0 + MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000 + MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000 + MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 + MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000 + MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000 + MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 + MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1c0 + >; }; =20 pinctrl_i2c1: i2c1grp { - fsl,pins =3D ; + fsl,pins =3D < + MX25_PAD_I2C1_CLK__I2C1_CLK 0x80000000 + MX25_PAD_I2C1_DAT__I2C1_DAT 0x80000000 + >; }; }; }; diff --git a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts b/a= rch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts index 30073f8..62fb3da 100644 --- a/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts +++ b/arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts @@ -78,11 +78,23 @@ &iomuxc { imx25-eukrea-mbimxsd25-baseboard { pinctrl_audmux: audmuxgrp { - fsl,pins =3D ; + fsl,pins =3D < + MX25_PAD_KPP_COL3__AUD5_TXFS 0xe0 + MX25_PAD_KPP_COL2__AUD5_TXC 0xe0 + MX25_PAD_KPP_COL1__AUD5_RXD 0xe0 + MX25_PAD_KPP_COL0__AUD5_TXD 0xe0 + >; }; =20 pinctrl_esdhc1: esdhc1grp { - fsl,pins =3D ; + fsl,pins =3D < + MX25_PAD_SD1_CMD__SD1_CMD 0x400000c0 + MX25_PAD_SD1_CLK__SD1_CLK 0x400000c0 + MX25_PAD_SD1_DATA0__SD1_DATA0 0x400000c0 + MX25_PAD_SD1_DATA1__SD1_DATA1 0x400000c0 + MX25_PAD_SD1_DATA2__SD1_DATA2 0x400000c0 + MX25_PAD_SD1_DATA3__SD1_DATA3 0x400000c0 + >; }; =20 pinctrl_gpiokeys: gpiokeysgrp { @@ -94,15 +106,49 @@ }; =20 pinctrl_lcdc: lcdcgrp { - fsl,pins =3D ; + fsl,pins =3D < + MX25_PAD_LD0__LD0 0x1 + MX25_PAD_LD1__LD1 0x1 + MX25_PAD_LD2__LD2 0x1 + MX25_PAD_LD3__LD3 0x1 + MX25_PAD_LD4__LD4 0x1 + MX25_PAD_LD5__LD5 0x1 + MX25_PAD_LD6__LD6 0x1 + MX25_PAD_LD7__LD7 0x1 + MX25_PAD_LD8__LD8 0x1 + MX25_PAD_LD9__LD9 0x1 + MX25_PAD_LD10__LD10 0x1 + MX25_PAD_LD11__LD11 0x1 + MX25_PAD_LD12__LD12 0x1 + MX25_PAD_LD13__LD13 0x1 + MX25_PAD_LD14__LD14 0x1 + MX25_PAD_LD15__LD15 0x1 + MX25_PAD_GPIO_E__LD16 0x1 + MX25_PAD_GPIO_F__LD17 0x1 + MX25_PAD_HSYNC__HSYNC 0x80000000 + MX25_PAD_VSYNC__VSYNC 0x80000000 + MX25_PAD_LSCLK__LSCLK 0x80000000 + MX25_PAD_OE_ACD__OE_ACD 0x80000000 + MX25_PAD_CONTRAST__CONTRAST 0x80000000 + >; }; =20 pinctrl_uart1: uart1grp { - fsl,pins =3D ; + fsl,pins =3D < + MX25_PAD_UART1_RTS__UART1_RTS 0xe0 + MX25_PAD_UART1_CTS__UART1_CTS 0xe0 + MX25_PAD_UART1_TXD__UART1_TXD 0x80000000 + MX25_PAD_UART1_RXD__UART1_RXD 0xc0 + >; }; =20 pinctrl_uart2: uart2grp { - fsl,pins =3D ; + fsl,pins =3D < + MX25_PAD_UART2_RXD__UART2_RXD 0x80000000 + MX25_PAD_UART2_TXD__UART2_TXD 0x80000000 + MX25_PAD_UART2_RTS__UART2_RTS 0x80000000 + MX25_PAD_UART2_CTS__UART2_CTS 0x80000000 + >; }; }; }; diff --git a/arch/arm/boot/dts/imx25-pingrp.h b/arch/arm/boot/dts/imx25= -pingrp.h deleted file mode 100644 index 4a35a63..0000000 --- a/arch/arm/boot/dts/imx25-pingrp.h +++ /dev/null @@ -1,81 +0,0 @@ -/* - * Copyright 2013 Eukr=C3=A9a Electromatique - * - * This program is free software; you can redistribute it and/or modif= y - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __DTS_IMX25_PINGRP_H -#define __DTS_IMX25_PINGRP_H - -#include "imx25-pinfunc.h" - -#define MX25_AUDMUX_PINGRP1 \ - MX25_PAD_KPP_COL3__AUD5_TXFS 0xe0 \ - MX25_PAD_KPP_COL2__AUD5_TXC 0xe0 \ - MX25_PAD_KPP_COL1__AUD5_RXD 0xe0 \ - MX25_PAD_KPP_COL0__AUD5_TXD 0xe0 - -#define MX25_ESDHC1_PINGRP1 \ - MX25_PAD_SD1_CMD__SD1_CMD 0x400000c0 \ - MX25_PAD_SD1_CLK__SD1_CLK 0x400000c0 \ - MX25_PAD_SD1_DATA0__SD1_DATA0 0x400000c0 \ - MX25_PAD_SD1_DATA1__SD1_DATA1 0x400000c0 \ - MX25_PAD_SD1_DATA2__SD1_DATA2 0x400000c0 \ - MX25_PAD_SD1_DATA3__SD1_DATA3 0x400000c0 - -#define MX25_FEC_PINGRP1 \ - MX25_PAD_FEC_MDC__FEC_MDC 0x80000000 \ - MX25_PAD_FEC_MDIO__FEC_MDIO 0x400001e0 \ - MX25_PAD_FEC_TDATA0__FEC_TDATA0 0x80000000 \ - MX25_PAD_FEC_TDATA1__FEC_TDATA1 0x80000000 \ - MX25_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 \ - MX25_PAD_FEC_RDATA0__FEC_RDATA0 0x80000000 \ - MX25_PAD_FEC_RDATA1__FEC_RDATA1 0x80000000 \ - MX25_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 \ - MX25_PAD_FEC_TX_CLK__FEC_TX_CLK 0x1c0 - -#define MX25_I2C1_PINGRP1 \ - MX25_PAD_I2C1_CLK__I2C1_CLK 0x80000000 \ - MX25_PAD_I2C1_DAT__I2C1_DAT 0x80000000 - -#define MX25_LCDC_PINGRP1 \ - MX25_PAD_LD0__LD0 0x1 \ - MX25_PAD_LD1__LD1 0x1 \ - MX25_PAD_LD2__LD2 0x1 \ - MX25_PAD_LD3__LD3 0x1 \ - MX25_PAD_LD4__LD4 0x1 \ - MX25_PAD_LD5__LD5 0x1 \ - MX25_PAD_LD6__LD6 0x1 \ - MX25_PAD_LD7__LD7 0x1 \ - MX25_PAD_LD8__LD8 0x1 \ - MX25_PAD_LD9__LD9 0x1 \ - MX25_PAD_LD10__LD10 0x1 \ - MX25_PAD_LD11__LD11 0x1 \ - MX25_PAD_LD12__LD12 0x1 \ - MX25_PAD_LD13__LD13 0x1 \ - MX25_PAD_LD14__LD14 0x1 \ - MX25_PAD_LD15__LD15 0x1 \ - MX25_PAD_GPIO_E__LD16 0x1 \ - MX25_PAD_GPIO_F__LD17 0x1 \ - MX25_PAD_HSYNC__HSYNC 0x80000000 \ - MX25_PAD_VSYNC__VSYNC 0x80000000 \ - MX25_PAD_LSCLK__LSCLK 0x80000000 \ - MX25_PAD_OE_ACD__OE_ACD 0x80000000 \ - MX25_PAD_CONTRAST__CONTRAST 0x80000000 - -#define MX25_UART1_PINGRP1 \ - MX25_PAD_UART1_RTS__UART1_RTS 0xe0 \ - MX25_PAD_UART1_CTS__UART1_CTS 0xe0 \ - MX25_PAD_UART1_TXD__UART1_TXD 0x80000000 \ - MX25_PAD_UART1_RXD__UART1_RXD 0xc0 - -#define MX25_UART2_PINGRP1 \ - MX25_PAD_UART2_RXD__UART2_RXD 0x80000000 \ - MX25_PAD_UART2_TXD__UART2_TXD 0x80000000 \ - MX25_PAD_UART2_RTS__UART2_RTS 0x80000000 \ - MX25_PAD_UART2_CTS__UART2_CTS 0x80000000 - -#endif /* __DTS_IMX25_PINGRP_H */ diff --git a/arch/arm/boot/dts/imx25.dtsi b/arch/arm/boot/dts/imx25.dts= i index 9e9e3b8..32f760e 100644 --- a/arch/arm/boot/dts/imx25.dtsi +++ b/arch/arm/boot/dts/imx25.dtsi @@ -10,7 +10,7 @@ */ =20 #include "skeleton.dtsi" -#include "imx25-pingrp.h" +#include "imx25-pinfunc.h" =20 / { aliases { --=20 1.7.9.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" i= n the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org More majordomo info at http://vger.kernel.org/majordomo-info.html