* [PATCH 1/2] ARM: dts: imx6q: add 852MHz setpoint for CPU freq
@ 2014-02-12 7:56 Anson Huang
[not found] ` <1392191777-15703-1-git-send-email-b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
0 siblings, 1 reply; 4+ messages in thread
From: Anson Huang @ 2014-02-12 7:56 UTC (permalink / raw)
To: shawn.guo-QSEj5FYQhm4dnm+yROfE0A, kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
According to datasheet, i.MX6Q has setpoint of 852MHz
which is exclusive with 996MHz, the fuse map of speed_grading
defines the max speed of ARM, here we add this 852MHz
setpoint opp info, kernel will check the speed_grading
fuse and remove all illegal setpoints.
Signed-off-by: Anson Huang <b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
arch/arm/boot/dts/imx6q.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 422d169..fadf498 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -30,6 +30,7 @@
/* kHz uV */
1200000 1275000
996000 1250000
+ 852000 1250000
792000 1150000
396000 975000
>;
@@ -37,6 +38,7 @@
/* ARM kHz SOC-PU uV */
1200000 1275000
996000 1250000
+ 852000 1250000
792000 1175000
396000 1175000
>;
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH 2/2] ARM: imx: add speed grading check for i.mx6 soc
[not found] ` <1392191777-15703-1-git-send-email-b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
@ 2014-02-12 7:56 ` Anson Huang
[not found] ` <1392191777-15703-2-git-send-email-b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
0 siblings, 1 reply; 4+ messages in thread
From: Anson Huang @ 2014-02-12 7:56 UTC (permalink / raw)
To: shawn.guo-QSEj5FYQhm4dnm+yROfE0A, kernel-bIcnvbaLZ9MEGnE8C9+IrQ
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
The fuse map of speed_grading[1:0] defines the max speed
of ARM, see below the definition:
2b'11: 1200000000Hz;
2b'10: 996000000Hz;
2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
2b'00: 792000000Hz;
Need to remove all illegal setpoints according to fuse
map.
Signed-off-by: Anson Huang <b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
---
arch/arm/mach-imx/mach-imx6q.c | 22 ++++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index f9cbbf9..ad9da1f 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -219,8 +219,10 @@ static void __init imx6q_init_machine(void)
#define OCOTP_CFG3 0x440
#define OCOTP_CFG3_SPEED_SHIFT 16
#define OCOTP_CFG3_SPEED_1P2GHZ 0x3
+#define OCOTP_CFG3_SPEED_996MHZ 0x2
+#define OCOTP_CFG3_SPEED_852MHZ 0x1
-static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
+static void __init imx6q_opp_check_speed_grading(struct device *cpu_dev)
{
struct device_node *np;
void __iomem *base;
@@ -238,11 +240,27 @@ static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
goto put_node;
}
+ /*
+ * SPEED_GRADING[1:0] defines the max speed of ARM:
+ * 2b'11: 1200000000Hz;
+ * 2b'10: 996000000Hz;
+ * 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
+ * 2b'00: 792000000Hz;
+ * We need to set the max speed of ARM according to fuse map.
+ */
val = readl_relaxed(base + OCOTP_CFG3);
val >>= OCOTP_CFG3_SPEED_SHIFT;
if ((val & 0x3) != OCOTP_CFG3_SPEED_1P2GHZ)
if (dev_pm_opp_disable(cpu_dev, 1200000000))
pr_warn("failed to disable 1.2 GHz OPP\n");
+ if ((val & 0x3) < OCOTP_CFG3_SPEED_996MHZ)
+ if (dev_pm_opp_disable(cpu_dev, 996000000))
+ pr_warn("failed to disable 996 MHz OPP\n");
+ if (cpu_is_imx6q()) {
+ if ((val & 0x3) != OCOTP_CFG3_SPEED_852MHZ)
+ if (dev_pm_opp_disable(cpu_dev, 852000000))
+ pr_warn("failed to disable 852 MHz OPP\n");
+ }
put_node:
of_node_put(np);
@@ -268,7 +286,7 @@ static void __init imx6q_opp_init(void)
goto put_node;
}
- imx6q_opp_check_1p2ghz(cpu_dev);
+ imx6q_opp_check_speed_grading(cpu_dev);
put_node:
of_node_put(np);
--
1.7.9.5
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH 2/2] ARM: imx: add speed grading check for i.mx6 soc
[not found] ` <1392191777-15703-2-git-send-email-b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
@ 2014-02-12 9:39 ` Shawn Guo
[not found] ` <20140212093926.GB24834-rvtDTF3kK1ictlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
0 siblings, 1 reply; 4+ messages in thread
From: Shawn Guo @ 2014-02-12 9:39 UTC (permalink / raw)
To: Anson Huang
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ, devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On Wed, Feb 12, 2014 at 03:56:17PM +0800, Anson Huang wrote:
> The fuse map of speed_grading[1:0] defines the max speed
> of ARM, see below the definition:
>
> 2b'11: 1200000000Hz;
> 2b'10: 996000000Hz;
> 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
> 2b'00: 792000000Hz;
>
> Need to remove all illegal setpoints according to fuse
> map.
>
> Signed-off-by: Anson Huang <b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
> ---
> arch/arm/mach-imx/mach-imx6q.c | 22 ++++++++++++++++++++--
> 1 file changed, 20 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
> index f9cbbf9..ad9da1f 100644
> --- a/arch/arm/mach-imx/mach-imx6q.c
> +++ b/arch/arm/mach-imx/mach-imx6q.c
> @@ -219,8 +219,10 @@ static void __init imx6q_init_machine(void)
> #define OCOTP_CFG3 0x440
> #define OCOTP_CFG3_SPEED_SHIFT 16
> #define OCOTP_CFG3_SPEED_1P2GHZ 0x3
> +#define OCOTP_CFG3_SPEED_996MHZ 0x2
> +#define OCOTP_CFG3_SPEED_852MHZ 0x1
>
> -static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
> +static void __init imx6q_opp_check_speed_grading(struct device *cpu_dev)
> {
> struct device_node *np;
> void __iomem *base;
> @@ -238,11 +240,27 @@ static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
> goto put_node;
> }
>
> + /*
> + * SPEED_GRADING[1:0] defines the max speed of ARM:
> + * 2b'11: 1200000000Hz;
> + * 2b'10: 996000000Hz;
> + * 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
> + * 2b'00: 792000000Hz;
> + * We need to set the max speed of ARM according to fuse map.
> + */
> val = readl_relaxed(base + OCOTP_CFG3);
> val >>= OCOTP_CFG3_SPEED_SHIFT;
val &= 0x3;
Then you do not need to do it in every if-clause below.
> if ((val & 0x3) != OCOTP_CFG3_SPEED_1P2GHZ)
> if (dev_pm_opp_disable(cpu_dev, 1200000000))
> pr_warn("failed to disable 1.2 GHz OPP\n");
> + if ((val & 0x3) < OCOTP_CFG3_SPEED_996MHZ)
> + if (dev_pm_opp_disable(cpu_dev, 996000000))
> + pr_warn("failed to disable 996 MHz OPP\n");
> + if (cpu_is_imx6q()) {
> + if ((val & 0x3) != OCOTP_CFG3_SPEED_852MHZ)
if (cpu_is_imx6q() && val != OCOTP_CFG3_SPEED_852MHZ)
Shawn
> + if (dev_pm_opp_disable(cpu_dev, 852000000))
> + pr_warn("failed to disable 852 MHz OPP\n");
> + }
>
> put_node:
> of_node_put(np);
> @@ -268,7 +286,7 @@ static void __init imx6q_opp_init(void)
> goto put_node;
> }
>
> - imx6q_opp_check_1p2ghz(cpu_dev);
> + imx6q_opp_check_speed_grading(cpu_dev);
>
> put_node:
> of_node_put(np);
> --
> 1.7.9.5
>
>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 4+ messages in thread
* RE: [PATCH 2/2] ARM: imx: add speed grading check for i.mx6 soc
[not found] ` <20140212093926.GB24834-rvtDTF3kK1ictlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
@ 2014-02-12 9:44 ` Anson.Huang-KZfg59tc24xl57MIdRCFDg
0 siblings, 0 replies; 4+ messages in thread
From: Anson.Huang-KZfg59tc24xl57MIdRCFDg @ 2014-02-12 9:44 UTC (permalink / raw)
To: Shawn Guo
Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org,
devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
Right, will improve it in V2, thanks.
Best Regards.
Anson Huang
Freescale Semiconductor Shanghai
Tel:021-28937058
>-----Original Message-----
>From: Shawn Guo [mailto:shawn.guo-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org]
>Sent: Wednesday, February 12, 2014 5:39 PM
>To: Huang Yongcai-B20788
>Cc: kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-arm-
>kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org
>Subject: Re: [PATCH 2/2] ARM: imx: add speed grading check for i.mx6 soc
>
>On Wed, Feb 12, 2014 at 03:56:17PM +0800, Anson Huang wrote:
>> The fuse map of speed_grading[1:0] defines the max speed of ARM, see
>> below the definition:
>>
>> 2b'11: 1200000000Hz;
>> 2b'10: 996000000Hz;
>> 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
>> 2b'00: 792000000Hz;
>>
>> Need to remove all illegal setpoints according to fuse map.
>>
>> Signed-off-by: Anson Huang <b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
>> ---
>> arch/arm/mach-imx/mach-imx6q.c | 22 ++++++++++++++++++++--
>> 1 file changed, 20 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/mach-imx/mach-imx6q.c
>> b/arch/arm/mach-imx/mach-imx6q.c index f9cbbf9..ad9da1f 100644
>> --- a/arch/arm/mach-imx/mach-imx6q.c
>> +++ b/arch/arm/mach-imx/mach-imx6q.c
>> @@ -219,8 +219,10 @@ static void __init imx6q_init_machine(void)
>> #define OCOTP_CFG3 0x440
>> #define OCOTP_CFG3_SPEED_SHIFT 16
>> #define OCOTP_CFG3_SPEED_1P2GHZ 0x3
>> +#define OCOTP_CFG3_SPEED_996MHZ 0x2
>> +#define OCOTP_CFG3_SPEED_852MHZ 0x1
>>
>> -static void __init imx6q_opp_check_1p2ghz(struct device *cpu_dev)
>> +static void __init imx6q_opp_check_speed_grading(struct device
>> +*cpu_dev)
>> {
>> struct device_node *np;
>> void __iomem *base;
>> @@ -238,11 +240,27 @@ static void __init imx6q_opp_check_1p2ghz(struct
>device *cpu_dev)
>> goto put_node;
>> }
>>
>> + /*
>> + * SPEED_GRADING[1:0] defines the max speed of ARM:
>> + * 2b'11: 1200000000Hz;
>> + * 2b'10: 996000000Hz;
>> + * 2b'01: 852000000Hz; -- i.MX6Q Only, exclusive with 996MHz.
>> + * 2b'00: 792000000Hz;
>> + * We need to set the max speed of ARM according to fuse map.
>> + */
>> val = readl_relaxed(base + OCOTP_CFG3);
>> val >>= OCOTP_CFG3_SPEED_SHIFT;
>
> val &= 0x3;
>
>Then you do not need to do it in every if-clause below.
>
>> if ((val & 0x3) != OCOTP_CFG3_SPEED_1P2GHZ)
>> if (dev_pm_opp_disable(cpu_dev, 1200000000))
>> pr_warn("failed to disable 1.2 GHz OPP\n");
>> + if ((val & 0x3) < OCOTP_CFG3_SPEED_996MHZ)
>> + if (dev_pm_opp_disable(cpu_dev, 996000000))
>> + pr_warn("failed to disable 996 MHz OPP\n");
>> + if (cpu_is_imx6q()) {
>> + if ((val & 0x3) != OCOTP_CFG3_SPEED_852MHZ)
>
> if (cpu_is_imx6q() && val != OCOTP_CFG3_SPEED_852MHZ)
>
>Shawn
>
>> + if (dev_pm_opp_disable(cpu_dev, 852000000))
>> + pr_warn("failed to disable 852 MHz OPP\n");
>> + }
>>
>> put_node:
>> of_node_put(np);
>> @@ -268,7 +286,7 @@ static void __init imx6q_opp_init(void)
>> goto put_node;
>> }
>>
>> - imx6q_opp_check_1p2ghz(cpu_dev);
>> + imx6q_opp_check_speed_grading(cpu_dev);
>>
>> put_node:
>> of_node_put(np);
>> --
>> 1.7.9.5
>>
>>
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2014-02-12 9:44 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2014-02-12 7:56 [PATCH 1/2] ARM: dts: imx6q: add 852MHz setpoint for CPU freq Anson Huang
[not found] ` <1392191777-15703-1-git-send-email-b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-02-12 7:56 ` [PATCH 2/2] ARM: imx: add speed grading check for i.mx6 soc Anson Huang
[not found] ` <1392191777-15703-2-git-send-email-b20788-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
2014-02-12 9:39 ` Shawn Guo
[not found] ` <20140212093926.GB24834-rvtDTF3kK1ictlrPMvKcciBecyulp+rMXqFh9Ls21Oc@public.gmane.org>
2014-02-12 9:44 ` Anson.Huang-KZfg59tc24xl57MIdRCFDg
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).