From mboxrd@z Thu Jan 1 00:00:00 1970 From: Roger Quadros Subject: [PATCH v8 11/14] ARM: dts: omap5-uevm: Provide USB PHY clock Date: Thu, 20 Feb 2014 13:40:06 +0200 Message-ID: <1392896409-5101-12-git-send-email-rogerq@ti.com> References: <1392896409-5101-1-git-send-email-rogerq@ti.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1392896409-5101-1-git-send-email-rogerq@ti.com> Sender: linux-kernel-owner@vger.kernel.org To: tony@atomide.com, bcousson@baylibre.com, lee.jones@linaro.org Cc: balbi@ti.com, nm@ti.com, khilman@linaro.org, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-usb@vger.kernel.org, Roger Quadros List-Id: devicetree@vger.kernel.org The HS USB 2 PHY gets its clock from AUXCLK1. Provide this information. Signed-off-by: Roger Quadros --- arch/arm/boot/dts/omap5-uevm.dts | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/omap5-uevm.dts b/arch/arm/boot/dts/omap5-uevm.dts index 002fa70..3b99ec2 100644 --- a/arch/arm/boot/dts/omap5-uevm.dts +++ b/arch/arm/boot/dts/omap5-uevm.dts @@ -31,12 +31,8 @@ hsusb2_phy: hsusb2_phy { compatible = "usb-nop-xceiv"; reset-gpios = <&gpio3 16 GPIO_ACTIVE_LOW>; /* gpio3_80 HUB_NRESET */ - /** - * FIXME - * Put the right clock phandle here when available - * clocks = <&auxclk1>; - * clock-names = "main_clk"; - */ + clocks = <&auxclk1_ck>; + clock-names = "main_clk"; clock-frequency = <19200000>; }; -- 1.8.3.2