From mboxrd@z Thu Jan 1 00:00:00 1970 From: "Ivan T. Ivanov" Subject: Re: [PATCH v3 2/2] i2c: New bus driver for the Qualcomm QUP I2C controller Date: Mon, 24 Feb 2014 12:33:10 +0200 Message-ID: <1393237990.6481.15.camel@iivanov-dev> References: <1392943090-30556-1-git-send-email-bjorn.andersson@sonymobile.com> <1392943090-30556-3-git-send-email-bjorn.andersson@sonymobile.com> <92B0AE30-5CDF-43FC-8588-EEF0C5F86266@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <92B0AE30-5CDF-43FC-8588-EEF0C5F86266@codeaurora.org> Sender: linux-arm-msm-owner@vger.kernel.org To: Kumar Gala Cc: Bjorn Andersson , Mark Rutland , devicetree , Pawel Moll , Wolfram Sang , linux-arm-msm , Ian Campbell , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , linux-i2c@vger.kernel.org, Rob Landley , Andy Gross , Grant Likely , Stephen Boyd , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org Hi, On Fri, 2014-02-21 at 09:35 -0600, Kumar Gala wrote: > On Feb 20, 2014, at 6:38 PM, Bjorn Andersson wrote: > > > This bus driver supports the QUP i2c hardware controller in the Qualcomm SOCs. > > The Qualcomm Universal Peripheral Engine (QUP) is a general purpose data path > > engine with input/output FIFOs and an embedded i2c mini-core. The driver > > supports FIFO mode (for low bandwidth applications) and block mode (interrupt > > generated for each block-size data transfer). > > > > Cc: Andy Gross > > Cc: Stephen Boyd > > Signed-off-by: Ivan T. Ivanov > > Signed-off-by: Bjorn Andersson > > --- > > > > +config I2C_QUP > > + tristate "Qualcomm QUP based I2C controller" > > + depends on ARCH_MSM > > ARCH_QCOM There is no such symbol, still. Regards, Ivan > - k >