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From: Lucas Stach <l.stach@pengutronix.de>
To: Arnd Bergmann <arnd@arndb.de>
Cc: Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, Jingoo Han <jg1.han@samsung.com>,
	linux-samsung-soc@vger.kernel.org,
	Richard Zhu <r65037@freescale.com>,
	kernel@pengutronix.de, linux-sh@vger.kernel.org,
	Tim Harvey <tharvey@gateworks.com>,
	Stephen Warren <swarren@wwwdotorg.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Simon Horman <horms@verge.net.au>,
	Thierry Reding <thierry.reding@gmail.com>,
	Ben Dooks <ben-linux@fluff.org>,
	linux-tegra@vger.kernel.org, Kukjin Kim <kgene.kim@samsung.com>,
	Shawn Guo <shawn.guo@linaro.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 7/7] PCI: designware: split samsung and fsl bindings
Date: Tue, 04 Mar 2014 16:34:19 +0100	[thread overview]
Message-ID: <1393947259.9405.18.camel@weser.hi.pengutronix.de> (raw)
In-Reply-To: <201403041553.40202.arnd@arndb.de>

Am Dienstag, den 04.03.2014, 15:53 +0100 schrieb Arnd Bergmann:
> On Tuesday 04 March 2014, Lucas Stach wrote:
> > Right, we should be able to reuse the clock names. Though I'm not really
> > sure how the Samsung clocks maps to those used on i.MX, as the names are
> > a bit generic. Maybe someone from Samsung could shed a bit of light on
> > this.
> > 
> > On i.MX6 the clock names (which I have to agree are pretty bad) map as
> > follows:
> > pcie_axi: host controller main register/bus access clock
> > pcie_ref_125m: pcie phy reference clock
> > 
> > sata_ref_100m: pcie bus 100MHz reference clock
> 
> That doesn't explain why it's called "sata_ref_100m".
> 
I agree this is bad naming. It's called this way because someone decided
to name it like the internal clock it is sourced from on most boards.
This really should be pcie_ref, or something. I suspect this corresponds
to the pcie_bus clock in the Exynos binding in which case we should just
name it this way.

> > lvds_gate: bad abstraction. Decides if the reference clock is sourced
> > internal (i.e. the 100MHz ref clock above) or from an SoC external
> > source. We should really find a better way of representing this in the
> > clock tree.
> 
> I don't understand this description at all. Can you try to explain that
> with different words?
> 
On i.MX6 the PCIe reference clock is routed through a generic clock pad,
which can be configured either as input or output. When the i.MX is the
PCI master we source the clock from sata_ref_100m and configure this pad
as clock output.
Somebody decided to abstract the input/output switch as a gate, which is
arguably wrong, this should be a mux deciding between internal or
external clock source.

The PCIe host driver should really only need the clk pad clock,
activation of the sata_ref_100m clock should be handled through
parent<->child relationship of those clocks in the clock tree, which
isn't properly handled right now. I'll try to fix this up, but it won't
be backward compatible in any way.

Regards,
Lucas
-- 
Pengutronix e.K.                           | Lucas Stach                 |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-5076 |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

  reply	other threads:[~2014-03-04 15:34 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-02-28 17:28 [PATCH 0/7] PCI irq mapping fixes and cleanups Lucas Stach
2014-02-28 17:28 ` [PATCH 1/7] ARM: dts: tegra: add PCIe interrupt mapping properties Lucas Stach
     [not found]   ` <1393608523-17509-2-git-send-email-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2014-02-28 20:27     ` Stephen Warren
2014-02-28 17:28 ` [PATCH 2/7] PCI: tegra: use new OF interrupt mapping when possible Lucas Stach
2014-02-28 17:28 ` [PATCH 4/7] ARM: dts: exynos5440: fix PCIe interrupt mapping Lucas Stach
     [not found]   ` <1393608523-17509-5-git-send-email-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2014-03-03  7:40     ` Jingoo Han
2014-03-03  7:53       ` Jingoo Han
2014-03-03  9:26         ` Lucas Stach
2014-02-28 17:28 ` [PATCH 5/7] ARM: dts: imx6: add PCIe interrupt mapping properties Lucas Stach
2014-03-05  5:43   ` Shawn Guo
2014-02-28 17:28 ` [PATCH 6/7] PCI: designware: use new OF interrupt mapping when possible Lucas Stach
     [not found]   ` <1393608523-17509-7-git-send-email-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2014-03-04 15:05     ` Tim Harvey
2014-02-28 17:28 ` [PATCH 7/7] PCI: designware: split samsung and fsl bindings Lucas Stach
2014-02-28 20:03   ` Arnd Bergmann
2014-03-04 14:13     ` Lucas Stach
2014-03-04 14:53       ` Arnd Bergmann
2014-03-04 15:34         ` Lucas Stach [this message]
2014-03-11 13:34           ` Arnd Bergmann
     [not found]   ` <1393608523-17509-8-git-send-email-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2014-02-28 20:23     ` Tim Harvey
2014-02-28 20:04 ` [PATCH 0/7] PCI irq mapping fixes and cleanups Arnd Bergmann
     [not found] ` <1393608523-17509-1-git-send-email-l.stach-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2014-02-28 17:28   ` [PATCH 3/7] PCI: rcar: use new OF interrupt mapping when possible Lucas Stach
2014-03-01  0:53   ` [PATCH 0/7] PCI irq mapping fixes and cleanups Tim Harvey
2014-03-01 18:30     ` Jason Gunthorpe
2014-03-03  8:11       ` Jingoo Han
2014-03-03 17:49         ` Tim Harvey
2014-03-03 18:01           ` Jason Gunthorpe
2014-03-03 18:28             ` Tim Harvey
2014-03-03 23:40           ` Tim Harvey
2014-03-04  0:01             ` Jason Gunthorpe
2014-03-04  6:04               ` Tim Harvey

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