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From: Carlo Caione <carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
To: linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	mark.rutland-5wv7dgnIgG8@public.gmane.org,
	hdegoede-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org,
	tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org,
	maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: Carlo Caione <carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
Subject: [PATCH v8 3/3] ARM: sun7i/sun6i: irqchip: Update the documentation
Date: Wed, 26 Mar 2014 22:50:48 +0100	[thread overview]
Message-ID: <1395870648-17240-4-git-send-email-carlo@caione.org> (raw)
In-Reply-To: <1395870648-17240-1-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>

Added documentation for NMI irqchip.

Signed-off-by: Carlo Caione <carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
Acked-by: Maxime Ripard <maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>
---
 .../allwinner,sun67i-sc-nmi.txt                    | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/allwinner,sun67i-sc-nmi.txt

diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun67i-sc-nmi.txt b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun67i-sc-nmi.txt
new file mode 100644
index 0000000..993a68a
--- /dev/null
+++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun67i-sc-nmi.txt
@@ -0,0 +1,27 @@
+Allwinner Sunxi NMI Controller
+==============================
+
+Required properties:
+
+- compatible : should be "allwinner,sun7i-a20-sc-nmi" or
+  "allwinner,sun6i-a31-sc-nmi"
+- reg : Specifies base physical address and size of the registers.
+- interrupt-controller : Identifies the node as an interrupt controller
+- #interrupt-cells : Specifies the number of cells needed to encode an
+  interrupt source. The value shall be 2. The first cell is the IRQ number, the
+  second cell the trigger type as defined in interrupt.txt in this directory.
+- interrupt-parent: Specifies the parent interrupt controller.
+- interrupts: Specifies the interrupt line (NMI) which is handled by
+  the interrupt controller in the parent controller's notation. This value
+  shall be the NMI.
+
+Example:
+
+interrupt-controller@01c00030 {
+	compatible = "allwinner,sun7i-a20-sc-nmi";
+	interrupt-controller;
+	#interrupt-cells = <2>;
+	reg = <0x01c00030 0x0c>;
+	interrupt-parent = <&gic>;
+	interrupts = <0 0 4>;
+};
-- 
1.8.3.2

  parent reply	other threads:[~2014-03-26 21:50 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-03-26 21:50 [PATCH v8 0/3] ARM: sun7i/sun6i: irqchip: Irqchip driver for NMI controller Carlo Caione
     [not found] ` <1395870648-17240-1-git-send-email-carlo-KA+7E9HrN00dnm+yROfE0A@public.gmane.org>
2014-03-26 21:50   ` [PATCH v8 1/3] ARM: sun7i/sun6i: irqchip: Add irqchip " Carlo Caione
2014-03-26 21:50   ` [PATCH v8 2/3] ARM: sun7i/sun6i: dts: Add NMI irqchip support Carlo Caione
2014-03-26 21:50   ` Carlo Caione [this message]
2014-03-27  8:18   ` [PATCH v8 0/3] ARM: sun7i/sun6i: irqchip: Irqchip driver for NMI controller Maxime Ripard

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