From mboxrd@z Thu Jan 1 00:00:00 1970 From: Subject: [PATCHv2 1/3] dts: socfpga: Add bindings for Altera SoC SDRAM controller Date: Tue, 15 Apr 2014 18:30:08 -0500 Message-ID: <1397604610-20931-3-git-send-email-tthayer@altera.com> References: <1397604610-20931-1-git-send-email-tthayer@altera.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1397604610-20931-1-git-send-email-tthayer@altera.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: robherring2@gmail.com, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org, galak@codeaurora.org, rob@landley.net, linux@arm.linux.org.uk, dinguyen@altera.com, dougthompson@xmission.com, grant.likely@linaro.org Cc: devicetree@vger.kernel.org, Thor Thayer , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, tthayer.linux@gmail.com, Borislav Petkov , linux-arm-kernel@lists.infradead.org, linux-edac@vger.kernel.org List-Id: devicetree@vger.kernel.org From: Thor Thayer Addition of the Altera SDRAM controller bindings and device tree changes to the Altera SoC project. --- v2: Update the mailing list to include the EDAC mailing list. Signed-off-by: Thor Thayer To: Rob Herring To: Pawel Moll To: Mark Rutland To: Ian Campbell To: Kumar Gala To: Rob Landley To: Russell King To: Dinh Nguyen To: Doug Thompson To: Grant Likely Cc: Borislav Petkov Cc: devicetree@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: linux-edac@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org --- .../bindings/arm/altera/socfpga-sdram.txt | 14 ++++++++++++++ arch/arm/boot/dts/socfpga.dtsi | 5 +++++ 2 files changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt diff --git a/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt new file mode 100644 index 0000000..525cb76 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/altera/socfpga-sdram.txt @@ -0,0 +1,14 @@ +Altera SOCFPGA SDRAM Controller + +Required properties: +- compatible : "altr,sdr-ctl", "syscon"; + Note that syscon is invoked for this device to support the FPGA + bridge driver, EDAC driver and other devices that share the + registers. +- reg : Should contain 1 register ranges(address and length) + +Example: + sdrctl@ffc25000 { + compatible = "altr,sdr-ctl", "syscon"; + reg = <0xffc25000 0x1000>; + }; diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index df43702..6ce912e 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -676,6 +676,11 @@ clocks = <&l4_sp_clk>; }; + sdrctl@ffc25000 { + compatible = "altr,sdr-ctl", "syscon"; + reg = <0xffc25000 0x1000>; + }; + rstmgr@ffd05000 { compatible = "altr,rst-mgr"; reg = <0xffd05000 0x1000>; -- 1.7.9.5