From mboxrd@z Thu Jan 1 00:00:00 1970 From: Santosh Shilimkar Subject: [PATCH v2 1/7] device: introduce per device dma_pfn_offset Date: Sat, 19 Apr 2014 10:32:46 -0400 Message-ID: <1397917972-6293-2-git-send-email-santosh.shilimkar@ti.com> References: <1397917972-6293-1-git-send-email-santosh.shilimkar@ti.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1397917972-6293-1-git-send-email-santosh.shilimkar@ti.com> Sender: linux-kernel-owner@vger.kernel.org To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Santosh Shilimkar , Greg Kroah-Hartman , Russell King , Arnd Bergmann , Olof Johansson , Grant Likely , Rob Herring , Catalin Marinas , Linus Walleij , Grygorii Strashko List-Id: devicetree@vger.kernel.org On few architectures, there are few restrictions on DMAble area of system RAM. That also means that devices needs to know about this restrictions so that the dma_masks can be updated accordingly and dma address translation helpers can add/subtract the dma offset. In most of cases DMA addresses can be performed using offset value of Bus address space relatively to physical address space as following: PFN->DMA: __pfn_to_phys(pfn + [-]dma_pfn_offset) DMA->PFN: __phys_to_pfn(dma_addr) + [-]dma_pfn_offset So we introduce per device dma_pfn_offset which can be popullated by architecture init code while creating the devices. Cc: Greg Kroah-Hartman Cc: Russell King Cc: Arnd Bergmann Cc: Olof Johansson Cc: Grant Likely Cc: Rob Herring Cc: Catalin Marinas Cc: Linus Walleij Signed-off-by: Grygorii Strashko Signed-off-by: Santosh Shilimkar --- include/linux/device.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/device.h b/include/linux/device.h index 233bbbe..85a52d6 100644 --- a/include/linux/device.h +++ b/include/linux/device.h @@ -691,6 +691,7 @@ struct acpi_dev_node { * @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all * hardware supports 64-bit addresses for consistent allocations * such descriptors. + * @dma_pfn_offset: offset of DMA memory range relatively of RAM * @dma_parms: A low level driver may set these to teach IOMMU code about * segment limitations. * @dma_pools: Dma pools (if dma'ble device). @@ -756,6 +757,7 @@ struct device { not all hardware supports 64 bit addresses for consistent allocations such descriptors. */ + unsigned long dma_pfn_offset; struct device_dma_parameters *dma_parms; -- 1.7.9.5