From mboxrd@z Thu Jan 1 00:00:00 1970 From: Shaik Ameer Basha Subject: [PATCH v12 27/31] ARM: dts: add System MMU nodes of exynos4 series Date: Sun, 27 Apr 2014 13:07:59 +0530 Message-ID: <1398584283-22846-28-git-send-email-shaik.ameer@samsung.com> References: <1398584283-22846-1-git-send-email-shaik.ameer@samsung.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-reply-to: <1398584283-22846-1-git-send-email-shaik.ameer-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: linux-samsung-soc-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: kgene.kim-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, prathyush.k-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, grundler-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org, supash.ramaswamy-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, tomasz.figa-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org, joshi-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, sachin.kamat-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, s.nawrocki-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, Varun.Sethi-KZfg59tc24xl57MIdRCFDg@public.gmane.org, a.motakis-lrHrjnjw1UfHK3s98zE1ajGjJy/sRE9J@public.gmane.org, pullip.cho-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, t.figa-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org, rahul.sharma-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org List-Id: devicetree@vger.kernel.org From: Cho KyongHo This patch adds System MMU nodes that are common to exynos4 series. Signed-off-by: Cho KyongHo --- arch/arm/boot/dts/exynos4.dtsi | 107 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 107 insertions(+) diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi index 2f8bcd0..229efee 100644 --- a/arch/arm/boot/dts/exynos4.dtsi +++ b/arch/arm/boot/dts/exynos4.dtsi @@ -536,4 +536,111 @@ samsung,power-domain = <&pd_lcd0>; status = "disabled"; }; + + sysmmu_mfc_l: sysmmu@13620000 { + compatible = "samsung,sysmmu-v2"; + reg = <0x13620000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <5 5>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_MFCL>; + samsung,power-domain = <&pd_mfc>; + mmu-masters = <&mfc>; + }; + + sysmmu_mfc_r: sysmmu@13630000 { + compatible = "samsung,sysmmu-v2"; + reg = <0x13630000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <5 6>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_MFCR>; + samsung,power-domain = <&pd_mfc>; + mmu-masters = <&mfc>; + }; + + sysmmu_tv: sysmmu@12E20000 { + compatible = "samsung,sysmmu-v1"; + reg = <0x12E20000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <5 4>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_TV>; + samsung,power-domain = <&pd_tv>; + }; + + sysmmu_fimc0: sysmmu@11A20000 { + compatible = "samsung,sysmmu-v1"; + reg = <0x11A20000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <4 2>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC0>; + samsung,power-domain = <&pd_cam>; + mmu-masters = <&fimc_0>; + }; + + sysmmu_fimc1: sysmmu@11A30000 { + compatible = "samsung,sysmmu-v1"; + reg = <0x11A30000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <4 3>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC1>; + samsung,power-domain = <&pd_cam>; + mmu-masters = <&fimc_1>; + }; + + sysmmu_fimc2: sysmmu@11A40000 { + compatible = "samsung,sysmmu-v1"; + reg = <0x11A40000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <4 4>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC2>; + samsung,power-domain = <&pd_cam>; + mmu-masters = <&fimc_2>; + }; + + sysmmu_fimc3: sysmmu@11A50000 { + compatible = "samsung,sysmmu-v1"; + reg = <0x11A50000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <4 5>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMC3>; + samsung,power-domain = <&pd_cam>; + mmu-masters = <&fimc_3>; + }; + + sysmmu_jpeg: sysmmu@11A60000 { + compatible = "samsung,sysmmu-v1"; + reg = <0x11A60000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <4 6>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_JPEG>; + samsung,power-domain = <&pd_cam>; + }; + + sysmmu_rotator: sysmmu@12A30000 { + compatible = "samsung,sysmmu-v1"; + reg = <0x12A30000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <5 0>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_ROTATOR>; + samsung,power-domain = <&pd_lcd0>; + }; + + sysmmu_fimd0: sysmmu@11E20000 { + compatible = "samsung,sysmmu-v1"; + reg = <0x11E20000 0x1000>; + interrupt-parent = <&combiner>; + interrupts = <5 2>; + clock-names = "sysmmu"; + clocks = <&clock CLK_SMMU_FIMD0>; + samsung,power-domain = <&pd_lcd0>; + mmu-masters = <&fimd>; + }; }; -- 1.7.9.5