From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kishon Vijay Abraham I Subject: [PATCH 11/17] ARM: dts: dra7xx-clocks: Add missing 32khz clocks used for PHY Date: Tue, 6 May 2014 19:03:57 +0530 Message-ID: <1399383244-14556-12-git-send-email-kishon@ti.com> References: <1399383244-14556-1-git-send-email-kishon@ti.com> Mime-Version: 1.0 Content-Type: text/plain Return-path: In-Reply-To: <1399383244-14556-1-git-send-email-kishon@ti.com> Sender: linux-omap-owner@vger.kernel.org To: devicetree@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-omap@vger.kernel.org, linux-pci@vger.kernel.org Cc: rogerq@ti.com, balajitk@ti.com, Kishon Vijay Abraham I , Tony Lindgren , Rajendra Nayak , Tero Kristo , Paul Walmsley , Rob Herring List-Id: devicetree@vger.kernel.org Added missing 32khz clock used by PCIe PHY. The documention for this node can be found @ ../bindings/clock/ti/gate.txt. Cc: Tony Lindgren Cc: Rajendra Nayak Cc: Tero Kristo Cc: Paul Walmsley Cc: Rob Herring Signed-off-by: Kishon Vijay Abraham I --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index 44993ec..e1bd052 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -1165,6 +1165,14 @@ reg = <0x021c>, <0x0220>; }; + optfclk_pciephy_32khz: optfclk_pciephy_32khz@4a0093b0 { + compatible = "ti,gate-clock"; + clocks = <&sys_32k_ck>; + #clock-cells = <0>; + reg = <0x13b0>; + ti,bit-shift = <8>; + }; + optfclk_pciephy_div: optfclk_pciephy_div@4a00821c { compatible = "ti,divider-clock"; clocks = <&apll_pcie_ck>; -- 1.7.9.5