From mboxrd@z Thu Jan 1 00:00:00 1970 From: Beniamino Galvani Subject: [PATCH 2/3] pwm: rockchip: document device tree bindings Date: Thu, 8 May 2014 01:08:34 +0200 Message-ID: <1399504115-16257-3-git-send-email-b.galvani@gmail.com> References: <1399504115-16257-1-git-send-email-b.galvani@gmail.com> Return-path: In-Reply-To: <1399504115-16257-1-git-send-email-b.galvani@gmail.com> Sender: linux-kernel-owner@vger.kernel.org To: Thierry Reding Cc: Heiko Stuebner , linux-pwm@vger.kernel.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Randy Dunlap , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Beniamino Galvani List-Id: devicetree@vger.kernel.org This adds binding documentation for Rockchip SoC PWM driver. Signed-off-by: Beniamino Galvani --- .../devicetree/bindings/pwm/pwm-rockchip.txt | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-rockchip.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt new file mode 100644 index 0000000..35deba4 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-rockchip.txt @@ -0,0 +1,17 @@ +Rockchip PWM controller + +Required properties: + - compatible: should be "rockchip,rk2928-pwm" + - reg: physical base address and length of the controller's registers + - clocks: phandle and clock specifier of the PWM reference clock + - #pwm-cells: should be 2. See pwm.txt in this directory for a + description of the cell format + +Example: + + pwm0: pwm@20030000 { + compatible = "rockchip,rk2928-pwm"; + reg = <0x20030000 0x10>; + clocks = <&cru PCLK_PWM01>; + #pwm-cells = <2>; + }; -- 1.7.10.4