From: Gabriel FERNANDEZ <gabriel.fernandez@st.com>
To: mturquette@linaro.org, robh+dt@kernel.org, pawel.moll@arm.com,
mark.rutland@arm.com, ijc+devicetree@hellion.org.uk,
galak@codeaurora.org, rdunlap@infradead.org
Cc: devicetree@vger.kernel.org, linux-doc@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, kernel@stlinux.com,
Lee Jones <lee.jones@linaro.org>,
Gabriel Fernandez <gabriel.fernandez@linaro.org>,
Olivier Bideau <olivier.bideau@st.com>
Subject: [PATCH 09/12] drivers: clk: st: STiH407: Support for clockgenD0/D2/D3
Date: Mon, 12 May 2014 18:06:37 +0200 [thread overview]
Message-ID: <1399910800-12847-10-git-send-email-gabriel.fernandez@linaro.org> (raw)
In-Reply-To: <1399910800-12847-1-git-send-email-gabriel.fernandez@linaro.org>
The patch added support for ClockGenD0/D2/D3
It includes one 660 Quadfs.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Olivier Bideau <olivier.bideau@st.com>
---
drivers/clk/st/clkgen-fsyn.c | 46 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
diff --git a/drivers/clk/st/clkgen-fsyn.c b/drivers/clk/st/clkgen-fsyn.c
index 68c6786..d7a0341 100644
--- a/drivers/clk/st/clkgen-fsyn.c
+++ b/drivers/clk/st/clkgen-fsyn.c
@@ -298,6 +298,48 @@ static struct clkgen_quadfs_data st_fs660c32_C_407 = {
.get_rate = clk_fs660c32_dig_get_rate,
};
+static struct clkgen_quadfs_data st_fs660c32_D_407 = {
+ .nrst_present = true,
+ .nrst = { CLKGEN_FIELD(0x2a0, 0x1, 0),
+ CLKGEN_FIELD(0x2a0, 0x1, 1),
+ CLKGEN_FIELD(0x2a0, 0x1, 2),
+ CLKGEN_FIELD(0x2a0, 0x1, 3) },
+ .ndiv = CLKGEN_FIELD(0x2a4, 0x7, 16),
+ .pe = { CLKGEN_FIELD(0x2b4, 0x7fff, 0),
+ CLKGEN_FIELD(0x2b8, 0x7fff, 0),
+ CLKGEN_FIELD(0x2bc, 0x7fff, 0),
+ CLKGEN_FIELD(0x2c0, 0x7fff, 0) },
+ .sdiv = { CLKGEN_FIELD(0x2b4, 0xf, 20),
+ CLKGEN_FIELD(0x2b8, 0xf, 20),
+ CLKGEN_FIELD(0x2bc, 0xf, 20),
+ CLKGEN_FIELD(0x2c0, 0xf, 20) },
+ .npda = CLKGEN_FIELD(0x2a0, 0x1, 12),
+ .nsb = { CLKGEN_FIELD(0x2a0, 0x1, 8),
+ CLKGEN_FIELD(0x2a0, 0x1, 9),
+ CLKGEN_FIELD(0x2a0, 0x1, 10),
+ CLKGEN_FIELD(0x2a0, 0x1, 11) },
+ .nsdiv_present = true,
+ .nsdiv = { CLKGEN_FIELD(0x2b4, 0x1, 24),
+ CLKGEN_FIELD(0x2b8, 0x1, 24),
+ CLKGEN_FIELD(0x2bc, 0x1, 24),
+ CLKGEN_FIELD(0x2c0, 0x1, 24) },
+ .mdiv = { CLKGEN_FIELD(0x2b4, 0x1f, 15),
+ CLKGEN_FIELD(0x2b8, 0x1f, 15),
+ CLKGEN_FIELD(0x2bc, 0x1f, 15),
+ CLKGEN_FIELD(0x2c0, 0x1f, 15) },
+ .en = { CLKGEN_FIELD(0x2ac, 0x1, 0),
+ CLKGEN_FIELD(0x2ac, 0x1, 1),
+ CLKGEN_FIELD(0x2ac, 0x1, 2),
+ CLKGEN_FIELD(0x2ac, 0x1, 3) },
+ .lockstatus_present = true,
+ .lock_status = CLKGEN_FIELD(0x2A0, 0x1, 24),
+ .powerup_polarity = 1,
+ .standby_polarity = 1,
+ .pll_ops = &st_quadfs_pll_c32_ops,
+ .rtbl = fs660c32_rtbl,
+ .rtbl_cnt = ARRAY_SIZE(fs660c32_rtbl),
+ .get_rate = clk_fs660c32_dig_get_rate,};
+
/**
* DOC: A Frequency Synthesizer that multiples its input clock by a fixed factor
*
@@ -985,6 +1027,10 @@ static struct of_device_id quadfs_of_match[] = {
.compatible = "st,stih407-quadfs660-C",
.data = (void *)&st_fs660c32_C_407
},
+ {
+ .compatible = "st,stih407-quadfs660-D",
+ .data = (void *)&st_fs660c32_D_407
+ },
{}
};
--
1.9.1
next prev parent reply other threads:[~2014-05-12 16:06 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-12 16:06 [PATCH 00/12] Add Flexgen Clock support Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 01/12] clk: st: Update ST clock binding documentation Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 02/12] clk: st: Adds Flexgen clock binding Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 03/12] drivers: clk: st: STiH407: Support for Flexgen Clocks Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 04/12] drivers: clk: st: STiH407: Support for A9 MUX Clocks Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 05/12] drivers: clk: st: STiH407: Support for clockgenA0 Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 06/12] drivers: clk: st: Add polarity bit indication Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 07/12] drivers: clk: st: Add quadfs reset handling Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 08/12] drivers: clk: st: STiH407: Support for clockgenC0 Gabriel FERNANDEZ
2014-05-12 16:06 ` Gabriel FERNANDEZ [this message]
2014-05-12 16:06 ` [PATCH 10/12] drivers: clk: st: STiH407: Support for clockgenA9 Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 11/12] drivers: clk: st: Update frequency tables for fs660c32 and fs432c65 Gabriel FERNANDEZ
2014-05-12 16:06 ` [PATCH 12/12] drivers: clk: st: Use round to closest divider flag Gabriel FERNANDEZ
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