Re: [PATCH v5 4/4] clk: qcom: lpass: Add support for LPASS clock controller for SC7180

[Taniya Das <tdas@codeaurora.org>]

Hi Stephen,

On 8/6/2020 1:54 AM, Stephen Boyd wrote:
> Quoting Taniya Das (2020-07-24 09:07:58)
>> +
>> +static struct clk_rcg2 core_clk_src = {
>> +       .cmd_rcgr = 0x1d000,
>> +       .mnd_width = 8,
>> +       .hid_width = 5,
>> +       .parent_map = lpass_core_cc_parent_map_2,
>> +       .clkr.hw.init = &(struct clk_init_data){
>> +               .name = "core_clk_src",
> 
> Any chance this can get a better name? Something with LPASS prefix?
> 

These are the exact clock names from the hardware plan.

>> +               .parent_data = &(const struct clk_parent_data){
>> +                       .fw_name = "bi_tcxo",
>> +               },
>> +               .num_parents = 1,
>> +               .ops = &clk_rcg2_ops,
>> +       },
>> +};
>> +
> [...]
>> +
>> +static struct clk_branch lpass_audio_core_sysnoc_mport_core_clk = {
>> +       .halt_reg = 0x23000,
>> +       .halt_check = BRANCH_HALT,
>> +       .hwcg_reg = 0x23000,
>> +       .hwcg_bit = 1,
>> +       .clkr = {
>> +               .enable_reg = 0x23000,
>> +               .enable_mask = BIT(0),
>> +               .hw.init = &(struct clk_init_data){
>> +                       .name = "lpass_audio_core_sysnoc_mport_core_clk",
>> +                       .parent_data = &(const struct clk_parent_data){
>> +                               .hw = &core_clk_src.clkr.hw,
>> +                       },
>> +                       .num_parents = 1,
>> +                       .flags = CLK_SET_RATE_PARENT,
>> +                       .ops = &clk_branch2_ops,
>> +               },
>> +       },
>> +};
>> +
>> +static struct clk_regmap *lpass_core_cc_sc7180_clocks[] = {
>> +       [EXT_MCLK0_CLK_SRC] = &ext_mclk0_clk_src.clkr,
>> +       [LPAIF_PRI_CLK_SRC] = &lpaif_pri_clk_src.clkr,
>> +       [LPAIF_SEC_CLK_SRC] = &lpaif_sec_clk_src.clkr,
>> +       [CORE_CLK_SRC] = &core_clk_src.clkr,
> 
> And all of these, can they have LPASS_ prefix on the defines? Seems
> like we're missing a namespace otherwise.
> 

These are generated as they are in the HW plan. Do you still think I 
should update them?

>> +       [LPASS_AUDIO_CORE_EXT_MCLK0_CLK] = &lpass_audio_core_ext_mclk0_clk.clkr,
>> +       [LPASS_AUDIO_CORE_LPAIF_PRI_IBIT_CLK] =
>> +               &lpass_audio_core_lpaif_pri_ibit_clk.clkr,
>> +       [LPASS_AUDIO_CORE_LPAIF_SEC_IBIT_CLK] =
>> +               &lpass_audio_core_lpaif_sec_ibit_clk.clkr,
>> +       [LPASS_AUDIO_CORE_SYSNOC_MPORT_CORE_CLK] =
>> +               &lpass_audio_core_sysnoc_mport_core_clk.clkr,
>> +       [LPASS_LPAAUDIO_DIG_PLL] = &lpass_lpaaudio_dig_pll.clkr,
>> +       [LPASS_LPAAUDIO_DIG_PLL_OUT_ODD] = &lpass_lpaaudio_dig_pll_out_odd.clkr,
>> +};
>> +

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