[PATCH 0/2] Add Renesas RZ/G3L RSPI support

[PATCH 0/2] Add Renesas RZ/G3L RSPI support

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

This patch series adds binding and driver support for RSPI IP found on the
RZ/G3L SoC. The RSPI is compatible with RZ/V2H RSPI, but has 2 clocks
compared to 3 on RZ/V2H.

Biju Das (2):
  dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC
  spi: rzv2h-rspi: Add support for RZ/G3L (R9A08G046)

 .../bindings/spi/renesas,rzv2h-rspi.yaml      | 26 +++++++++++++++++++
 drivers/spi/spi-rzv2h-rspi.c                  |  8 ++++++
 2 files changed, 34 insertions(+)

-- 
2.43.0

[PATCH 1/2] dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC

[Biju]

From: Biju Das <biju.das.jz@bp.renesas.com>

Document RSPI IP found on the RZ/G3L SoC. The RSPI IP is compatible with
the RZ/V2H RSPI IP, but has 2 clocks compared to 3 on RZ/V2H.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 .../bindings/spi/renesas,rzv2h-rspi.yaml      | 26 +++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
index cf8b733b766d..599c06ff08e5 100644
--- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
+++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
@@ -13,6 +13,7 @@ properties:
   compatible:
     oneOf:
       - enum:
+          - renesas,r9a08g046-rspi # RZ/G3L
           - renesas,r9a09g057-rspi # RZ/V2H(P)
           - renesas,r9a09g077-rspi # RZ/T2H
       - items:
@@ -85,6 +86,31 @@ required:
 
 allOf:
   - $ref: spi-controller.yaml#
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - renesas,r9a08g046-rspi
+    then:
+      properties:
+        clocks:
+          maxItems: 2
+
+        clock-names:
+          items:
+            - const: pclk
+            - const: tclk
+        dmas:
+          maxItems: 2
+
+        dma-names:
+          maxItems: 2
+
+      required:
+        - resets
+        - reset-names
+
   - if:
       properties:
         compatible:
-- 
2.43.0

Re: [PATCH 1/2] dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC

[Krzysztof Kozlowski]

On 04/03/2026 08:49, Biju wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
> 
> Document RSPI IP found on the RZ/G3L SoC. The RSPI IP is compatible with
> the RZ/V2H RSPI IP, but has 2 clocks compared to 3 on RZ/V2H.
> 
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
>  .../bindings/spi/renesas,rzv2h-rspi.yaml      | 26 +++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> index cf8b733b766d..599c06ff08e5 100644
> --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> @@ -13,6 +13,7 @@ properties:
>    compatible:
>      oneOf:
>        - enum:
> +          - renesas,r9a08g046-rspi # RZ/G3L
>            - renesas,r9a09g057-rspi # RZ/V2H(P)
>            - renesas,r9a09g077-rspi # RZ/T2H
>        - items:
> @@ -85,6 +86,31 @@ required:
>  
>  allOf:
>    - $ref: spi-controller.yaml#
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            enum:
> +              - renesas,r9a08g046-rspi
> +    then:
> +      properties:
> +        clocks:
> +          maxItems: 2
> +
> +        clock-names:
> +          items:
> +            - const: pclk
> +            - const: tclk
> +        dmas:
> +          maxItems: 2
> +
> +        dma-names:
> +          maxItems: 2

So even after my objections here:
https://lore.kernel.org/all/9d08ddda-403e-458d-95e4-4e76915df85d@kernel.org/

this was not fixed and Renesas did not provide actual cross-patch review.

This is still probably wrong as pointed out by other patches by Renesas.
Also, you cannot have flexible names.

NAK

Best regards,
Krzysztof

RE: [PATCH 1/2] dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC

[Biju Das]

Hi Krzysztof Kozlowski,

Thanks for the review.

> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: 04 March 2026 15:04
> Subject: Re: [PATCH 1/2] dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC
> 
> On 04/03/2026 08:49, Biju wrote:
> > From: Biju Das <biju.das.jz@bp.renesas.com>
> >
> > Document RSPI IP found on the RZ/G3L SoC. The RSPI IP is compatible
> > with the RZ/V2H RSPI IP, but has 2 clocks compared to 3 on RZ/V2H.
> >
> > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> > ---
> >  .../bindings/spi/renesas,rzv2h-rspi.yaml      | 26 +++++++++++++++++++
> >  1 file changed, 26 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> > b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> > index cf8b733b766d..599c06ff08e5 100644
> > --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> > +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> > @@ -13,6 +13,7 @@ properties:
> >    compatible:
> >      oneOf:
> >        - enum:
> > +          - renesas,r9a08g046-rspi # RZ/G3L
> >            - renesas,r9a09g057-rspi # RZ/V2H(P)
> >            - renesas,r9a09g077-rspi # RZ/T2H
> >        - items:
> > @@ -85,6 +86,31 @@ required:
> >
> >  allOf:
> >    - $ref: spi-controller.yaml#
> > +  - if:
> > +      properties:
> > +        compatible:
> > +          contains:
> > +            enum:
> > +              - renesas,r9a08g046-rspi
> > +    then:
> > +      properties:
> > +        clocks:
> > +          maxItems: 2
> > +
> > +        clock-names:
> > +          items:
> > +            - const: pclk
> > +            - const: tclk
> > +        dmas:
> > +          maxItems: 2
> > +
> > +        dma-names:
> > +          maxItems: 2
> 
> So even after my objections here:
> https://lore.kernel.org/all/9d08ddda-403e-458d-95e4-4e76915df85d@kernel.org/
> 
> this was not fixed and Renesas did not provide actual cross-patch review.

That patch is not correct. See below.

> 
> This is still probably wrong as pointed out by other patches by Renesas.
> Also, you cannot have flexible names.

You can have "rx", "tx" in any order and {rx, tx} should be unique dma specifier
and  it should have at least 1 tx and 1 rx for multiple DMAC.

For RZ/G3L SoC, only 1 DMA and Nothing prevent us to specify it as { rx, tx} or {rx, tx}

But for RZ/G3E SoC, 5 DMAC and we tested all the combinations

DMAC0{rx} DMAC0{tx}
DMAC0{rx} DMAC1{tx}
DMAC1{rx} DMAC0{tx}
DMAC0{rx} DMAC2{tx}
DMAC2{rx} DMAC0{tx}
DMAC0{rx} DMAC3{tx}
DMAC3{rx} DMAC0{tx}
DMAC0{rx} DMAC4{tx}
DMAC4{rx} DMAC0{tx}
DMAC1{rx} DMAC2{tx}
DMAC2{rx} DMAC1{tx}
DMAC1{rx} DMAC3{tx}
DMAC3{rx} DMAC1{tx}
DMAC1{rx} DMAC4{tx}
DMAC4{rx} DMAC1{tx}
DMAC2{rx} DMAC3{tx}
DMAC3{rx} DMAC2{tx}
DMAC2{rx} DMAC4{tx} 
DMAC4{rx} DMAC2{tx} 
DMAC3{rx} DMAC4{tx}
DMAC4{rx} DMAC3{tx}

{ rx, tx, rx} 
{ rx, tx, rx, rx}
{ rx, rx, rx, rx, tx}

any combinations is valid with atleast 1 tx and 1 rx.


Are we missing anything here? Please let us know.


Cheers,
Biju

Re: [PATCH 1/2] dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC

[Krzysztof Kozlowski]

On 04/03/2026 16:18, Biju Das wrote:
> Hi Krzysztof Kozlowski,
> 
> Thanks for the review.
> 
>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzk@kernel.org>
>> Sent: 04 March 2026 15:04
>> Subject: Re: [PATCH 1/2] dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC
>>
>> On 04/03/2026 08:49, Biju wrote:
>>> From: Biju Das <biju.das.jz@bp.renesas.com>
>>>
>>> Document RSPI IP found on the RZ/G3L SoC. The RSPI IP is compatible
>>> with the RZ/V2H RSPI IP, but has 2 clocks compared to 3 on RZ/V2H.
>>>
>>> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
>>> ---
>>>  .../bindings/spi/renesas,rzv2h-rspi.yaml      | 26 +++++++++++++++++++
>>>  1 file changed, 26 insertions(+)
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
>>> b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
>>> index cf8b733b766d..599c06ff08e5 100644
>>> --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
>>> +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
>>> @@ -13,6 +13,7 @@ properties:
>>>    compatible:
>>>      oneOf:
>>>        - enum:
>>> +          - renesas,r9a08g046-rspi # RZ/G3L
>>>            - renesas,r9a09g057-rspi # RZ/V2H(P)
>>>            - renesas,r9a09g077-rspi # RZ/T2H
>>>        - items:
>>> @@ -85,6 +86,31 @@ required:
>>>
>>>  allOf:
>>>    - $ref: spi-controller.yaml#
>>> +  - if:
>>> +      properties:
>>> +        compatible:
>>> +          contains:
>>> +            enum:
>>> +              - renesas,r9a08g046-rspi
>>> +    then:
>>> +      properties:
>>> +        clocks:
>>> +          maxItems: 2
>>> +
>>> +        clock-names:
>>> +          items:
>>> +            - const: pclk
>>> +            - const: tclk
>>> +        dmas:
>>> +          maxItems: 2
>>> +
>>> +        dma-names:
>>> +          maxItems: 2
>>
>> So even after my objections here:
>> https://lore.kernel.org/all/9d08ddda-403e-458d-95e4-4e76915df85d@kernel.org/
>>
>> this was not fixed and Renesas did not provide actual cross-patch review.
> 
> That patch is not correct. See below.
> 
>>
>> This is still probably wrong as pointed out by other patches by Renesas.
>> Also, you cannot have flexible names.
> 
> You can have "rx", "tx" in any order and {rx, tx} should be unique dma specifier

No. You cannot. I just told you so. Please read writing-bindings for
arguments.

Look at the code which was here before that incomplete solution was merged.



> and  it should have at least 1 tx and 1 rx for multiple DMAC.
> 
> For RZ/G3L SoC, only 1 DMA and Nothing prevent us to specify it as { rx, tx} or {rx, tx}
> 

Well, I prevent you. So NAK.

Best regards,
Krzysztof

Re: [PATCH 1/2] dt-bindings: spi: renesas,rzv2h-rspi: Document RZ/G3L SoC

[Geert Uytterhoeven]

On Wed, 4 Mar 2026 at 08:49, Biju <biju.das.au@gmail.com> wrote:
> From: Biju Das <biju.das.jz@bp.renesas.com>
>
> Document RSPI IP found on the RZ/G3L SoC. The RSPI IP is compatible with
> the RZ/V2H RSPI IP, but has 2 clocks compared to 3 on RZ/V2H.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds