[PATCH 0/2] regulator: pfuze100: Minor driver enhancements

[PATCH 0/2] regulator: pfuze100: Minor driver enhancements

[Sean Cross]

The PFUZE100 supports enabling/disabling of SWB regulators, but the driver
doesn't currently support this.  The first patch adds support for the
enable/disable bit.

Additionally, there is a minor bug wherein GPIO0 IO0 will sometimes get
allocated as the PFUZE100 ena_gpio, due to the fact that ena_gpio defaults
to 0 which is a valid gpio.  The second patch fixes this case.

Sean Cross (2):
  regulator: pfuze100: Support SWB enable/disable
  regulator: pfuze100: Don't allocate an invalid gpio

 drivers/regulator/pfuze100-regulator.c | 5 +++++
 1 file changed, 5 insertions(+)

-- 
2.0.0.rc2

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[PATCH 1/2] regulator: pfuze100: Support SWB enable/disable

[Sean Cross]

The SWB regulators have the ability to be turned on and off.  Add
enable/disable support for these regulators.

Signed-off-by: Sean Cross <xobs-nXMMniAx+RbQT0dZR+AlfA@public.gmane.org>
---
 drivers/regulator/pfuze100-regulator.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
index 67e678c..b20304b 100644
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -137,6 +137,8 @@ static struct regulator_ops pfuze100_sw_regulator_ops = {
 };
 
 static struct regulator_ops pfuze100_swb_regulator_ops = {
+	.enable = regulator_enable_regmap,
+	.disable = regulator_disable_regmap,
 	.list_voltage = regulator_list_voltage_table,
 	.map_voltage = regulator_map_voltage_ascend,
 	.set_voltage_sel = regulator_set_voltage_sel_regmap,
@@ -189,6 +191,8 @@ static struct regulator_ops pfuze100_swb_regulator_ops = {
 			.volt_table = voltages,	\
 			.vsel_reg = (base),	\
 			.vsel_mask = (mask),	\
+			.enable_reg = (base),	\
+			.enable_mask = 0x48,	\
 		},	\
 	}
 
-- 
2.0.0.rc2

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[PATCH 2/2] regulator: pfuze100: Don't allocate an invalid gpio

[Sean Cross]

Previously, the PFUZE100 would try to allocate gpio0 io0 because
config.ena_gpio defaults to 0, which can be a valid GPIO.  To prevent this
from happening, set this parameter to -EINVAL.

Signed-off-by: Sean Cross <xobs-nXMMniAx+RbQT0dZR+AlfA@public.gmane.org>
---
 drivers/regulator/pfuze100-regulator.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/regulator/pfuze100-regulator.c b/drivers/regulator/pfuze100-regulator.c
index b20304b..930eb13 100644
--- a/drivers/regulator/pfuze100-regulator.c
+++ b/drivers/regulator/pfuze100-regulator.c
@@ -506,6 +506,7 @@ static int pfuze100_regulator_probe(struct i2c_client *client,
 		config.init_data = init_data;
 		config.driver_data = pfuze_chip;
 		config.of_node = match_of_node(i);
+		config.ena_gpio = -EINVAL;
 
 		pfuze_chip->regulators[i] =
 			devm_regulator_register(&client->dev, desc, &config);
-- 
2.0.0.rc2

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Re: [PATCH 1/2] regulator: pfuze100: Support SWB enable/disable

[Mark Brown]

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On Mon, May 26, 2014 at 04:45:40PM +0800, Sean Cross wrote:

> +			.enable_reg = (base),	\
> +			.enable_mask = 0x48,	\

I note that this is a two bit field - what do the two bits mean?

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Re: [PATCH 1/2] regulator: pfuze100: Support SWB enable/disable

[Sean Cross]

On 26/5/2014 10:57 PM, Mark Brown wrote:
> On Mon, May 26, 2014 at 04:45:40PM +0800, Sean Cross wrote:
>
>> +			.enable_reg = (base),	\
>> +			.enable_mask = 0x48,	\
> I note that this is a two bit field - what do the two bits mean?
The datasheet defines the register SWBST Control 1 as having the 
following bit values:

   xbbx mmvv

Where:
     x = don't care
     b = SWBST1STBYMODE[1:0]
     m = SWBST1MODE[1:0]
     v = SWBST1VOLT[1:0]

Both SWBST1STBYMODE and SWBST1MODE have the same bit meanings.  In this 
case, they're both getting set to 0b10, which means "Auto". That is, 
they'll automatically switch between PFM and PWM mode for regulation 
depending on load.

Other regulators, such as the VGEN regulators, don't set their 
corresponding VGENxSTBY bit, which means they will remain on even when 
the STANDBY line is asserted.  By setting both SWBST1STBYMODE and 
SWBST1MODE, the SWBST regulator behaves the same way.


Sean
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Re: [PATCH 0/2] regulator: pfuze100: Minor driver enhancements

[Mark Brown]

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On Mon, May 26, 2014 at 04:45:39PM +0800, Sean Cross wrote:
> The PFUZE100 supports enabling/disabling of SWB regulators, but the driver
> doesn't currently support this.  The first patch adds support for the
> enable/disable bit.

Applied, thanks.

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