From mboxrd@z Thu Jan 1 00:00:00 1970 From: Alex Elder Subject: [PATCH v5 5/5] ARM: dts: enable SMP support for bcm21664 Date: Mon, 16 Jun 2014 14:39:47 -0500 Message-ID: <1402947587-13898-6-git-send-email-elder@linaro.org> References: <1402947587-13898-1-git-send-email-elder@linaro.org> Return-path: In-Reply-To: <1402947587-13898-1-git-send-email-elder@linaro.org> Sender: linux-kernel-owner@vger.kernel.org To: mporter@linaro.org, bcm@fixthebug.org, linux@arm.linux.org.uk, devicetree@vger.kernel.org, arnd@arndb.de, sboyd@codeaurora.org Cc: bcm-kernel-feedback-list@broadcom.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org Define nodes representing the two Cortex A9 CPUs in a bcm21644 SoC. Signed-off-by: Alex Elder --- arch/arm/boot/dts/bcm21664.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm/boot/dts/bcm21664.dtsi b/arch/arm/boot/dts/bcm21664.dtsi index 8b36682..2016b72 100644 --- a/arch/arm/boot/dts/bcm21664.dtsi +++ b/arch/arm/boot/dts/bcm21664.dtsi @@ -27,6 +27,25 @@ bootargs = "console=ttyS0,115200n8"; }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + enable-method = "brcm,bcm11351-cpu-method"; + secondary-boot-reg = <0x35004178>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <0>; + }; + + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a9"; + reg = <1>; + }; + }; + gic: interrupt-controller@3ff00100 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; -- 1.9.1