From mboxrd@z Thu Jan 1 00:00:00 1970 From: Chen-Yu Tsai Subject: [PATCH v2 04/20] clk: sunxi: Fix gate indexing for sun6i-a31-apb0-gates Date: Tue, 17 Jun 2014 22:52:41 +0800 Message-ID: <1403016777-15121-5-git-send-email-wens@csie.org> References: <1403016777-15121-1-git-send-email-wens@csie.org> Reply-To: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Return-path: In-Reply-To: <1403016777-15121-1-git-send-email-wens-jdAy2FN1RRM@public.gmane.org> List-Post: , List-Help: , List-Archive: Sender: linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org List-Subscribe: , List-Unsubscribe: , To: Greg Kroah-Hartman , Samuel Ortiz , Lee Jones , Maxime Ripard , Rob Herring , Mike Turquette , Emilio Lopez , Linus Walleij Cc: Chen-Yu Tsai , linux-serial-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Boris BREZILLON , Luc Verhaegen List-Id: devicetree@vger.kernel.org sun6i-a31-apb0-gates supports using clock-indices for holes between individual gates. However, the driver passes the number of gates registered in clk_data->clk_num, which of_clk_src_onecell_get uses to recognize the range of valid indices a consumer can use. This patch makes the driver pass the maximum gate index + 1, so of_clk_src_onecell_get does not complain about indices greater than gates registered. This was tested on the A23 SoC, which has a similar APB0 clock, but has holes for gates to removed IP blocks. Signed-off-by: Chen-Yu Tsai --- drivers/clk/sunxi/clk-sun6i-apb0-gates.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c index 44cd27c..b342f2a 100644 --- a/drivers/clk/sunxi/clk-sun6i-apb0-gates.c +++ b/drivers/clk/sunxi/clk-sun6i-apb0-gates.c @@ -25,6 +25,7 @@ static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev) void __iomem *reg; int gate_id; int ngates; + int gate_max = 0; int i; r = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -72,9 +73,12 @@ static int sun6i_a31_apb0_gates_clk_probe(struct platform_device *pdev) reg, gate_id, 0, NULL); WARN_ON(IS_ERR(clk_data->clks[gate_id])); + + if (gate_id > gate_max) + gate_max = gate_id; } - clk_data->clk_num = ngates; + clk_data->clk_num = gate_max + 1; return of_clk_add_provider(np, of_clk_src_onecell_get, clk_data); } -- 2.0.0