From: Daniel Thompson <daniel.thompson@linaro.org>
To: Jason Wessel <jason.wessel@windriver.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
kernel@stlinux.com, kgdb-bugreport@lists.sourceforge.net,
Linus Walleij <linus.walleij@linaro.org>,
Kukjin Kim <kgene.kim@samsung.com>, Jiri Slaby <jslaby@suse.cz>,
Daniel Thompson <daniel.thompson@linaro.org>,
Dirk Behme <dirk.behme@de.bosch.com>,
Russell King <linux@arm.linux.org.uk>,
Nicolas Pitre <nico@linaro.org>,
Ian Campbell <ijc+devicetree@hellion.org.uk>,
Anton Vorontsov <anton.vorontsov@linaro.org>,
"David A. Long" <dave.long@linaro.org>,
linux-serial@vger.kernel.org,
Catalin Marinas <catalin.marinas@arm.com>,
kernel-team@android.com, devicetree@vger.kernel.org,
linaro-kernel@lists.linaro.org,
Jason Cooper <jason@lakedaemon.net>,
Pawel Moll <pawel.moll@arm.com>,
patches@linaro.org, Kumar Gala <galak@codeaurora.org>,
Rob Herring <robh+dt@kernel.org>,
John Stultz <john.stultz@linaro.org>,
linux-samsung-soc@vger.kernel.org, Ben
Subject: [PATCH v4 06/13] irqchip: vic: Add support for FIQ management
Date: Thu, 19 Jun 2014 11:38:16 +0100 [thread overview]
Message-ID: <1403174303-25456-7-git-send-email-daniel.thompson@linaro.org> (raw)
In-Reply-To: <1403174303-25456-1-git-send-email-daniel.thompson@linaro.org>
This patch introduces callbacks to route interrupts to or away
from the FIQ signal. It also causes these callbacks to be registered
with the FIQ infrastructure.
This patch enable FIQ support for mach-versatile whilst mach-ep93xx,
mach-netx, mach-s3c64xx and plat-samsung are unmodified (and can therefore
continue to use init_FIQ() as before).
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Ryan Mallon <rmallon@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: linux-samsung-soc@vger.kernel.org
---
arch/arm/mach-versatile/core.c | 2 +-
drivers/irqchip/irq-vic.c | 92 ++++++++++++++++++++++++++++++++---------
include/linux/irqchip/arm-vic.h | 6 ++-
3 files changed, 78 insertions(+), 22 deletions(-)
diff --git a/arch/arm/mach-versatile/core.c b/arch/arm/mach-versatile/core.c
index be83ba2..1abf360 100644
--- a/arch/arm/mach-versatile/core.c
+++ b/arch/arm/mach-versatile/core.c
@@ -108,7 +108,7 @@ void __init versatile_init_irq(void)
np = of_find_matching_node_by_address(NULL, vic_of_match,
VERSATILE_VIC_BASE);
- __vic_init(VA_VIC_BASE, 0, IRQ_VIC_START, ~0, 0, np);
+ __vic_init(VA_VIC_BASE, 0, IRQ_VIC_START, ~0, 0, np ? false : true, np);
writel(~0, VA_SIC_BASE + SIC_IRQ_ENABLE_CLEAR);
diff --git a/drivers/irqchip/irq-vic.c b/drivers/irqchip/irq-vic.c
index 7d35287..22aa126 100644
--- a/drivers/irqchip/irq-vic.c
+++ b/drivers/irqchip/irq-vic.c
@@ -36,6 +36,9 @@
#include <asm/exception.h>
#include <asm/irq.h>
+#ifdef CONFIG_FIQ
+#include <asm/fiq.h>
+#endif
#include "irqchip.h"
@@ -261,11 +264,53 @@ static struct irq_domain_ops vic_irqdomain_ops = {
.xlate = irq_domain_xlate_onetwocell,
};
+#ifdef CONFIG_FIQ
+static DEFINE_RAW_SPINLOCK(irq_controller_lock);
+
+static void vic_set_fiq(struct irq_data *d, bool enable)
+{
+ void __iomem *base = irq_data_get_irq_chip_data(d);
+ unsigned int irq = d->hwirq;
+ u32 val;
+
+ raw_spin_lock(&irq_controller_lock);
+ val = readl(base + VIC_INT_SELECT);
+ if (enable)
+ val |= 1 << irq;
+ else
+ val &= ~(1 << irq);
+ writel(val, base + VIC_INT_SELECT);
+ raw_spin_unlock(&irq_controller_lock);
+}
+
+static void vic_enable_fiq(struct irq_data *d)
+{
+ vic_set_fiq(d, true);
+}
+
+static void vic_disable_fiq(struct irq_data *d)
+{
+ vic_set_fiq(d, false);
+}
+
+struct fiq_chip vic_fiq = {
+ .fiq_enable = vic_enable_fiq,
+ .fiq_disable = vic_disable_fiq,
+};
+
+static void vic_register_fiq(int irq)
+{
+ fiq_register_mapping(irq, &vic_fiq);
+}
+#else /* CONFIG_FIQ */
+static inline void vic_register_fiq(int irq) {}
+#endif /* CONFIG_FIQ */
+
/**
* vic_register() - Register a VIC.
* @base: The base address of the VIC.
* @parent_irq: The parent IRQ if cascaded, else 0.
- * @irq: The base IRQ for the VIC.
+ * @irq_start: The base IRQ for the VIC.
* @valid_sources: bitmask of valid interrupts
* @resume_sources: bitmask of interrupts allowed for resume sources.
* @node: The device tree node associated with the VIC.
@@ -277,12 +322,13 @@ static struct irq_domain_ops vic_irqdomain_ops = {
* This also configures the IRQ domain for the VIC.
*/
static void __init vic_register(void __iomem *base, unsigned int parent_irq,
- unsigned int irq,
+ unsigned int irq_start,
u32 valid_sources, u32 resume_sources,
- struct device_node *node)
+ bool map_fiqs, struct device_node *node)
{
struct vic_device *v;
int i;
+ unsigned int irq;
if (vic_id >= ARRAY_SIZE(vic_devices)) {
printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
@@ -301,15 +347,19 @@ static void __init vic_register(void __iomem *base, unsigned int parent_irq,
irq_set_chained_handler(parent_irq, vic_handle_irq_cascaded);
}
- v->domain = irq_domain_add_simple(node, fls(valid_sources), irq,
+ v->domain = irq_domain_add_simple(node, fls(valid_sources), irq_start,
&vic_irqdomain_ops, v);
/* create an IRQ mapping for each valid IRQ */
- for (i = 0; i < fls(valid_sources); i++)
- if (valid_sources & (1 << i))
- irq_create_mapping(v->domain, i);
+ for (i = 0; i < fls(valid_sources); i++) {
+ if (valid_sources & (1 << i)) {
+ irq = irq_create_mapping(v->domain, i);
+ vic_register_fiq(irq);
+ }
+ }
+
/* If no base IRQ was passed, figure out our allocated base */
- if (irq)
- v->irq = irq;
+ if (irq_start)
+ v->irq = irq_start;
else
v->irq = irq_find_mapping(v->domain, 0);
}
@@ -413,7 +463,8 @@ static void __init vic_clear_interrupts(void __iomem *base)
* and 020 within the page. We call this "second block".
*/
static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
- u32 vic_sources, struct device_node *node)
+ u32 vic_sources, bool map_fiqs,
+ struct device_node *node)
{
unsigned int i;
int vic_2nd_block = ((unsigned long)base & ~PAGE_MASK) != 0;
@@ -439,12 +490,12 @@ static void __init vic_init_st(void __iomem *base, unsigned int irq_start,
writel(32, base + VIC_PL190_DEF_VECT_ADDR);
}
- vic_register(base, 0, irq_start, vic_sources, 0, node);
+ vic_register(base, 0, irq_start, vic_sources, 0, map_fiqs, node);
}
void __init __vic_init(void __iomem *base, int parent_irq, int irq_start,
- u32 vic_sources, u32 resume_sources,
- struct device_node *node)
+ u32 vic_sources, u32 resume_sources,
+ bool map_fiqs, struct device_node *node)
{
unsigned int i;
u32 cellid = 0;
@@ -462,7 +513,7 @@ void __init __vic_init(void __iomem *base, int parent_irq, int irq_start,
switch(vendor) {
case AMBA_VENDOR_ST:
- vic_init_st(base, irq_start, vic_sources, node);
+ vic_init_st(base, irq_start, vic_sources, map_fiqs, node);
return;
default:
printk(KERN_WARNING "VIC: unknown vendor, continuing anyways\n");
@@ -479,7 +530,8 @@ void __init __vic_init(void __iomem *base, int parent_irq, int irq_start,
vic_init2(base);
- vic_register(base, parent_irq, irq_start, vic_sources, resume_sources, node);
+ vic_register(base, parent_irq, irq_start, vic_sources, resume_sources,
+ map_fiqs, node);
}
/**
@@ -492,7 +544,8 @@ void __init __vic_init(void __iomem *base, int parent_irq, int irq_start,
void __init vic_init(void __iomem *base, unsigned int irq_start,
u32 vic_sources, u32 resume_sources)
{
- __vic_init(base, 0, irq_start, vic_sources, resume_sources, NULL);
+ __vic_init(base, 0, irq_start, vic_sources, resume_sources,
+ false, NULL);
}
/**
@@ -511,7 +564,8 @@ int __init vic_init_cascaded(void __iomem *base, unsigned int parent_irq,
struct vic_device *v;
v = &vic_devices[vic_id];
- __vic_init(base, parent_irq, 0, vic_sources, resume_sources, NULL);
+ __vic_init(base, parent_irq, 0, vic_sources, resume_sources, false,
+ NULL);
/* Return out acquired base */
return v->irq;
}
@@ -535,9 +589,9 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
of_property_read_u32(node, "valid-wakeup-mask", &wakeup_mask);
/*
- * Passing 0 as first IRQ makes the simple domain allocate descriptors
+ * Passing 0 as first IRQ makes the domain allocate descriptors.
*/
- __vic_init(regs, 0, 0, interrupt_mask, wakeup_mask, node);
+ __vic_init(regs, 0, 0, interrupt_mask, wakeup_mask, true, node);
return 0;
}
diff --git a/include/linux/irqchip/arm-vic.h b/include/linux/irqchip/arm-vic.h
index ba46c79..30ab39f 100644
--- a/include/linux/irqchip/arm-vic.h
+++ b/include/linux/irqchip/arm-vic.h
@@ -30,8 +30,10 @@ struct device_node;
struct pt_regs;
void __vic_init(void __iomem *base, int parent_irq, int irq_start,
- u32 vic_sources, u32 resume_sources, struct device_node *node);
-void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources, u32 resume_sources);
+ u32 vic_sources, u32 resume_sources,
+ bool map_fiqs, struct device_node *node);
+void vic_init(void __iomem *base, unsigned int irq_start, u32 vic_sources,
+ u32 resume_sources);
int vic_init_cascaded(void __iomem *base, unsigned int parent_irq,
u32 vic_sources, u32 resume_sources);
--
1.9.3
next prev parent reply other threads:[~2014-06-19 10:38 UTC|newest]
Thread overview: 68+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-05-14 15:58 [RFC 0/8] kgdb: NMI/FIQ support for ARM Daniel Thompson
2014-05-14 15:58 ` [RFC 1/8] arm: fiq: Allow EOI to be communicated to the intc Daniel Thompson
2014-05-14 15:58 ` [RFC 2/8] irqchip: gic: Provide support for interrupt grouping Daniel Thompson
2014-05-14 15:58 ` [RFC 3/8] ARM: Move some macros from entry-armv to entry-header Daniel Thompson
2014-05-14 15:58 ` [RFC 4/8] ARM: Add KGDB/KDB FIQ debugger generic code Daniel Thompson
2014-05-14 15:58 ` [RFC 5/8] serial: amba-pl011: Pass on FIQ information to KGDB Daniel Thompson
2014-05-14 15:58 ` [RFC 6/8] serial: asc: Add support for KGDB's FIQ/NMI mode Daniel Thompson
2014-05-14 15:58 ` [RFC 7/8] ARM: VIC: Add vic_set_fiq function to select if an interrupt should generate an IRQ or FIQ Daniel Thompson
2014-05-14 15:58 ` [RFC 8/8] arm: fiq: Hack FIQ routing backdoors into GIC and VIC Daniel Thompson
2014-05-23 13:57 ` [RFC v2 00/10] kgdb: NMI/FIQ support for ARM Daniel Thompson
2014-05-23 13:57 ` [RFC v2 01/10] arm: fiq: Allow EOI to be communicated to the intc Daniel Thompson
2014-05-23 14:59 ` Srinivas Kandagatla
2014-05-23 15:00 ` Russell King - ARM Linux
2014-05-28 15:47 ` Daniel Thompson
2014-05-23 13:57 ` [RFC v2 02/10] irqchip: gic: Provide support for interrupt grouping Daniel Thompson
2014-05-23 13:57 ` [RFC v2 03/10] irqchip: gic: Introduce shadow irqs for FIQ Daniel Thompson
2014-05-23 13:57 ` [RFC v2 04/10] ARM: vexpress: Extend UART with FIQ support Daniel Thompson
2014-05-23 15:04 ` Russell King - ARM Linux
2014-05-29 10:31 ` Daniel Thompson
2014-05-29 13:44 ` Rob Herring
2014-06-03 12:41 ` Daniel Thompson
2014-05-23 13:57 ` [RFC v2 05/10] ARM: STi: STiH41x: " Daniel Thompson
2014-05-23 13:57 ` [RFC v2 06/10] irqchip: vic: Introduce shadow irqs for FIQ Daniel Thompson
2014-05-23 13:57 ` [RFC v2 07/10] ARM: Move some macros from entry-armv to entry-header Daniel Thompson
2014-05-23 13:57 ` [RFC v2 08/10] ARM: Add KGDB/KDB FIQ debugger generic code Daniel Thompson
2014-05-23 13:57 ` [RFC v2 09/10] serial: amba-pl011: Pass on FIQ information to KGDB Daniel Thompson
2014-05-23 13:57 ` [RFC v2 10/10] serial: asc: Add support for KGDB's FIQ/NMI mode Daniel Thompson
2014-05-23 14:50 ` Srinivas Kandagatla
2014-06-05 9:53 ` [RFC v3 0/9] kgdb: NMI/FIQ support for ARM Daniel Thompson
2014-06-05 9:53 ` [RFC v3 1/9] arm: fiq: arbitrary mappings from IRQ to FIQ virqs Daniel Thompson
2014-06-05 11:51 ` Russell King - ARM Linux
2014-06-05 13:08 ` Daniel Thompson
2014-06-12 8:37 ` Linus Walleij
2014-06-12 9:54 ` Daniel Thompson
2014-06-13 14:29 ` Rob Herring
2014-06-18 11:24 ` Daniel Thompson
2014-06-05 9:53 ` [RFC v3 2/9] arm: fiq: Allow EOI to be communicated to the intc Daniel Thompson
2014-06-05 9:53 ` [RFC v3 3/9] irqchip: gic: Provide support for interrupt grouping Daniel Thompson
2014-06-05 19:50 ` Nicolas Pitre
2014-06-05 9:53 ` [RFC v3 4/9] irqchip: gic: Introduce shadow irqs for FIQ Daniel Thompson
2014-06-06 7:46 ` Peter De Schrijver
2014-06-06 9:23 ` Daniel Thompson
2014-06-05 9:53 ` [RFC v3 5/9] irqchip: vic: " Daniel Thompson
2014-06-05 9:53 ` [RFC v3 6/9] ARM: Move some macros from entry-armv to entry-header Daniel Thompson
2014-06-05 9:53 ` [RFC v3 7/9] ARM: Add KGDB/KDB FIQ debugger generic code Daniel Thompson
2014-06-05 9:53 ` [RFC v3 8/9] serial: amba-pl011: Pass on FIQ information to KGDB Daniel Thompson
2014-06-05 9:53 ` [RFC v3 9/9] serial: asc: Add support for KGDB's FIQ/NMI mode Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 00/13] kgdb: NMI/FIQ support for ARM Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 01/13] arm: fiq: Add callbacks to manage FIQ routings Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 02/13] arm: fiq: Allow EOI to be communicated to the intc Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 03/13] irqchip: gic: Provide support for interrupt grouping Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 04/13] irqchip: gic: Add support for FIQ management Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 05/13] irqchip: gic: Remove spin locks from eoi_irq Daniel Thompson
2014-06-19 10:38 ` Daniel Thompson [this message]
2014-06-19 10:38 ` [PATCH v4 07/13] ARM: Move some macros from entry-armv to entry-header Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 08/13] ARM: Add KGDB/KDB FIQ debugger generic code Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 09/13] serial: amba-pl011: Pass FIQ information to KGDB Daniel Thompson
2014-06-20 0:36 ` Greg Kroah-Hartman
2014-06-19 10:38 ` [PATCH v4 10/13] serial: asc: Add support for KGDB's FIQ/NMI mode Daniel Thompson
2014-06-20 0:36 ` Greg Kroah-Hartman
2014-06-19 10:38 ` [PATCH v4 11/13] serial: asc: Adopt readl_/writel_relaxed() Daniel Thompson
2014-06-19 11:29 ` Srinivas Kandagatla
2014-06-19 11:46 ` Daniel Thompson
2014-06-19 11:58 ` Maxime Coquelin
2014-06-19 12:01 ` Srinivas Kandagatla
2014-06-19 13:12 ` Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 12/13] serial: imx: clean up imx_poll_get_char() Daniel Thompson
2014-06-19 10:38 ` [PATCH v4 13/13] serial: imx: Add support for KGDB's FIQ/NMI mode Daniel Thompson
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