From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Subject: [PATCH 03/18] AT91: G45: DT: Declare a second ram controller Date: Thu, 3 Jul 2014 16:14:36 +0200 Message-ID: <1404396906-25194-4-git-send-email-maxime.ripard@free-electrons.com> References: <1404396906-25194-1-git-send-email-maxime.ripard@free-electrons.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1404396906-25194-1-git-send-email-maxime.ripard@free-electrons.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: linux@maxim.org.za, Nicolas Ferre , Jean-Christophe Plagniol-Villard , dwmw2@infradead.org, dbaryshkov@gmail.com Cc: devicetree@vger.kernel.org, Thomas Petazzoni , linux-kernel@vger.kernel.org, Boris Brezillon , Alexandre Belloni , Maxime Ripard , linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org The G45 has two identical ram controller, that are defined as a single one, with two reg cells. The proper way to support such a case is to have two separate DT nodes. Signed-off-by: Maxime Ripard --- arch/arm/boot/dts/at91sam9g45.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi index ace6bf197b70..6f648b85b725 100644 --- a/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/arch/arm/boot/dts/at91sam9g45.dtsi @@ -75,8 +75,12 @@ ramc0: ramc@ffffe400 { compatible = "atmel,at91sam9g45-ddramc"; - reg = <0xffffe400 0x200 - 0xffffe600 0x200>; + reg = <0xffffe400 0x200>; + }; + + ramc1: ramc@ffffe600 { + compatible = "atmel,at91sam9g45-ddramc"; + reg = <0xffffe600 0x200>; }; pmc: pmc@fffffc00 { -- 2.0.1