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From: Kishon Vijay Abraham I <kishon@ti.com>
To: linux-kernel@vger.kernel.org, tony@atomide.com,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-omap@vger.kernel.org
Cc: kishon@ti.com, Rob Herring <robh+dt@kernel.org>,
	Pawel Moll <pawel.moll@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Kumar Gala <galak@codeaurora.org>
Subject: [RESEND PATCH 6/8] ARM: dts: dra7: Add dt data for PCIe PHY control module
Date: Mon, 14 Jul 2014 16:12:21 +0530	[thread overview]
Message-ID: <1405334543-25509-7-git-send-email-kishon@ti.com> (raw)
In-Reply-To: <1405334543-25509-1-git-send-email-kishon@ti.com>

Added dt data for PCIe PHY control module used by PCIe PHY.
The documention for this node can be found @ ../bindings/phy/ti-phy.txt

Cc: Tony Lindgren <tony@atomide.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Kumar Gala <galak@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 arch/arm/boot/dts/dra7.dtsi |   17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 961be6b..e4999e4 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -828,6 +828,23 @@
 			ti,hwmods = "sata";
 		};
 
+		omap_control_pcie1phy: control-phy@0x4a003c40 {
+			compatible = "ti,control-phy-pcie";
+			reg = <0x4a003c40 0x4>, <0x4a003c14 0x4>, <0x4a003c34 0x4>;
+			reg-names = "power", "control_sma", "pcie_pcs";
+			clocks = <&sys_clkin1>;
+			clock-names = "sysclk";
+		};
+
+		omap_control_pcie2phy: control-pcie@0x4a003c44 {
+			compatible = "ti,control-phy-pcie";
+			reg = <0x4a003c44 0x4>, <0x4a003c14 0x4>, <0x4a003c34 0x4>;
+			reg-names = "power", "control_sma", "pcie_pcs";
+			clocks = <&sys_clkin1>;
+			clock-names = "sysclk";
+			status = "disabled";
+		};
+
 		omap_control_usb2phy1: control-phy@4a002300 {
 			compatible = "ti,control-phy-usb2";
 			reg = <0x4a002300 0x4>;
-- 
1.7.9.5

  parent reply	other threads:[~2014-07-14 10:42 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-07-14 10:42 [RESEND PATCH 0/8] arm: dts: dra7: Add PCIe data and PCIe PHY data Kishon Vijay Abraham I
2014-07-14 10:42 ` [RESEND PATCH 1/8] ARM: dts: dra7xx-clocks: Add divider table to optfclk_pciephy_div clock Kishon Vijay Abraham I
2014-07-14 10:42 ` [RESEND PATCH 2/8] ARM: dts: dra7xx-clocks: Change the parent of apll_pcie_in_clk_mux to dpll_pcie_ref_m2ldo_ck Kishon Vijay Abraham I
2014-07-14 10:42 ` [RESEND PATCH 3/8] ARM: dts: dra7xx-clocks: Add missing 32KHz clocks used for PHY Kishon Vijay Abraham I
2014-07-14 10:42 ` [RESEND PATCH 4/8] ARM: dts: dra7xx-clocks: rename pcie clocks to accommodate second PHY instance Kishon Vijay Abraham I
2014-07-14 10:42 ` [RESEND PATCH 5/8] ARM: dts: dra7xx-clocks: Add missing clocks for second PCIe " Kishon Vijay Abraham I
2014-07-14 10:42 ` Kishon Vijay Abraham I [this message]
2014-07-14 10:42 ` [RESEND PATCH 7/8] ARM: dts: dra7: Add dt data for PCIe PHY Kishon Vijay Abraham I
     [not found] ` <1405334543-25509-1-git-send-email-kishon-l0cyMroinI0@public.gmane.org>
2014-07-14 10:42   ` [RESEND PATCH 8/8] ARM: dts: dra7: Add dt data for PCIe controller Kishon Vijay Abraham I
2014-07-15  7:18   ` [RESEND PATCH 0/8] arm: dts: dra7: Add PCIe data and PCIe PHY data Tony Lindgren
2014-07-16  4:46     ` Kishon Vijay Abraham I

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