From: Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
Shawn Guo <shawn.guo-KZfg59tc24xl57MIdRCFDg@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
Pawel Moll <pawel.moll-5wv7dgnIgG8@public.gmane.org>,
Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
Ian Campbell
<ijc+devicetree-KcIKpvwj1kUDXYZnReoRVg@public.gmane.org>,
Kumar Gala <galak-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
kernel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org
Subject: Re: [PATCH 4/4] ARM: dts: imx6qdl: Enable CODA960 VPU
Date: Wed, 16 Jul 2014 10:27:59 +0200 [thread overview]
Message-ID: <1405499279.3622.4.camel@paszta.hi.pengutronix.de> (raw)
In-Reply-To: <20140618151229.GR8860@dragon>
Am Mittwoch, den 18.06.2014, 23:12 +0800 schrieb Shawn Guo:
> On Fri, Jun 13, 2014 at 07:14:01PM +0200, Philipp Zabel wrote:
> > This patch adds links to the on-chip SRAM and reset controller nodes
> > and switches the interrupts. Make the BIT processor interrupt, which exists on
> > all variants, the first one. The JPEG unit interrupt, which does not exist on
> > i.MX27 and i.MX5 thus is an optional second interrupt.
> > Use different compatible strings for i.MX6Q/D and i.MX6S/DL, as they have to
> > load separate firmware images for some reason.
> >
> > Signed-off-by: Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
>
> The whole series looks good to me.
>
> Rob,
>
> Do you want to apply the first patch through DT tree, or may I have your
> ACK to take the whole series via IMX tree?
Hi,
are there any reservations about these patches being merged through
Shawn's IMX tree?
regards
Philipp
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next prev parent reply other threads:[~2014-07-16 8:27 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-06-13 17:13 [PATCH 1/4] of: Add vendor prefix for Chips&Media, Inc Philipp Zabel
2014-06-13 17:14 ` [PATCH 4/4] ARM: dts: imx6qdl: Enable CODA960 VPU Philipp Zabel
[not found] ` <1402679641-868-4-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2014-06-13 20:46 ` Rob Herring
[not found] ` <CAL_JsqL+o+CCRUzXaAmBJBGSxt60k_858S7wQT4TLY0kZC9jgw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2014-06-13 21:16 ` Philipp Zabel
2014-06-18 15:12 ` Shawn Guo
2014-07-16 8:27 ` Philipp Zabel [this message]
[not found] ` <1402679641-868-1-git-send-email-p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2014-06-13 17:13 ` [PATCH 2/4] of: Add new compatibles for CODA bindings Philipp Zabel
2014-06-13 17:14 ` [PATCH 3/4] of: Add named interrupts to " Philipp Zabel
2014-11-14 19:50 ` [PATCH 1/4] of: Add vendor prefix for Chips&Media, Inc Fabio Estevam
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