From mboxrd@z Thu Jan 1 00:00:00 1970 From: Naveen Krishna Chatradhi Subject: [PATCH 4/4 v2] ARM: dts: exynos: Add sysreg phandle to ADC node Date: Thu, 17 Jul 2014 16:49:53 +0530 Message-ID: <1405595993-16661-5-git-send-email-ch.naveen@samsung.com> References: <1405595993-16661-1-git-send-email-ch.naveen@samsung.com> Return-path: In-reply-to: <1405595993-16661-1-git-send-email-ch.naveen@samsung.com> Sender: linux-samsung-soc-owner@vger.kernel.org To: linux-iio@vger.kernel.org, linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, cw00.choi@samsung.com, gregkh@linuxfoundation.org, naveenkrishna.ch@gmail.com, lars@metafoo.de, cpgs@samsung.com, grundler@chromium.org, jic23@kernel.org List-Id: devicetree@vger.kernel.org Instead of using the ADC_PHY register base address, use sysreg phandle in ADC node to control ADC_PHY configuration register. This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250, and Exynos5420, Exynos5800. Signed-off-by: Naveen Krishna Chatradhi To: linux-samsung-soc@vger.kernel.org --- Changes since v1: None arch/arm/boot/dts/exynos3250.dtsi | 3 ++- arch/arm/boot/dts/exynos4x12.dtsi | 3 ++- arch/arm/boot/dts/exynos5250.dtsi | 3 ++- arch/arm/boot/dts/exynos5420.dtsi | 3 ++- 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi index c5e15db..51c9b0d 100644 --- a/arch/arm/boot/dts/exynos3250.dtsi +++ b/arch/arm/boot/dts/exynos3250.dtsi @@ -262,12 +262,13 @@ adc: adc@126C0000 { compatible = "samsung,exynos3250-adc-v2"; - reg = <0x126C0000 0x100>, <0x10020718 0x4>; + reg = <0x126C0000 0x100>; interrupts = <0 137 0>; clock-names = "adc", "sclk_adc"; clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>; #io-channel-cells = <1>; io-channel-ranges; + samsung,syscon-phandle = <&pmu_system_controller>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi index c5a943d..9a18d9b 100644 --- a/arch/arm/boot/dts/exynos4x12.dtsi +++ b/arch/arm/boot/dts/exynos4x12.dtsi @@ -114,13 +114,14 @@ adc: adc@126C0000 { compatible = "samsung,exynos-adc-v1"; - reg = <0x126C0000 0x100>, <0x10020718 0x4>; + reg = <0x126C0000 0x100>; interrupt-parent = <&combiner>; interrupts = <10 3>; clocks = <&clock CLK_TSADC>; clock-names = "adc"; #io-channel-cells = <1>; io-channel-ranges; + samsung,syscon-phandle = <&pmu_system_controller>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index 834fb5a..6003777 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -762,12 +762,13 @@ adc: adc@12D10000 { compatible = "samsung,exynos-adc-v1"; - reg = <0x12D10000 0x100>, <0x10040718 0x4>; + reg = <0x12D10000 0x100> interrupts = <0 106 0>; clocks = <&clock CLK_ADC>; clock-names = "adc"; #io-channel-cells = <1>; io-channel-ranges; + samsung,syscon-phandle = <&pmu_system_controller>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index e385322..6979da8 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -525,12 +525,13 @@ adc: adc@12D10000 { compatible = "samsung,exynos-adc-v2"; - reg = <0x12D10000 0x100>, <0x10040720 0x4>; + reg = <0x12D10000 0x100>; interrupts = <0 106 0>; clocks = <&clock CLK_TSADC>; clock-names = "adc"; #io-channel-cells = <1>; io-channel-ranges; + samsung,syscon-phandle = <&pmu_system_controller>; status = "disabled"; }; -- 1.7.9.5