From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Date: Mon, 21 Jul 2014 07:13:22 -0400 (EDT) Subject: RE: [PATCH v2 2/4] pinctrl: qpnp: Qualcomm PMIC pin controller driver From: kiran.padwal@smartplayin.com MIME-Version: 1.0 Content-Type: multipart/alternative;boundary="----=_20140721071322000000_82253" In-Reply-To: <1405610748-7583-3-git-send-email-iivanov@mm-sol.com> References: <1405610748-7583-1-git-send-email-iivanov@mm-sol.com> <1405610748-7583-3-git-send-email-iivanov@mm-sol.com> Message-ID: <1405941202.870420632@apps.rackspace.com> To: "Ivan T. Ivanov" Cc: Linus Walleij , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Grant Likely , Bjorn Andersson , Mark Brown , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org List-ID: ------=_20140721071322000000_82253 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable =0AHi,=0A =0AOn Thursday, July 17, 2014 11:25am, "Ivan T. Ivanov" said:=0A=0A=0A=0A> From: "Ivan T. Ivanov" = =0A> =0A> This is the pinctrl, pinmux, pinconf and gpiolib driver for the= =0A> Qualcomm GPIO and MPP sub-function blocks found in the PMIC chips.=0A>= =0A> Signed-off-by: Ivan T. Ivanov =0A> ---=0A> driver= s/pinctrl/Kconfig | 12 +=0A> drivers/pinctrl/Makefile | 1 +=0A.=0A[snip]=0A= .=0A> diff --git a/drivers/pinctrl/pinctrl-qpnp.c b/drivers/pinctrl/pinctrl= -qpnp.c=0A> new file mode 100644=0A> index 0000000..aedc72e=0A> --- /dev/nu= ll=0A> +++ b/drivers/pinctrl/pinctrl-qpnp.c=0A.=0A[snip]=0A.=0A> +#define Q= PNP_MPP_CS_OUT_40MA 7=0A> +=0A> +/* revision registers base address offsets= */=0A =0Aunused define, can you please remove it=0A=0A> +#define QPNP_REG_= DIG_MINOR_REV 0x0=0A> +#define QPNP_REG_DIG_MAJOR_REV 0x1=0A =0Aditto=0A=0A= > +#define QPNP_REG_ANA_MINOR_REV 0x2=0A> +=0A> +/* type registers base add= ress offsets */=0A> +#define QPNP_REG_TYPE 0x4=0A> +#define QPNP_REG_SUBTYP= E 0x5=0A> +=0A> +/* GPIO peripheral type and subtype values */=0A> +#define= QPNP_GPIO_TYPE 0x10=0A> +#define QPNP_GPIO_SUBTYPE_GPIO_4CH 0x1=0A> +#defi= ne QPNP_GPIO_SUBTYPE_GPIOC_4CH 0x5=0A> +#define QPNP_GPIO_SUBTYPE_GPIO_8CH = 0x9=0A> +#define QPNP_GPIO_SUBTYPE_GPIOC_8CH 0xd=0A> +=0A> +/* mpp peripher= al type and subtype values */=0A> +#define QPNP_MPP_TYPE 0x11=0A> +#define = QPNP_MPP_SUBTYPE_4CH_NO_ANA_OUT 0x3=0A> +#define QPNP_MPP_SUBTYPE_ULT_4CH_N= O_ANA_OUT 0x4=0A> +#define QPNP_MPP_SUBTYPE_4CH_NO_SINK 0x5=0A> +#define QP= NP_MPP_SUBTYPE_ULT_4CH_NO_SINK 0x6=0A> +#define QPNP_MPP_SUBTYPE_4CH_FULL_F= UNC 0x7=0A> +#define QPNP_MPP_SUBTYPE_8CH_FULL_FUNC 0xf=0A> +=0A> +#define = QPNP_REG_STATUS1 0x8=0A> +#define QPNP_REG_STATUS1_VAL_MASK 0x1=0A> +#defin= e QPNP_REG_STATUS1_GPIO_EN_REV0_MASK 0x2=0A> +#define QPNP_REG_STATUS1_GPIO= _EN_MASK 0x80=0A> +#define QPNP_REG_STATUS1_MPP_EN_MASK 0x80=0A> +=0A> +/* = control register base address offsets */=0A> +#define QPNP_REG_MODE_CTL 0x4= 0=0A> +#define QPNP_REG_DIG_VIN_CTL 0x41=0A> +#define QPNP_REG_DIG_PULL_CTL= 0x42=0A =0Aditto=0A=0A> +#define QPNP_REG_DIG_IN_CTL 0x43=0A> +#define QPN= P_REG_DIG_OUT_CTL 0x45=0A> +#define QPNP_REG_EN_CTL 0x46=0A> +#define QPNP_= REG_AOUT_CTL 0x4b=0A.=0A[snip]=0A.=0A> +#define PM8XXX_MPP_AIN_ABUS3 6=0A> = +#define PM8XXX_MPP_AIN_ABUS4 7=0A> +=0A> +#endif=0A> --=0A> 1.8.3.2=0A> = =0A> --=0A> To unsubscribe from this list: send the line "unsubscribe linux= -arm-msm" in=0A> the body of a message to majordomo@vger.kernel.org=0A> Mor= e majordomo info at http://vger.kernel.org/majordomo-info.html=0A> =0A =0AR= egards,=0A--Kiran ------=_20140721071322000000_82253 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Hi,

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On Thursday, July 17, 2014 11:25am, "I= van T. Ivanov" <iivanov@mm-sol.com> said:

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> From: "Ivan T. Ivanov" <iivanov@mm-sol.com&g= t;
>
> This is the pinctrl, pinmux, pinconf and gpiolib dr= iver for the
> Qualcomm GPIO and MPP sub-function blocks found in t= he PMIC chips.
>
> Signed-off-by: Ivan T. Ivanov <iivan= ov@mm-sol.com>
> ---
> drivers/pinctrl/Kconfig | 12 +> drivers/pinctrl/Makefile | 1 +

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.

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[snip]

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.
> diff --git a/dr= ivers/pinctrl/pinctrl-qpnp.c b/drivers/pinctrl/pinctrl-qpnp.c
> new= file mode 100644
> index 0000000..aedc72e
> --- /dev/null<= br />> +++ b/drivers/pinctrl/pinctrl-qpnp.c

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.

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[snip]

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.

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> +#define QPN= P_MPP_CS_OUT_40MA 7
> +
> +/* revision registers base addre= ss offsets */

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unused define,= can you please remove it

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> +#define QPNP_REG_DIG_MINOR_REV= 0x0
> +#define QPNP_REG_DIG_MAJOR_REV 0x1

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ditto

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> = +#define QPNP_REG_ANA_MINOR_REV 0x2
> +
> +/* type register= s base address offsets */
> +#define QPNP_REG_TYPE 0x4
> +#= define QPNP_REG_SUBTYPE 0x5
> +
> +/* GPIO peripheral type = and subtype values */
> +#define QPNP_GPIO_TYPE 0x10
> +#de= fine QPNP_GPIO_SUBTYPE_GPIO_4CH 0x1
> +#define QPNP_GPIO_SUBTYPE_GP= IOC_4CH 0x5
> +#define QPNP_GPIO_SUBTYPE_GPIO_8CH 0x9
> +#d= efine QPNP_GPIO_SUBTYPE_GPIOC_8CH 0xd
> +
> +/* mpp periphe= ral type and subtype values */
> +#define QPNP_MPP_TYPE 0x11
&= gt; +#define QPNP_MPP_SUBTYPE_4CH_NO_ANA_OUT 0x3
> +#define QPNP_MP= P_SUBTYPE_ULT_4CH_NO_ANA_OUT 0x4
> +#define QPNP_MPP_SUBTYPE_4CH_NO= _SINK 0x5
> +#define QPNP_MPP_SUBTYPE_ULT_4CH_NO_SINK 0x6
>= +#define QPNP_MPP_SUBTYPE_4CH_FULL_FUNC 0x7
> +#define QPNP_MPP_SU= BTYPE_8CH_FULL_FUNC 0xf
> +
> +#define QPNP_REG_STATUS1 0x8=
> +#define QPNP_REG_STATUS1_VAL_MASK 0x1
> +#define QPNP_R= EG_STATUS1_GPIO_EN_REV0_MASK 0x2
> +#define QPNP_REG_STATUS1_GPIO_E= N_MASK 0x80
> +#define QPNP_REG_STATUS1_MPP_EN_MASK 0x80
> = +
> +/* control register base address offsets */
> +#define= QPNP_REG_MODE_CTL 0x40
> +#define QPNP_REG_DIG_VIN_CTL 0x41
&= gt; +#define QPNP_REG_DIG_PULL_CTL 0x42

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ditto

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> +#define QP= NP_REG_DIG_IN_CTL 0x43
> +#define QPNP_REG_DIG_OUT_CTL 0x45
&g= t; +#define QPNP_REG_EN_CTL 0x46
> +#define QPNP_REG_AOUT_CTL 0x4b<= /p>=0A

= .

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.
> +#define PM8XXX_MPP_AIN_ABUS3 6
> +#define PM8= XXX_MPP_AIN_ABUS4 7
> +
> +#endif
> --
> 1.= 8.3.2
>
> --
> To unsubscribe from this list: send= the line "unsubscribe linux-arm-msm" in
> the body of a message to= majordomo@vger.kernel.org
> More majordomo info at http://vger.ker= nel.org/majordomo-info.html

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Regards,

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--Kiran

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